[PATCH v3 0/3] Unfiy PCI suspend and hibernate paths

[Mario Limonciello <mario.limonciello@amd.com>]

Many cycles ago I sent out a kernel series for using the S4 paths when
the system goes to S5.  Some parts of it got merged, and Rafael suggested
to split the other parts into smaller pieces across multiple kernel cycles
to make bisecting easier.

This series attempts to unify the PCI suspend and hibernate paths so that
PCIe bridges with downstream devices are put into D3 at hibernate the same
way they already are at S3 suspend.  I have been carrying it, rebasing it
and personally using it for a while now.

Since v2, the two changes that had major push back on have been dropped
(see the changelog below), and the remaining patches have been reworked to
minimize churn and to explain the concrete motivation behind them.

v3:
 - Drop "PCI/PM: Disable device wakeups when halting or powering off
   system" (was 2/6).  It would break Wake-on-LAN / Remote Start from S5,
   has a user-visible sysfs side effect if the poweroff transition is
   rolled back, and runs counter to ACPI r6.5 sec 16.1.5 ("OSPM does not
   disable wake events before setting the SLP_EN bit when entering the S5
   system state"). (Rafael, Bjorn) 

 - Drop "PCI/PM: Use pci_power_manageable() in pci_pm_poweroff_noirq()" 
   (was 5/6).  It only touched the line that the final patch replaces, and 
   the shared helper already selects bridges via pci_power_manageable(), so
   it was superseded churn. (Rafael) 

 - Drop "PCI: Stop setting cached power state to unknown on unbind"
   (was 1/6) from the series; it has been merged.
   (Reviewed-by: Rafael J. Wysocki) 

 - Split-out-helper patch: keep pci_pm_set_unknown_state() in the callers
   so pci_pm_suspend_noirq()'s set_unknown: label is preserved and no label
   churn is needed; fix the kernel-doc comment for the new helper. (Rafael,
   Sashiko) 

 - Rewrite the changelog of "Run bridge power up actions as part of restore
   phase" to explain why it is needed: it is the restore-side counterpart
   to putting bridges into D3cold at hibernate, mirroring
   pci_pm_resume_noirq(). (Rafael) 

 - Rewrite the changelog of "Put PCIe bridges with downstream devices into
   D3 at hibernate" to describe the concrete problem (firmware not powering
   the bridges down at S4 on affected platforms, and the resulting power
   draw) and to argue safety (it mirrors the shipping S3 suspend_noirq path
   and is guarded identically). (Rafael) 

Mario Limonciello (AMD) (3):
  PCI/PM: Split out code from pci_pm_suspend_noirq() into helper
  PCI/PM: Run bridge power up actions as part of restore phase
  PCI: Put PCIe bridges with downstream devices into D3 at hibernate

 drivers/pci/pci-driver.c | 89 ++++++++++++++++++++++++++--------------
 1 file changed, 59 insertions(+), 30 deletions(-)

-- 
2.43.0