From: sashiko-bot@kernel.org
To: "Yazen Ghannam" <yazen.ghannam@amd.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 07/10] PCI/FLIT: Add support for Flit Logging Extended Capability
Date: Fri, 18 Sep 2026 15:12:42 +0000 [thread overview]
Message-ID: <20260918151242.B1A821F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260918145619.3016889-8-yazen.ghannam@amd.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] pcie/flit: IRQ storm due to free_irq() before disabling hardware
--
commit c76b2fb611bb532cfef2fa0ae176b99d25d187a0
Author: Yazen Ghannam <yazen.ghannam@amd.com>
PCI/FLIT: Add support for Flit Logging Extended Capability
This commit adds a PCIe port service driver for the Flit Logging Extended
Capability, including _OSC negotiation, interrupt handling, and error
logging features.
Link: https://pcisig.com/specification/extend-osc-negotiate-control-pcie-flit-logging-extended-capability
> diff --git a/drivers/pci/pcie/flit.c b/drivers/pci/pcie/flit.c
> new file mode 100644
> index 0000000000000..7c0b9c8dd4811
> --- /dev/null
> +++ b/drivers/pci/pcie/flit.c
[ ... ]
> +static irqreturn_t flit_ist(int irq, void *context)
> +{
> + struct pcie_device *dev = (struct pcie_device *)context;
> + struct pci_dev *pdev = dev->port;
[ ... ]
> + /*
> + * Re-enable the counter. Per PCIe r6.4, sec 7.7.8.5, table 7-96, the
> + * status bit is "Cleared on 0b to 1b transition of Flit Error Counter
> + * Enable", which also clears the counter and re-arms interrupt
> + * generation.
> + */
> + flit_cntr_ctrl_update(pdev, 0, PCI_FLIT_ERR_CNTR_CTRL_EN);
> + return IRQ_HANDLED;
> +}
[Severity: High]
Does unconditionally re-enabling the counter here prevent a safe teardown
sequence in flit_cntr_remove()?
If this checked pdev->flit_info->cntr_enabled before re-enabling, could we
then safely disable the counter before freeing the IRQ during removal?
[ ... ]
> +static int flit_probe(struct pcie_device *dev)
> +{
> + struct pci_dev *pdev = dev->port;
> + int status;
> +
> + /*
> + * Not devm_request_threaded_irq(): devres would free the IRQ only
> + * after .remove() runs, too late to stop flit_ist() re-enabling the
> + * counter.
> + */
[Severity: High]
Does this deliberate teardown order choice introduce an IRQ storm
regression?
> + status = request_threaded_irq(dev->irq, flit_isr, flit_ist,
> + IRQF_SHARED, "pcie-flit", dev);
[ ... ]
> +static void flit_cntr_remove(struct pcie_device *dev)
> +{
> + /* Drop the IRQ first: free_irq() waits for the threaded handler. */
> + free_irq(dev->irq, dev);
> + flit_cntr_disable(dev->port);
> +}
[Severity: High]
Could calling free_irq() before flit_cntr_disable() cause a regression
with an unhandled level-triggered interrupt storm?
Because the IRQ is requested with IRQF_SHARED (shared with other PCIe
port services like PME and Hotplug), the interrupt may be a
level-triggered INTx line.
If the Flit hardware asserts an interrupt during the window between
free_irq() and flit_cntr_disable(), the other shared handlers will be
invoked but will return IRQ_NONE since they cannot clear the Flit status
register.
Could this prompt the kernel to permanently disable the shared IRQ line
("irq XX: nobody cared") and break all other services sharing it?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260918145619.3016889-1-yazen.ghannam@amd.com?part=7
next prev parent reply other threads:[~2026-09-18 15:12 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-18 14:56 [PATCH v2 00/10] PCIe Flit Logging Ext Capability Support Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 01/10] MAINTAINERS: Add the AER sysfs ABI file to PCI SUBSYSTEM Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 02/10] PCI/AER: Clamp negative ratelimit burst to zero Yazen Ghannam
2026-09-18 15:07 ` sashiko-bot
2026-09-18 14:56 ` [PATCH v2 03/10] PCI/AER: Report the ratelimit interval in milliseconds Yazen Ghannam
2026-09-18 15:04 ` sashiko-bot
2026-09-18 14:56 ` [PATCH v2 04/10] PCI/AER: Hide the "aer" sysfs directory when AER is unavailable Yazen Ghannam
2026-09-18 15:14 ` sashiko-bot
2026-09-18 14:56 ` [PATCH v2 05/10] PCI: Share the AER ratelimit sysfs accessors Yazen Ghannam
2026-09-18 15:06 ` sashiko-bot
2026-09-18 14:56 ` [PATCH v2 06/10] PCI/portdrv: Group PCI Exp Cap services into a single mask Yazen Ghannam
2026-09-18 15:04 ` sashiko-bot
2026-09-18 14:56 ` [PATCH v2 07/10] PCI/FLIT: Add support for Flit Logging Extended Capability Yazen Ghannam
2026-09-18 15:12 ` sashiko-bot [this message]
2026-09-18 16:38 ` Ilpo Järvinen
2026-09-18 14:56 ` [PATCH v2 08/10] PCI/FLIT: Add trace event for flit errors Yazen Ghannam
2026-09-18 15:09 ` sashiko-bot
2026-09-18 14:56 ` [PATCH v2 09/10] PCI/FLIT: Ratelimit flit error logging Yazen Ghannam
2026-09-18 15:19 ` sashiko-bot
2026-09-18 14:56 ` [PATCH v2 10/10] PCI/FLIT: Expose the error counter controls through sysfs Yazen Ghannam
2026-09-18 15:19 ` sashiko-bot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260918151242.B1A821F000FF@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=yazen.ghannam@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox