Re: [PATCH] PCI/AER: Consolidate CXL and native AER reporting paths

[Karolina Stolarek <karolina.stolarek@oracle.com>]

On 20/03/2025 19:17, Bjorn Helgaas wrote:
> 
> Maybe there's CXL magic that I missed.  It looks like Terry's series
> changes some of this path.  And GHES also currently uses
> pci_print_aer().  Some sample logs at [1,2].

Maybe that's it, thanks a lot for the pointers.

> Looking at v6.14-rc1, only aer_print_error() logs the "error status"
> string, and only pci_print_aer() logs "aer_status", "aer_layer", etc.
> 
> The previous path is:
> 
>    pci_print_aer
>      pci_err("aer_status: 0x%08x, aer_mask: 0x%08x\n")    <--
>      __aer_print_error
>      pci_err("aer_layer=%s, aer_agent=%s\n")              <--
>      pcie_print_tlp_log
> 
> New path is:
> 
>    aer_print_error
>      pci_printk("PCIe Bus Error: severity=%s, type=%s, (%s)\n")
>      pci_printk("  device [%04x:%04x] error status/mask=%08x/%08x\n)
>      __aer_print_error
>      pcie_print_tlp_log
> 
> So I expected that the lines I marked in pci_print_aer() would be
> different.

Hmm, that seems to be the case. But still, the question is if going with 
the new format that matches what's in AER a bad or disruptive thing. I'd 
like to try going in the direction of using one way of reporting AER 
errors, if possible.

I will send v2 on Monday (with the memset move) and we can keep 
discussing other changes in the patch.

All the best,
Karolina

> 
> Bjorn
> 
> [1] https://lore.kernel.org/lkml/2149597.8uJZFlvqrj@xrated/T/
> [2] https://lore.kernel.org/all/e8a58616-aeae-ad78-d496-6dfcef4ddcaa@arm.com/T/