From: Qiang Yu <quic_qianyu@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: <manivannan.sadhasivam@linaro.org>, <vkoul@kernel.org>,
<kishon@kernel.org>, <robh@kernel.org>, <andersson@kernel.org>,
<konradybcio@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <abel.vesa@linaro.org>,
<quic_msarkar@quicinc.com>, <quic_devipriy@quicinc.com>,
<kw@linux.com>, <lpieralisi@kernel.org>,
<neil.armstrong@linaro.org>, <linux-arm-msm@vger.kernel.org>,
<linux-phy@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>
Subject: Re: [PATCH 8/8] PCI: qcom: Add support to PCIe slot power supplies
Date: Wed, 28 Aug 2024 21:44:11 +0800 [thread overview]
Message-ID: <844538cc-9f58-4e05-8356-096a98bd543a@quicinc.com> (raw)
In-Reply-To: <CAA8EJpq5KergZ8czg4F=EYMLANoOeBsiSVoO-zAgfG0ezQrKCQ@mail.gmail.com>
On 8/27/2024 7:44 PM, Dmitry Baryshkov wrote:
> On Tue, 27 Aug 2024 at 09:36, Qiang Yu <quic_qianyu@quicinc.com> wrote:
>> On platform x1e80100 QCP, PCIe3 is a standard x8 form factor. Hence, add
>> support to use 3.3v, 3.3v aux and 12v regulators.
> First of all, I don't see corresponding bindings change.
>
> Second, these supplies power up the slot, not the host controller
> itself. As such these supplies do not belong to the host controller
> entry. Please consider using the pwrseq framework instead.
As Mani commented, he is exploring to use pwrctl driver to control this
three power. Will update the patch after Mani share his conclusion. This
patch may even not required.
Thanks,
Qiang
>
>> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
>> ---
>> drivers/pci/controller/dwc/pcie-qcom.c | 52 +++++++++++++++++++++++++-
>> 1 file changed, 50 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 6f953e32d990..59fb415dfeeb 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -248,6 +248,8 @@ struct qcom_pcie_cfg {
>> bool no_l0s;
>> };
>>
>> +#define QCOM_PCIE_SLOT_MAX_SUPPLIES 3
>> +
>> struct qcom_pcie {
>> struct dw_pcie *pci;
>> void __iomem *parf; /* DT parf */
>> @@ -260,6 +262,7 @@ struct qcom_pcie {
>> struct icc_path *icc_cpu;
>> const struct qcom_pcie_cfg *cfg;
>> struct dentry *debugfs;
>> + struct regulator_bulk_data slot_supplies[QCOM_PCIE_SLOT_MAX_SUPPLIES];
>> bool suspended;
>> bool use_pm_opp;
>> };
>> @@ -1174,6 +1177,41 @@ static int qcom_pcie_link_up(struct dw_pcie *pci)
>> return !!(val & PCI_EXP_LNKSTA_DLLLA);
>> }
>>
>> +static int qcom_pcie_enable_slot_supplies(struct qcom_pcie *pcie)
>> +{
>> + struct dw_pcie *pci = pcie->pci;
>> + int ret;
>> +
>> + ret = regulator_bulk_enable(ARRAY_SIZE(pcie->slot_supplies),
>> + pcie->slot_supplies);
>> + if (ret < 0)
>> + dev_err(pci->dev, "Failed to enable slot regulators\n");
>> +
>> + return ret;
>> +}
>> +
>> +static void qcom_pcie_disable_slot_supplies(struct qcom_pcie *pcie)
>> +{
>> + regulator_bulk_disable(ARRAY_SIZE(pcie->slot_supplies),
>> + pcie->slot_supplies);
>> +}
>> +
>> +static int qcom_pcie_get_slot_supplies(struct qcom_pcie *pcie)
>> +{
>> + struct dw_pcie *pci = pcie->pci;
>> + int ret;
>> +
>> + pcie->slot_supplies[0].supply = "vpcie12v";
>> + pcie->slot_supplies[1].supply = "vpcie3v3";
>> + pcie->slot_supplies[2].supply = "vpcie3v3aux";
>> + ret = devm_regulator_bulk_get(pci->dev, ARRAY_SIZE(pcie->slot_supplies),
>> + pcie->slot_supplies);
>> + if (ret < 0)
>> + dev_err(pci->dev, "Failed to get slot regulators\n");
>> +
>> + return ret;
>> +}
>> +
>> static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>> {
>> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> @@ -1182,10 +1220,14 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>>
>> qcom_ep_reset_assert(pcie);
>>
>> - ret = pcie->cfg->ops->init(pcie);
>> + ret = qcom_pcie_enable_slot_supplies(pcie);
>> if (ret)
>> return ret;
>>
>> + ret = pcie->cfg->ops->init(pcie);
>> + if (ret)
>> + goto err_disable_slot;
>> +
>> ret = phy_set_mode_ext(pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC);
>> if (ret)
>> goto err_deinit;
>> @@ -1216,7 +1258,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>> phy_power_off(pcie->phy);
>> err_deinit:
>> pcie->cfg->ops->deinit(pcie);
>> -
>> +err_disable_slot:
>> + qcom_pcie_disable_slot_supplies(pcie);
>> return ret;
>> }
>>
>> @@ -1228,6 +1271,7 @@ static void qcom_pcie_host_deinit(struct dw_pcie_rp *pp)
>> qcom_ep_reset_assert(pcie);
>> phy_power_off(pcie->phy);
>> pcie->cfg->ops->deinit(pcie);
>> + qcom_pcie_disable_slot_supplies(pcie);
>> }
>>
>> static void qcom_pcie_host_post_init(struct dw_pcie_rp *pp)
>> @@ -1602,6 +1646,10 @@ static int qcom_pcie_probe(struct platform_device *pdev)
>> goto err_pm_runtime_put;
>> }
>>
>> + ret = qcom_pcie_get_slot_supplies(pcie);
>> + if (ret)
>> + goto err_pm_runtime_put;
>> +
>> ret = pcie->cfg->ops->get_resources(pcie);
>> if (ret)
>> goto err_pm_runtime_put;
>> --
>> 2.34.1
>>
>
next prev parent reply other threads:[~2024-08-28 13:44 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-27 6:36 [PATCH 0/8] Add support for PCIe3 on x1e80100 Qiang Yu
2024-08-27 6:36 ` [PATCH 1/8] phy: qcom-qmp: pcs-pcie: Add v6.30 register offsets Qiang Yu
2024-08-27 11:37 ` Krzysztof Kozlowski
2024-08-28 9:41 ` Qiang Yu
2024-08-27 6:36 ` [PATCH 2/8] phy: qcom-qmp: pcs: " Qiang Yu
2024-08-27 10:13 ` Konrad Dybcio
2024-08-27 6:36 ` [PATCH 3/8] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3 Qiang Yu
2024-08-27 10:33 ` Konrad Dybcio
2024-08-28 9:47 ` Qiang Yu
2024-08-27 11:38 ` Krzysztof Kozlowski
2024-08-28 9:52 ` Qiang Yu
2024-08-27 6:36 ` [PATCH 4/8] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 Qiang Yu
2024-08-27 10:42 ` Konrad Dybcio
2024-08-28 13:36 ` Qiang Yu
2024-09-11 8:22 ` Qiang Yu
2024-08-27 11:39 ` Krzysztof Kozlowski
2024-08-27 6:36 ` [PATCH 5/8] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8 Qiang Yu
2024-08-27 11:36 ` Krzysztof Kozlowski
2024-08-27 6:36 ` [PATCH 6/8] clk: qcom: gcc-x1e80100: Fix halt_check for pipediv2 clocks Qiang Yu
2024-08-27 10:10 ` Konrad Dybcio
2024-08-27 6:36 ` [PATCH 7/8] arm64: dts: qcom: x1e80100-qcp: Add power supply and sideband signal for pcie3 Qiang Yu
2024-08-27 11:41 ` Krzysztof Kozlowski
2024-08-27 6:36 ` [PATCH 8/8] PCI: qcom: Add support to PCIe slot power supplies Qiang Yu
2024-08-27 11:02 ` Konrad Dybcio
2024-08-27 11:44 ` Dmitry Baryshkov
2024-08-27 16:58 ` Manivannan Sadhasivam
2024-09-11 8:17 ` Qiang Yu
2024-09-11 15:32 ` Manivannan Sadhasivam
2024-09-12 13:39 ` Qiang Yu
2024-09-12 14:15 ` Konrad Dybcio
2024-09-12 14:44 ` Manivannan Sadhasivam
2024-09-12 14:49 ` Dmitry Baryshkov
2024-09-13 8:41 ` Qiang Yu
2024-08-28 13:44 ` Qiang Yu [this message]
2024-08-27 12:31 ` [PATCH 0/8] Add support for PCIe3 on x1e80100 Rob Herring (Arm)
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