From: Qiang Yu <quic_qianyu@quicinc.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: <manivannan.sadhasivam@linaro.org>, <vkoul@kernel.org>,
<kishon@kernel.org>, <robh@kernel.org>, <andersson@kernel.org>,
<konradybcio@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <abel.vesa@linaro.org>,
<quic_msarkar@quicinc.com>, <quic_devipriy@quicinc.com>,
<dmitry.baryshkov@linaro.org>, <kw@linux.com>,
<lpieralisi@kernel.org>, <neil.armstrong@linaro.org>,
<linux-arm-msm@vger.kernel.org>, <linux-phy@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH 3/8] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3
Date: Wed, 28 Aug 2024 17:52:09 +0800 [thread overview]
Message-ID: <d79f84f1-345b-4099-b1d2-567ebfd3789d@quicinc.com> (raw)
In-Reply-To: <3rwkr4tqyki7umt75bgy6wcs2whchw2vb5ckrkqffaizxm3ssp@glkarq76vl4f>
On 8/27/2024 7:38 PM, Krzysztof Kozlowski wrote:
> On Mon, Aug 26, 2024 at 11:36:26PM -0700, Qiang Yu wrote:
>> if (cfg->tbls.ln_shrd)
>> qmp->ln_shrd = base + offs->ln_shrd;
>>
>> @@ -4424,6 +4641,9 @@ static const struct of_device_id qmp_pcie_of_match_table[] = {
>> }, {
>> .compatible = "qcom,x1e80100-qmp-gen4x2-pcie-phy",
>> .data = &x1e80100_qmp_gen4x2_pciephy_cfg,
>> + }, {
>> + .compatible = "qcom,x1e80100-qmp-gen4x8-pcie-phy",
> Undocumented compatible or your patch order is wrong.
OK, will put the yaml patch in front of this patch
Thanks,
Qiang
>
>> + .data = &x1e80100_qmp_gen4x8_pciephy_cfg,
>> },
> Best regards,
> Krzysztof
>
next prev parent reply other threads:[~2024-08-28 9:52 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-27 6:36 [PATCH 0/8] Add support for PCIe3 on x1e80100 Qiang Yu
2024-08-27 6:36 ` [PATCH 1/8] phy: qcom-qmp: pcs-pcie: Add v6.30 register offsets Qiang Yu
2024-08-27 11:37 ` Krzysztof Kozlowski
2024-08-28 9:41 ` Qiang Yu
2024-08-27 6:36 ` [PATCH 2/8] phy: qcom-qmp: pcs: " Qiang Yu
2024-08-27 10:13 ` Konrad Dybcio
2024-08-27 6:36 ` [PATCH 3/8] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3 Qiang Yu
2024-08-27 10:33 ` Konrad Dybcio
2024-08-28 9:47 ` Qiang Yu
2024-08-27 11:38 ` Krzysztof Kozlowski
2024-08-28 9:52 ` Qiang Yu [this message]
2024-08-27 6:36 ` [PATCH 4/8] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 Qiang Yu
2024-08-27 10:42 ` Konrad Dybcio
2024-08-28 13:36 ` Qiang Yu
2024-09-11 8:22 ` Qiang Yu
2024-08-27 11:39 ` Krzysztof Kozlowski
2024-08-27 6:36 ` [PATCH 5/8] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8 Qiang Yu
2024-08-27 11:36 ` Krzysztof Kozlowski
2024-08-27 6:36 ` [PATCH 6/8] clk: qcom: gcc-x1e80100: Fix halt_check for pipediv2 clocks Qiang Yu
2024-08-27 10:10 ` Konrad Dybcio
2024-08-27 6:36 ` [PATCH 7/8] arm64: dts: qcom: x1e80100-qcp: Add power supply and sideband signal for pcie3 Qiang Yu
2024-08-27 11:41 ` Krzysztof Kozlowski
2024-08-27 6:36 ` [PATCH 8/8] PCI: qcom: Add support to PCIe slot power supplies Qiang Yu
2024-08-27 11:02 ` Konrad Dybcio
2024-08-27 11:44 ` Dmitry Baryshkov
2024-08-27 16:58 ` Manivannan Sadhasivam
2024-09-11 8:17 ` Qiang Yu
2024-09-11 15:32 ` Manivannan Sadhasivam
2024-09-12 13:39 ` Qiang Yu
2024-09-12 14:15 ` Konrad Dybcio
2024-09-12 14:44 ` Manivannan Sadhasivam
2024-09-12 14:49 ` Dmitry Baryshkov
2024-09-13 8:41 ` Qiang Yu
2024-08-28 13:44 ` Qiang Yu
2024-08-27 12:31 ` [PATCH 0/8] Add support for PCIe3 on x1e80100 Rob Herring (Arm)
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