Re: [v6 3/5] PCI: cadence: Use common PCI host bridge APIs for finding the capabilities

[Hans Zhang <18255117159@163.com>]

On 2025/3/25 23:18, Ilpo Järvinen wrote:>>
>> Hi Ilpo,
>>
>> Another question comes to mind:
>> If working in EP mode, devm_pci_alloc_host_bridge will not be executed and
>> there will be no struct pci_host_bridge.
>>
>> Don't know if you have anything to add?
> 
> Hi Hans,
> 
> No, I don't have further ideas at this point, sorry. It seems it isn't
> realistic without something more substantial that currently isn't there.
> 
> This lack of way to have a generic way to read the config before the main
> struct are instanciated by the PCI core seems to be the limitation that
> hinders sharing code between controller drivers and it would have been
> nice to address it.
> 
> But please still make the capability list parsing code common, it should
> be relatively straightforward using a macro which can take different read
> functions similar to read_poll_timeout. That will avoid at least some
> amount of code duplication.
> 
> Thanks for trying to come up with a solution (or thinking enough to say
> it doesn't work)!
> 

Hi Ilpo,

It's okay. It's what I'm supposed to do. Thank you very much for your 
discussion with me. I'll try a macro definition like read_poll_timeout. 
Will share the revised patches soon for your feedback.

Best regards,
Hans