* [PATCH] PCI: Add Marvell Octeon devices to PCI IDs
@ 2022-02-14 12:25 Sunil Goutham
2022-02-15 12:18 ` Leon Romanovsky
0 siblings, 1 reply; 3+ messages in thread
From: Sunil Goutham @ 2022-02-14 12:25 UTC (permalink / raw)
To: bhelgaas, linux-pci; +Cc: sunil.goutham, Sunil Goutham
Add Marvell (Cavium) OcteonTx2 and CN10K devices
to PCI ID database.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
---
include/linux/pci_ids.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index aad54c6..5fd187b 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2357,6 +2357,21 @@
#define PCI_DEVICE_ID_ALTIMA_AC1003 0x03eb
#define PCI_VENDOR_ID_CAVIUM 0x177d
+#define PCI_DEVICE_ID_OCTEONTX2_PTP 0xA00C
+#define PCI_DEVICE_ID_CN10K_PTP 0xA09E
+#define PCI_DEVICE_ID_OCTEONTX2_CGX 0xA059
+#define PCI_DEVICE_ID_CN10K_RPM 0xA060
+#define PCI_DEVICE_ID_OCTEONTX2_CPTPF 0xA0FD
+#define PCI_DEVICE_ID_OCTEONTX2_CPTVF 0xA0FE
+#define PCI_DEVICE_ID_CN10K_CPTPF 0xA0F2
+#define PCI_DEVICE_ID_CN10K_CPTVF 0xA0F3
+#define PCI_DEVICE_ID_OCTEONTX2_RVUAF 0xA065
+#define PCI_DEVICE_ID_OCTEONTX2_RVUPF 0xA063
+#define PCI_DEVICE_ID_OCTEONTX2_RVUVF 0xA064
+#define PCI_DEVICE_ID_OCTEONTX2_LBK 0xA061
+#define PCI_DEVICE_ID_OCTEONTX2_LBKVF 0xA0F8
+#define PCI_DEVICE_ID_OCTEONTX2_SDPPF 0xA0F6
+#define PCI_DEVICE_ID_OCTEONTX2_SDPVF 0xA0F7
#define PCI_VENDOR_ID_TECHWELL 0x1797
#define PCI_DEVICE_ID_TECHWELL_6800 0x6800
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] PCI: Add Marvell Octeon devices to PCI IDs
2022-02-14 12:25 [PATCH] PCI: Add Marvell Octeon devices to PCI IDs Sunil Goutham
@ 2022-02-15 12:18 ` Leon Romanovsky
2022-02-15 15:28 ` Bjorn Helgaas
0 siblings, 1 reply; 3+ messages in thread
From: Leon Romanovsky @ 2022-02-15 12:18 UTC (permalink / raw)
To: Sunil Goutham; +Cc: bhelgaas, linux-pci, sunil.goutham
On Mon, Feb 14, 2022 at 05:55:10PM +0530, Sunil Goutham wrote:
> Add Marvell (Cavium) OcteonTx2 and CN10K devices
> to PCI ID database.
>
> Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
> ---
> include/linux/pci_ids.h | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index aad54c6..5fd187b 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -2357,6 +2357,21 @@
> #define PCI_DEVICE_ID_ALTIMA_AC1003 0x03eb
>
> #define PCI_VENDOR_ID_CAVIUM 0x177d
> +#define PCI_DEVICE_ID_OCTEONTX2_PTP 0xA00C
> +#define PCI_DEVICE_ID_CN10K_PTP 0xA09E
> +#define PCI_DEVICE_ID_OCTEONTX2_CGX 0xA059
> +#define PCI_DEVICE_ID_CN10K_RPM 0xA060
> +#define PCI_DEVICE_ID_OCTEONTX2_CPTPF 0xA0FD
> +#define PCI_DEVICE_ID_OCTEONTX2_CPTVF 0xA0FE
> +#define PCI_DEVICE_ID_CN10K_CPTPF 0xA0F2
> +#define PCI_DEVICE_ID_CN10K_CPTVF 0xA0F3
> +#define PCI_DEVICE_ID_OCTEONTX2_RVUAF 0xA065
> +#define PCI_DEVICE_ID_OCTEONTX2_RVUPF 0xA063
> +#define PCI_DEVICE_ID_OCTEONTX2_RVUVF 0xA064
> +#define PCI_DEVICE_ID_OCTEONTX2_LBK 0xA061
> +#define PCI_DEVICE_ID_OCTEONTX2_LBKVF 0xA0F8
> +#define PCI_DEVICE_ID_OCTEONTX2_SDPPF 0xA0F6
> +#define PCI_DEVICE_ID_OCTEONTX2_SDPVF 0xA0F7
If I recall correctly, this file is for device IDs that are used in more
than one subsystem. It is not supposed to be updated for every octeon device.
Thanks
>
> #define PCI_VENDOR_ID_TECHWELL 0x1797
> #define PCI_DEVICE_ID_TECHWELL_6800 0x6800
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] PCI: Add Marvell Octeon devices to PCI IDs
2022-02-15 12:18 ` Leon Romanovsky
@ 2022-02-15 15:28 ` Bjorn Helgaas
0 siblings, 0 replies; 3+ messages in thread
From: Bjorn Helgaas @ 2022-02-15 15:28 UTC (permalink / raw)
To: Leon Romanovsky; +Cc: Sunil Goutham, bhelgaas, linux-pci, sunil.goutham
On Tue, Feb 15, 2022 at 02:18:09PM +0200, Leon Romanovsky wrote:
> On Mon, Feb 14, 2022 at 05:55:10PM +0530, Sunil Goutham wrote:
> > Add Marvell (Cavium) OcteonTx2 and CN10K devices
> > to PCI ID database.
> >
> > Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
> > ---
> > include/linux/pci_ids.h | 15 +++++++++++++++
> > 1 file changed, 15 insertions(+)
> >
> > diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> > index aad54c6..5fd187b 100644
> > --- a/include/linux/pci_ids.h
> > +++ b/include/linux/pci_ids.h
> > @@ -2357,6 +2357,21 @@
> > #define PCI_DEVICE_ID_ALTIMA_AC1003 0x03eb
> >
> > #define PCI_VENDOR_ID_CAVIUM 0x177d
> > +#define PCI_DEVICE_ID_OCTEONTX2_PTP 0xA00C
> > +#define PCI_DEVICE_ID_CN10K_PTP 0xA09E
> > +#define PCI_DEVICE_ID_OCTEONTX2_CGX 0xA059
> > +#define PCI_DEVICE_ID_CN10K_RPM 0xA060
> > +#define PCI_DEVICE_ID_OCTEONTX2_CPTPF 0xA0FD
> > +#define PCI_DEVICE_ID_OCTEONTX2_CPTVF 0xA0FE
> > +#define PCI_DEVICE_ID_CN10K_CPTPF 0xA0F2
> > +#define PCI_DEVICE_ID_CN10K_CPTVF 0xA0F3
> > +#define PCI_DEVICE_ID_OCTEONTX2_RVUAF 0xA065
> > +#define PCI_DEVICE_ID_OCTEONTX2_RVUPF 0xA063
> > +#define PCI_DEVICE_ID_OCTEONTX2_RVUVF 0xA064
> > +#define PCI_DEVICE_ID_OCTEONTX2_LBK 0xA061
> > +#define PCI_DEVICE_ID_OCTEONTX2_LBKVF 0xA0F8
> > +#define PCI_DEVICE_ID_OCTEONTX2_SDPPF 0xA0F6
> > +#define PCI_DEVICE_ID_OCTEONTX2_SDPVF 0xA0F7
>
> If I recall correctly, this file is for device IDs that are used in more
> than one subsystem. It is not supposed to be updated for every octeon device.
Right; if these are just used in one driver, the #define should go in
that driver to help make merges easier. If they're used in several
places, they can go here. But please:
- Include patches to the users in the series
- Include the "vendor" tag in the device #defines to avoid conflicts
- Use lower-case hex to match the surrounding context
Also consider adding these to https://pci-ids.ucw.cz/ in any case,
which will make "lspci" show useful names.
Bjorn
^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-02-14 12:25 [PATCH] PCI: Add Marvell Octeon devices to PCI IDs Sunil Goutham
2022-02-15 12:18 ` Leon Romanovsky
2022-02-15 15:28 ` Bjorn Helgaas
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