From: Lukas Wunner <lukas@wunner.de>
To: Dave Jiang <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
dan.j.williams@intel.com, ira.weiny@intel.com,
vishal.l.verma@intel.com, alison.schofield@intel.com,
Jonathan.Cameron@huawei.com, dave@stgolabs.net,
bhelgaas@google.com
Subject: Re: [PATCH 2/3] PCI: Create new reset method to force SBR for CXL
Date: Tue, 12 Mar 2024 08:50:10 +0100 [thread overview]
Message-ID: <ZfAJMggDhK3DaO3Q@wunner.de> (raw)
In-Reply-To: <20240311204132.62757-3-dave.jiang@intel.com>
On Mon, Mar 11, 2024 at 01:39:54PM -0700, Dave Jiang wrote:
> CXL spec r3.1 8.1.5.2
> By default Secondary Bus Reset (SBR) is masked for CXL ports. Introduce a
> new PCI reset method "cxl_bus_force" to force SBR on CXL ports by setting
> the unmask SBR bit in the CXL DVSEC port control register before performing
> the bus reset and restore the original value of the bit post reset.
Hm, why not have a sysfs attribute (or sysctl variable) to unmask SBR?
That would avoid the need to touch pci code as the sysfs attribute could
be kept local to the cxl subsystem.
Thanks,
Lukas
next prev parent reply other threads:[~2024-03-12 7:50 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-11 20:39 [PATCH 0/3] PCI: Add Secondary Bus Reset (SBR) support for CXL Dave Jiang
2024-03-11 20:39 ` [PATCH 1/3] PCI: Add check for CXL Secondary Bus Reset Dave Jiang
2024-03-12 7:30 ` Lukas Wunner
2024-03-12 21:35 ` Dave Jiang
2024-03-11 20:39 ` [PATCH 2/3] PCI: Create new reset method to force SBR for CXL Dave Jiang
2024-03-12 7:50 ` Lukas Wunner [this message]
2024-03-11 20:39 ` [PATCH 3/3] cxl: Add post reset warning if reset is detected as Secondary Bus Reset (SBR) Dave Jiang
2024-03-12 7:46 ` [PATCH 0/3] PCI: Add Secondary Bus Reset (SBR) support for CXL Lukas Wunner
2024-03-12 21:31 ` Dave Jiang
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