* [PATCH v9 0/2] PCI: Fix crash when access broken rom @ 2025-12-11 12:59 Guixin Liu 2025-12-11 12:59 ` [PATCH v9 1/2] PCI: Introduce named defines for pci rom Guixin Liu 2025-12-11 12:59 ` [PATCH v9 2/2] PCI: Check rom header and data structure addr before accessing Guixin Liu 0 siblings, 2 replies; 7+ messages in thread From: Guixin Liu @ 2025-12-11 12:59 UTC (permalink / raw) To: Bjorn Helgaas, Andy Shevchenko, Ilpo Järvinen; +Cc: linux-pci v8 -> v9: - Supplemental explanation for the commit body of the first patch. - Change PCI_ROM_IMAGE_LEN_UNIT_SZ_512 to PCI_ROM_IMAGE_LEN_UNIT_BYTES, and change it's definition to SZ_512. - Use u16 and u32 for signature val instead of unsigned short/int. v7 -> v8: - Ordered header files alphabetically. - Convert the literals too in the firt patch. - Use local val to save signature instead of reading twice. v6 -> v7: - Put all named defines to a separate patch. - Change PCI_ROM_IMAGE_LEN_UNIT_BYTES to PCI_ROM_IMAGE_LEN_UNIT_SZ_512. - Named BIT(7) to PCI_ROM_LAST_IMAGE_INDICATOR_BIT. - Fix all other comments from Ilpo, such as including header files, and alignment fault, Thanks. v5 -> v6: - Convert some magic number to named defines, suggested by Ilpo, thanks. v4 -> v5: - Add Andy Shevchenko's rb tag, thanks. - Change u64 to unsigned long. - Change pci_rom_header_valid() to pci_rom_is_header_valid() and change pci_rom_data_struct_valid() to pci_rom_is_data_struct_valid(). - Change rom_end from rom+size to rom+size-1 for more readble, and also change header_end >= rom_end to header_end > rom_end, same as data structure end. - Change if(!last_image) to if (last_image).. - Use U16_MAX instead of 0xffff. - Split check_add_overflow() from data_len checking. - Remove !!() when reading last_image, and Use BIT(7) instead of 0x80. v3 -> v4: - Use "u64" instead of "uintptr_t". - Invert the if statement to avoid excessive indentation. - Add comment for alignment checking. - Change last_image's type from int to bool. v2 -> v3: - Add pci_rom_header_valid() helper for checking image addr and signature. - Add pci_rom_data_struct_valid() helper for checking data struct add and signature. - Handle overflow issue when adding addr with size. - Handle alignment fault when running on arm64. v1 -> v2: - Fix commit body problems, such as blank line in "Call Trace" both sides, thanks, (Andy Shevchenko). - Remove every step checking, just check the addr is in header or data struct. - Add Suggested-by: Guanghui Feng <guanghuifeng@linux.alibaba.com> tag. Guixin Liu (2): PCI: Introduce named defines for pci rom PCI: Check rom header and data structure addr before accessing drivers/pci/rom.c | 138 ++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 115 insertions(+), 23 deletions(-) -- 2.43.0 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v9 1/2] PCI: Introduce named defines for pci rom 2025-12-11 12:59 [PATCH v9 0/2] PCI: Fix crash when access broken rom Guixin Liu @ 2025-12-11 12:59 ` Guixin Liu 2025-12-11 14:05 ` Andy Shevchenko 2025-12-11 12:59 ` [PATCH v9 2/2] PCI: Check rom header and data structure addr before accessing Guixin Liu 1 sibling, 1 reply; 7+ messages in thread From: Guixin Liu @ 2025-12-11 12:59 UTC (permalink / raw) To: Bjorn Helgaas, Andy Shevchenko, Ilpo Järvinen; +Cc: linux-pci Convert the magic numbers associated with PCI ROM into named definitions. Some of these definitions will be used in the second fix patch. Signed-off-by: Guixin Liu <kanie@linux.alibaba.com> --- drivers/pci/rom.c | 36 +++++++++++++++++++++++++----------- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c index e18d3a4383ba..e2e37a9090f1 100644 --- a/drivers/pci/rom.c +++ b/drivers/pci/rom.c @@ -5,13 +5,26 @@ * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> */ + +#include <linux/bits.h> #include <linux/kernel.h> #include <linux/export.h> #include <linux/pci.h> #include <linux/slab.h> +#include <linux/sizes.h> #include "pci.h" +#define PCI_ROM_HEADER_SIZE 0x1A +#define PCI_ROM_POINTER_TO_DATA_STRUCT 0x18 +#define PCI_ROM_LAST_IMAGE_INDICATOR 0x15 +#define PCI_ROM_LAST_IMAGE_INDICATOR_BIT BIT(7) +#define PCI_ROM_IMAGE_LEN 0x10 +#define PCI_ROM_IMAGE_LEN_UNIT_BYTES SZ_512 +#define PCI_ROM_IMAGE_SIGNATURE 0xAA55 +#define PCI_ROM_DATA_STRUCT_SIGNATURE 0x52494350 +#define PCI_ROM_DATA_STRUCT_LEN 0x0A + /** * pci_enable_rom - enable ROM decoding for a PCI device * @pdev: PCI device to enable @@ -91,26 +104,27 @@ static size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, do { void __iomem *pds; /* Standard PCI ROMs start out with these bytes 55 AA */ - if (readw(image) != 0xAA55) { - pci_info(pdev, "Invalid PCI ROM header signature: expecting 0xaa55, got %#06x\n", - readw(image)); + if (readw(image) != PCI_ROM_IMAGE_SIGNATURE) { + pci_info(pdev, "Invalid PCI ROM header signature: expecting %#06x, got %#06x\n", + PCI_ROM_IMAGE_SIGNATURE, readw(image)); break; } /* get the PCI data structure and check its "PCIR" signature */ - pds = image + readw(image + 24); - if (readl(pds) != 0x52494350) { - pci_info(pdev, "Invalid PCI ROM data signature: expecting 0x52494350, got %#010x\n", - readl(pds)); + pds = image + readw(image + PCI_ROM_POINTER_TO_DATA_STRUCT); + if (readl(pds) != PCI_ROM_DATA_STRUCT_SIGNATURE) { + pci_info(pdev, "Invalid PCI ROM data signature: expecting %#010x, got %#010x\n", + PCI_ROM_DATA_STRUCT_SIGNATURE, readl(pds)); break; } - last_image = readb(pds + 21) & 0x80; - length = readw(pds + 16); - image += length * 512; + last_image = readb(pds + PCI_ROM_LAST_IMAGE_INDICATOR) & + PCI_ROM_LAST_IMAGE_INDICATOR_BIT; + length = readw(pds + PCI_ROM_IMAGE_LEN); + image += length * PCI_ROM_IMAGE_LEN_UNIT_BYTES; /* Avoid iterating through memory outside the resource window */ if (image >= rom + size) break; if (!last_image) { - if (readw(image) != 0xAA55) { + if (readw(image) != PCI_ROM_IMAGE_SIGNATURE) { pci_info(pdev, "No more image in the PCI ROM\n"); break; } -- 2.43.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v9 1/2] PCI: Introduce named defines for pci rom 2025-12-11 12:59 ` [PATCH v9 1/2] PCI: Introduce named defines for pci rom Guixin Liu @ 2025-12-11 14:05 ` Andy Shevchenko 2025-12-12 1:57 ` Guixin Liu 0 siblings, 1 reply; 7+ messages in thread From: Andy Shevchenko @ 2025-12-11 14:05 UTC (permalink / raw) To: Guixin Liu; +Cc: Bjorn Helgaas, Ilpo Järvinen, linux-pci On Thu, Dec 11, 2025 at 08:59:05PM +0800, Guixin Liu wrote: > Convert the magic numbers associated with PCI ROM into named > definitions. Some of these definitions will be used in the second > fix patch. Please, give at least 24h between the versions in order other being able (quick enough) to review the changes. ... > +#include <linux/bits.h> > #include <linux/kernel.h> > #include <linux/export.h> > #include <linux/pci.h> > #include <linux/slab.h> > +#include <linux/sizes.h> 'i' goes before 'l', yeah it's hard to see in small monospace fonts. ... > +#define PCI_ROM_HEADER_SIZE 0x1A > +#define PCI_ROM_POINTER_TO_DATA_STRUCT 0x18 > +#define PCI_ROM_LAST_IMAGE_INDICATOR 0x15 > +#define PCI_ROM_LAST_IMAGE_INDICATOR_BIT BIT(7) > +#define PCI_ROM_IMAGE_LEN 0x10 > +#define PCI_ROM_IMAGE_LEN_UNIT_BYTES SZ_512 I'm a bit confused by the naming here. There are two definitions that end with _LEN, but the meaning of them is the offset where the respective "len" can be read from. Now, there is a _LEN_UNIT_BYTES, which seems related to _LEN, but in unclear way. With all the AA55 signature it pretty much sounds to me like a sector division (legacy from the era of floppies). That said, I would name the size of the "unit" as #define PCI_ROM_IMAGE_SECTOR_SIZE SZ_512 (without or with _BYTES on your choice, usually we don't use unit for bytes when there is no room for misinterpretation). > +#define PCI_ROM_IMAGE_SIGNATURE 0xAA55 Despite the below comment explains this, I would explicitly state it here /* Data structure signature is "PCIR" in ASCII representation */ > +#define PCI_ROM_DATA_STRUCT_SIGNATURE 0x52494350 > +#define PCI_ROM_DATA_STRUCT_LEN 0x0A -- With Best Regards, Andy Shevchenko ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v9 1/2] PCI: Introduce named defines for pci rom 2025-12-11 14:05 ` Andy Shevchenko @ 2025-12-12 1:57 ` Guixin Liu 0 siblings, 0 replies; 7+ messages in thread From: Guixin Liu @ 2025-12-12 1:57 UTC (permalink / raw) To: Andy Shevchenko; +Cc: Bjorn Helgaas, Ilpo Järvinen, linux-pci 在 2025/12/11 22:05, Andy Shevchenko 写道: > On Thu, Dec 11, 2025 at 08:59:05PM +0800, Guixin Liu wrote: >> Convert the magic numbers associated with PCI ROM into named >> definitions. Some of these definitions will be used in the second >> fix patch. > Please, give at least 24h between the versions in order other being able (quick > enough) to review the changes. > > ... OK, I will be more carefule next time. >> +#include <linux/bits.h> >> #include <linux/kernel.h> >> #include <linux/export.h> >> #include <linux/pci.h> >> #include <linux/slab.h> >> +#include <linux/sizes.h> > 'i' goes before 'l', yeah it's hard to see in small monospace fonts. > > ... OK, changed in v10. > >> +#define PCI_ROM_HEADER_SIZE 0x1A >> +#define PCI_ROM_POINTER_TO_DATA_STRUCT 0x18 >> +#define PCI_ROM_LAST_IMAGE_INDICATOR 0x15 >> +#define PCI_ROM_LAST_IMAGE_INDICATOR_BIT BIT(7) >> +#define PCI_ROM_IMAGE_LEN 0x10 >> +#define PCI_ROM_IMAGE_LEN_UNIT_BYTES SZ_512 > I'm a bit confused by the naming here. > > There are two definitions that end with _LEN, but the meaning of them is > the offset where the respective "len" can be read from. > > Now, there is a _LEN_UNIT_BYTES, which seems related to _LEN, but in unclear > way. > > With all the AA55 signature it pretty much sounds to me like a sector division > (legacy from the era of floppies). > > That said, I would name the size of the "unit" as > > #define PCI_ROM_IMAGE_SECTOR_SIZE SZ_512 > > (without or with _BYTES on your choice, usually we don't use unit for bytes > when there is no room for misinterpretation). OK, I will change this to PCI_ROM_IMAGE_SECTOR_SIZE in next version. >> +#define PCI_ROM_IMAGE_SIGNATURE 0xAA55 > Despite the below comment explains this, I would explicitly state it here > > /* Data structure signature is "PCIR" in ASCII representation */ Added in v10, thanks. Best Regards, Guixin Liu >> +#define PCI_ROM_DATA_STRUCT_SIGNATURE 0x52494350 >> +#define PCI_ROM_DATA_STRUCT_LEN 0x0A ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v9 2/2] PCI: Check rom header and data structure addr before accessing 2025-12-11 12:59 [PATCH v9 0/2] PCI: Fix crash when access broken rom Guixin Liu 2025-12-11 12:59 ` [PATCH v9 1/2] PCI: Introduce named defines for pci rom Guixin Liu @ 2025-12-11 12:59 ` Guixin Liu 2025-12-11 14:07 ` Andy Shevchenko 1 sibling, 1 reply; 7+ messages in thread From: Guixin Liu @ 2025-12-11 12:59 UTC (permalink / raw) To: Bjorn Helgaas, Andy Shevchenko, Ilpo Järvinen; +Cc: linux-pci We meet a crash when running stress-ng on x86_64 machine: BUG: unable to handle page fault for address: ffa0000007f40000 RIP: 0010:pci_get_rom_size+0x52/0x220 Call Trace: <TASK> pci_map_rom+0x80/0x130 pci_read_rom+0x4b/0xe0 kernfs_file_read_iter+0x96/0x180 vfs_read+0x1b1/0x300 Our analysis reveals that the rom space's start address is 0xffa0000007f30000, and size is 0x10000. Because of broken rom space, before calling readl(pds), the pds's value is 0xffa0000007f3ffff, which is already pointed to the rom space end, invoking readl() would read 4 bytes therefore cause an out-of-bounds access and trigger a crash. Fix this by adding image header and data structure checking. We also found another crash on arm64 machine: Unable to handle kernel paging request at virtual address ffff8000dd1393ff Mem abort info: ESR = 0x0000000096000021 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 FSC = 0x21: alignment fault The call trace is the same with x86_64, but the crash reason is that the data structure addr is not aligned with 4, and arm64 machine report "alignment fault". Fix this by adding alignment checking. Fixes: 47b975d234ea ("PCI: Avoid iterating through memory outside the resource window") Suggested-by: Guanghui Feng <guanghuifeng@linux.alibaba.com> Signed-off-by: Guixin Liu <kanie@linux.alibaba.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> --- drivers/pci/rom.c | 116 ++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 97 insertions(+), 19 deletions(-) diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c index e2e37a9090f1..658536861785 100644 --- a/drivers/pci/rom.c +++ b/drivers/pci/rom.c @@ -6,9 +6,12 @@ * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> */ +#include <linux/align.h> #include <linux/bits.h> -#include <linux/kernel.h> #include <linux/export.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/overflow.h> #include <linux/pci.h> #include <linux/slab.h> #include <linux/sizes.h> @@ -82,6 +85,91 @@ void pci_disable_rom(struct pci_dev *pdev) } EXPORT_SYMBOL_GPL(pci_disable_rom); +static bool pci_rom_is_header_valid(struct pci_dev *pdev, + void __iomem *image, + void __iomem *rom, + size_t size, + bool last_image) +{ + unsigned long rom_end = (unsigned long)rom + size - 1; + unsigned long header_end; + u16 signature; + + /* + * Some CPU architectures require IOMEM access addresses to + * be aligned, for example arm64, so since we're about to + * call readw(), we check here for 2-byte alignment. + */ + if (!IS_ALIGNED((unsigned long)image, 2)) + return false; + + if (check_add_overflow((unsigned long)image, PCI_ROM_HEADER_SIZE, + &header_end)) + return false; + + if (image < rom || header_end > rom_end) + return false; + + /* Standard PCI ROMs start out with these bytes 55 AA */ + signature = readw(image); + if (signature == PCI_ROM_IMAGE_SIGNATURE) + return true; + + if (last_image) { + pci_info(pdev, "Invalid PCI ROM header signature: expecting %#06x, got %#06x\n", + PCI_ROM_IMAGE_SIGNATURE, signature); + } else { + pci_info(pdev, "No more image in the PCI ROM\n"); + } + + return false; +} + +static bool pci_rom_is_data_struct_valid(struct pci_dev *pdev, + void __iomem *pds, + void __iomem *rom, + size_t size) +{ + unsigned long rom_end = (unsigned long)rom + size - 1; + unsigned long end; + u32 signature; + u16 data_len; + + /* + * Some CPU architectures require IOMEM access addresses to + * be aligned, for example arm64, so since we're about to + * call readl(), we check here for 4-byte alignment. + */ + if (!IS_ALIGNED((unsigned long)pds, 4)) + return false; + + /* Before reading length, check addr range. */ + if (check_add_overflow((unsigned long)pds, PCI_ROM_DATA_STRUCT_LEN + 1, + &end)) + return false; + + if (pds < rom || end > rom_end) + return false; + + data_len = readw(pds + PCI_ROM_DATA_STRUCT_LEN); + if (!data_len || data_len == U16_MAX) + return false; + + if (check_add_overflow((unsigned long)pds, data_len, &end)) + return false; + + if (end > rom_end) + return false; + + signature = readl(pds); + if (signature == PCI_ROM_DATA_STRUCT_SIGNATURE) + return true; + + pci_info(pdev, "Invalid PCI ROM data signature: expecting %#010x, got %#010x\n", + PCI_ROM_DATA_STRUCT_SIGNATURE, signature); + return false; +} + /** * pci_get_rom_size - obtain the actual size of the ROM image * @pdev: target PCI device @@ -97,38 +185,28 @@ static size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size) { void __iomem *image; - int last_image; unsigned int length; + bool last_image; image = rom; do { void __iomem *pds; - /* Standard PCI ROMs start out with these bytes 55 AA */ - if (readw(image) != PCI_ROM_IMAGE_SIGNATURE) { - pci_info(pdev, "Invalid PCI ROM header signature: expecting %#06x, got %#06x\n", - PCI_ROM_IMAGE_SIGNATURE, readw(image)); + + if (!pci_rom_is_header_valid(pdev, image, rom, size, true)) break; - } + /* get the PCI data structure and check its "PCIR" signature */ pds = image + readw(image + PCI_ROM_POINTER_TO_DATA_STRUCT); - if (readl(pds) != PCI_ROM_DATA_STRUCT_SIGNATURE) { - pci_info(pdev, "Invalid PCI ROM data signature: expecting %#010x, got %#010x\n", - PCI_ROM_DATA_STRUCT_SIGNATURE, readl(pds)); + if (!pci_rom_is_data_struct_valid(pdev, pds, rom, size)) break; - } + last_image = readb(pds + PCI_ROM_LAST_IMAGE_INDICATOR) & PCI_ROM_LAST_IMAGE_INDICATOR_BIT; length = readw(pds + PCI_ROM_IMAGE_LEN); image += length * PCI_ROM_IMAGE_LEN_UNIT_BYTES; - /* Avoid iterating through memory outside the resource window */ - if (image >= rom + size) + + if (!pci_rom_is_header_valid(pdev, image, rom, size, last_image)) break; - if (!last_image) { - if (readw(image) != PCI_ROM_IMAGE_SIGNATURE) { - pci_info(pdev, "No more image in the PCI ROM\n"); - break; - } - } } while (length && !last_image); /* never return a size larger than the PCI resource window */ -- 2.43.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v9 2/2] PCI: Check rom header and data structure addr before accessing 2025-12-11 12:59 ` [PATCH v9 2/2] PCI: Check rom header and data structure addr before accessing Guixin Liu @ 2025-12-11 14:07 ` Andy Shevchenko 2025-12-12 1:58 ` Guixin Liu 0 siblings, 1 reply; 7+ messages in thread From: Andy Shevchenko @ 2025-12-11 14:07 UTC (permalink / raw) To: Guixin Liu; +Cc: Bjorn Helgaas, Ilpo Järvinen, linux-pci On Thu, Dec 11, 2025 at 08:59:06PM +0800, Guixin Liu wrote: > We meet a crash when running stress-ng on x86_64 machine: > > BUG: unable to handle page fault for address: ffa0000007f40000 > RIP: 0010:pci_get_rom_size+0x52/0x220 > Call Trace: > <TASK> > pci_map_rom+0x80/0x130 > pci_read_rom+0x4b/0xe0 > kernfs_file_read_iter+0x96/0x180 > vfs_read+0x1b1/0x300 > > Our analysis reveals that the rom space's start address is > 0xffa0000007f30000, and size is 0x10000. Because of broken rom > space, before calling readl(pds), the pds's value is > 0xffa0000007f3ffff, which is already pointed to the rom space > end, invoking readl() would read 4 bytes therefore cause an > out-of-bounds access and trigger a crash. > Fix this by adding image header and data structure checking. > > We also found another crash on arm64 machine: > > Unable to handle kernel paging request at virtual address > ffff8000dd1393ff > Mem abort info: > ESR = 0x0000000096000021 > EC = 0x25: DABT (current EL), IL = 32 bits > SET = 0, FnV = 0 > EA = 0, S1PTW = 0 > FSC = 0x21: alignment fault > > The call trace is the same with x86_64, but the crash reason is > that the data structure addr is not aligned with 4, and arm64 > machine report "alignment fault". Fix this by adding alignment > checking. ... > +#include <linux/align.h> > #include <linux/bits.h> > -#include <linux/kernel.h> > #include <linux/export.h> > +#include <linux/io.h> > +#include <linux/kernel.h> > +#include <linux/overflow.h> > #include <linux/pci.h> > #include <linux/slab.h> > #include <linux/sizes.h> I would not touch kernel.h position in this patch. The real change (a third one if you wish to make that) should replace kernel.h with real includes, making it disappear. Now this move is unneeded churn. -- With Best Regards, Andy Shevchenko ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v9 2/2] PCI: Check rom header and data structure addr before accessing 2025-12-11 14:07 ` Andy Shevchenko @ 2025-12-12 1:58 ` Guixin Liu 0 siblings, 0 replies; 7+ messages in thread From: Guixin Liu @ 2025-12-12 1:58 UTC (permalink / raw) To: Andy Shevchenko; +Cc: Bjorn Helgaas, Ilpo Järvinen, linux-pci 在 2025/12/11 22:07, Andy Shevchenko 写道: > On Thu, Dec 11, 2025 at 08:59:06PM +0800, Guixin Liu wrote: >> We meet a crash when running stress-ng on x86_64 machine: >> >> BUG: unable to handle page fault for address: ffa0000007f40000 >> RIP: 0010:pci_get_rom_size+0x52/0x220 >> Call Trace: >> <TASK> >> pci_map_rom+0x80/0x130 >> pci_read_rom+0x4b/0xe0 >> kernfs_file_read_iter+0x96/0x180 >> vfs_read+0x1b1/0x300 >> >> Our analysis reveals that the rom space's start address is >> 0xffa0000007f30000, and size is 0x10000. Because of broken rom >> space, before calling readl(pds), the pds's value is >> 0xffa0000007f3ffff, which is already pointed to the rom space >> end, invoking readl() would read 4 bytes therefore cause an >> out-of-bounds access and trigger a crash. >> Fix this by adding image header and data structure checking. >> >> We also found another crash on arm64 machine: >> >> Unable to handle kernel paging request at virtual address >> ffff8000dd1393ff >> Mem abort info: >> ESR = 0x0000000096000021 >> EC = 0x25: DABT (current EL), IL = 32 bits >> SET = 0, FnV = 0 >> EA = 0, S1PTW = 0 >> FSC = 0x21: alignment fault >> >> The call trace is the same with x86_64, but the crash reason is >> that the data structure addr is not aligned with 4, and arm64 >> machine report "alignment fault". Fix this by adding alignment >> checking. > ... > >> +#include <linux/align.h> >> #include <linux/bits.h> >> -#include <linux/kernel.h> >> #include <linux/export.h> >> +#include <linux/io.h> >> +#include <linux/kernel.h> >> +#include <linux/overflow.h> >> #include <linux/pci.h> >> #include <linux/slab.h> >> #include <linux/sizes.h> > I would not touch kernel.h position in this patch. The real change (a third one > if you wish to make that) should replace kernel.h with real includes, making it > disappear. Now this move is unneeded churn. > OK, I will not touch kernel.h in v10. Best Regards, Guixin Liu ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2025-12-12 2:02 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-12-11 12:59 [PATCH v9 0/2] PCI: Fix crash when access broken rom Guixin Liu 2025-12-11 12:59 ` [PATCH v9 1/2] PCI: Introduce named defines for pci rom Guixin Liu 2025-12-11 14:05 ` Andy Shevchenko 2025-12-12 1:57 ` Guixin Liu 2025-12-11 12:59 ` [PATCH v9 2/2] PCI: Check rom header and data structure addr before accessing Guixin Liu 2025-12-11 14:07 ` Andy Shevchenko 2025-12-12 1:58 ` Guixin Liu
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