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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Raag Jadav <raag.jadav@intel.com>
Cc: <dave@stgolabs.net>, <jic23@kernel.org>, <dave.jiang@intel.com>,
	<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
	<djbw@kernel.org>, <iweiny@kernel.org>, <ming.li@zohomail.com>,
	<bhelgaas@google.com>, <linux-cxl@vger.kernel.org>,
	<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<intel-xe@lists.freedesktop.org>, <lukas@wunner.de>,
	<riana.tauro@intel.com>, <michal.wajdeczko@intel.com>,
	<matthew.d.roper@intel.com>
Subject: Re: [PATCH v2 1/2] PCI/AER: Export pcie_aer_is_native() to AER namespace
Date: Tue, 25 Aug 2026 10:18:09 -0400	[thread overview]
Message-ID: <ao2kIepOqKnJUgVq@intel.com> (raw)
In-Reply-To: <20260825054312.1319951-2-raag.jadav@intel.com>

On Tue, Aug 25, 2026 at 11:12:50AM +0530, Raag Jadav wrote:
> pcie_aer_is_native() was originally exported to CXL namespace in commit
> 49f776724e64 ("PCI/AER: Export pcie_aer_is_native()"). This is a bit
> misleading as the symbol or its underlying implementation does not reflect
> any distinguishable CXL functionality.
> 
> Change this and export pcie_aer_is_native() to AER namespace, which is
> cleaner and more suitable for its implementation.
> 
> Suggested-by: Lukas Wunner <lukas@wunner.de>
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> ---
>  drivers/cxl/port.c     | 1 +
>  drivers/pci/pcie/aer.c | 2 +-

PCI and CXL folks, ack to get this through drm-next branches towards 7.4?
Or any of you wanting to pull this through your trees for 7.3-rc1?

Thanks,
Rodrigo.

btw:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

>  2 files changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
> index 99cf77b6b699..00f675163b3d 100644
> --- a/drivers/cxl/port.c
> +++ b/drivers/cxl/port.c
> @@ -340,5 +340,6 @@ module_exit(cxl_port_exit);
>  
>  MODULE_DESCRIPTION("CXL: Port enumeration and services");
>  MODULE_LICENSE("GPL v2");
> +MODULE_IMPORT_NS("AER");
>  MODULE_IMPORT_NS("CXL");
>  MODULE_ALIAS_CXL(CXL_DEVICE_PORT);
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index c4fd9c0b2a54..8660b18bac8b 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -248,7 +248,7 @@ int pcie_aer_is_native(struct pci_dev *dev)
>  
>  	return pcie_ports_native || host->native_aer;
>  }
> -EXPORT_SYMBOL_NS_GPL(pcie_aer_is_native, "CXL");
> +EXPORT_SYMBOL_NS_GPL(pcie_aer_is_native, "AER");
>  
>  static int pci_enable_pcie_error_reporting(struct pci_dev *dev)
>  {
> -- 
> 2.43.0
> 

  parent reply	other threads:[~2026-08-25 14:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-25  5:42 [PATCH v2 0/2] Export pcie_aer_is_native() to AER namespace Raag Jadav
2026-08-25  5:42 ` [PATCH v2 1/2] PCI/AER: " Raag Jadav
2026-08-25  5:49   ` sashiko-bot
2026-08-25 14:18   ` Rodrigo Vivi [this message]
2026-08-25 15:05     ` Dave Jiang
2026-08-25 15:25       ` Rodrigo Vivi
2026-08-25 15:41         ` Dave Jiang
2026-08-25 15:00   ` Dave Jiang
2026-08-25  5:42 ` [PATCH v2 2/2] drm/xe/ras: Enable SGUnit PCIe error reporting Raag Jadav
2026-08-25  5:58   ` sashiko-bot
2026-08-26 21:26   ` Bjorn Helgaas

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