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From: Christian Bruel <christian.bruel@foss.st.com>
To: Bjorn Helgaas <helgaas@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: <lpieralisi@kernel.org>, <kw@linux.com>,
	<manivannan.sadhasivam@linaro.org>, <bhelgaas@google.com>,
	<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<mcoquelin.stm32@gmail.com>, <alexandre.torgue@foss.st.com>,
	<p.zabel@pengutronix.de>, <cassel@kernel.org>,
	<quic_schintav@quicinc.com>, <fabrice.gasnier@foss.st.com>,
	<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/5] dt-bindings: PCI: Add STM32MP25 PCIe root complex bindings
Date: Tue, 17 Dec 2024 16:53:48 +0100	[thread overview]
Message-ID: <d976d74c-80c0-4446-bb9b-960a990c552b@foss.st.com> (raw)
In-Reply-To: <20241205172022.GA3053765@bhelgaas>


> Makes sense.  What about phys, resets, etc?  I'm pretty sure a PHY
> would be a per-Root Port thing, and some resets and wakeup signals
> also.
> 
> For new drivers, I think we should start adding Root Port stanzas to
> specifically associate those things with the Root Port, e.g.,
> something like this?
> 
>    pcie@48400000 {
>      compatible = "st,stm32mp25-pcie-rc";
> 
>      pcie@0,0 {
>        reg = <0x0000 0 0 0 0>;
>        phys = <&combophy PHY_TYPE_PCIE>;
>        phy-names = "pcie-phy";
>      };
>    };
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml?id=v6.12#n111
> is one binding that does this, others include apple,pcie.yaml,
> brcm,stb-pcie.yaml, hisilicon,kirin-pcie.yaml.
> 

On a second thought, moving the PHY to the root-port part would 
introduce a discrepancy with the pcie_ep binding, whereas the PHY is 
required on the pcie_ep node.

Even for the pcie_rc, the PHY is needed to enable the core_clk to access
the PCIe core registers,

So that would make 2 different required PHY locations for RC and EP:

     pcie_rc: pcie@48400000 {
       compatible = "st,stm32mp25-pcie-rc";

       pcie@0,0 {
         reg = <0x0000 0 0 0 0>;
         phys = <&combophy PHY_TYPE_PCIE>;
         phy-names = "pcie-phy";
       };
     };

     pcie_ep pcie@48400000 {
       compatible = "st,stm32mp25-pcie-ep";
       phys = <&combophy PHY_TYPE_PCIE>;
       phy-names = "pcie-phy";
     };

Simplest seems to keep the PHY required for the pcie core regardless of 
the mode and keep the empty root port to split the design

     pcie_rc: pcie@48400000 {
       compatible = "st,stm32mp25-pcie-rc";
       phys = <&combophy PHY_TYPE_PCIE>;
       phy-names = "pcie-phy";

         pcie@0,0 {
         reg = <0x0000 0 0 0 0>;
       };
     };

     pcie_ep: pcie@48400000 {
       compatible = "st,stm32mp25-pcie-ep";
       phys = <&combophy PHY_TYPE_PCIE>;
       phy-names = "pcie-phy";
     };

But I have no experience with multiple root-port systems, I'm open for 
the best :)

Thanks

Christian

  reply	other threads:[~2024-12-17 15:57 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-26 15:51 [PATCH v2 0/5] Add STM32MP25 PCIe drivers Christian Bruel
2024-11-26 15:51 ` [PATCH v2 1/5] dt-bindings: PCI: Add STM32MP25 PCIe root complex bindings Christian Bruel
2024-11-27 14:50   ` Rob Herring
2024-12-03 13:34   ` Manivannan Sadhasivam
2024-12-03 16:55     ` Christian Bruel
2024-12-03 22:25   ` Bjorn Helgaas
2024-12-05 13:41     ` Christian Bruel
2024-12-05 17:20       ` Bjorn Helgaas
2024-12-17 15:53         ` Christian Bruel [this message]
2024-12-17 17:25           ` Manivannan Sadhasivam
2024-12-18  8:42             ` Christian Bruel
2024-12-18  9:06               ` Manivannan Sadhasivam
2024-12-17 17:20     ` Manivannan Sadhasivam
2024-12-05 17:23   ` Bjorn Helgaas
2024-11-26 15:51 ` [PATCH v2 2/5] PCI: stm32: Add PCIe host support for STM32MP25 Christian Bruel
2024-11-29 20:58   ` Bjorn Helgaas
2024-11-29 21:18     ` Lucas Stach
2024-12-05 11:46       ` Christian Bruel
2024-12-03 14:52   ` Manivannan Sadhasivam
2024-12-16  9:00     ` Christian Bruel
2024-12-18  9:46       ` Manivannan Sadhasivam
2024-12-18 11:24         ` Christian Bruel
2024-12-18 11:46           ` Manivannan Sadhasivam
2024-12-09  4:34   ` kernel test robot
2024-11-26 15:51 ` [PATCH v2 3/5] dt-bindings: PCI: Add STM32MP25 PCIe endpoint bindings Christian Bruel
2024-11-27 14:51   ` Rob Herring
2024-11-27 14:59   ` Rob Herring (Arm)
2024-12-03 14:54   ` Manivannan Sadhasivam
2024-11-26 15:51 ` [PATCH v2 4/5] PCI: stm32: Add PCIe endpoint support for STM32MP25 Christian Bruel
2024-12-03 15:22   ` Manivannan Sadhasivam
2024-12-16 10:02     ` Christian Bruel
2024-12-16 16:17       ` Manivannan Sadhasivam
2024-12-17  9:48         ` Christian Bruel
2024-12-18  9:08           ` Manivannan Sadhasivam
2024-12-18  9:21             ` Christian Bruel
2025-01-10 15:33         ` Christian Bruel
2025-01-10 14:49     ` Christian Bruel
2024-12-05 17:27   ` Bjorn Helgaas
2024-12-16 14:00     ` Christian Bruel
2025-01-14 17:05       ` Bjorn Helgaas
2025-01-14 12:10     ` Christian Bruel
2024-11-26 15:51 ` [PATCH v2 5/5] MAINTAINERS: add entry for ST STM32MP25 PCIe drivers Christian Bruel

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