From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Will Deacon" <will@kernel.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, jonathanh@nvidia.com
Subject: Re: [PATCH 2/3] PCI: dwc: Use common D3cold eligibility helper in suspend path
Date: Thu, 29 Jan 2026 11:00:26 +0530 [thread overview]
Message-ID: <f6f860b7-71fe-4fea-84ed-a93b9598ce06@oss.qualcomm.com> (raw)
In-Reply-To: <oygssx4tnd7uwofk4ucqj2ypok2zssnzbauzar2f65lzougr3a@vp6b7y4j56k3>
On 1/28/2026 7:58 PM, Bjorn Andersson wrote:
> On Wed, Jan 28, 2026 at 05:10:42PM +0530, Krishna Chaitanya Chundru wrote:
>> Previously, the driver skipped putting the link into L2/device state in
>> D3cold whenever L1 ASPM was enabled, since some devices (e.g. NVMe) expect
>> low resume latency and may not tolerate deeper power states. However, such
>> devices typically remain in D0 and are already covered by the new helper's
>> requirement that all endpoints be in D3hot before the host bridge may
>> enter D3cold.
>>
>> So, replace the local L1/L1SS-based check in dw_pcie_suspend_noirq() with
>> the shared pci_host_common_can_enter_d3cold() helper to decide whether the
>> DesignWare host bridge can safely transition to D3cold.
>>
>> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
>> ---
>> drivers/pci/controller/dwc/pcie-designware-host.c | 7 +------
>> drivers/pci/controller/dwc/pcie-designware.h | 1 +
>> 2 files changed, 2 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
>> index 372207c33a857b4c98572bb1e9b61fa0080bc871..2c8056761addf7febc1b0e06ddf8ba4dd4ad1684 100644
>> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
>> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
>> @@ -1157,15 +1157,10 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci)
>>
>> int dw_pcie_suspend_noirq(struct dw_pcie *pci)
>> {
>> - u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
>> u32 val;
>> int ret;
>>
>> - /*
>> - * If L1SS is supported, then do not put the link into L2 as some
>> - * devices such as NVMe expect low resume latency.
>> - */
>> - if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1)
>> + if (!pci_host_common_can_enter_d3cold(pci->pp.bridge))
>> return 0;
>>
>> if (pci->pp.ops->pme_turn_off) {
>> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
>> index 31685951a080456b8834aab2bf79a36c78f46639..18d8f7d5d23088b2fa177e84a21d900c98850fcd 100644
>> --- a/drivers/pci/controller/dwc/pcie-designware.h
>> +++ b/drivers/pci/controller/dwc/pcie-designware.h
>> @@ -26,6 +26,7 @@
>> #include <linux/pci-epc.h>
>> #include <linux/pci-epf.h>
>>
>> +#include "../pci-host-common.h"
> Why doesn't this include go in the c file? I don't see that all c files
Ack, will do this in v2.
- Krishna Chaitanya.
> including pcie-designware.h now needs this.
>
> Regards,
> Bjorn
>
>> #include "../../pci.h"
>>
>> /* DWC PCIe IP-core versions (native support since v4.70a) */
>>
>> --
>> 2.34.1
>>
>>
next prev parent reply other threads:[~2026-01-29 5:30 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-28 11:40 [PATCH 0/3] PCI: qcom: Add D3cold support Krishna Chaitanya Chundru
2026-01-28 11:40 ` [PATCH 1/3] PCI: host-common: Add shared D3cold eligibility helper for host bridges Krishna Chaitanya Chundru
2026-01-28 14:26 ` Bjorn Andersson
2026-01-29 5:38 ` Krishna Chaitanya Chundru
2026-01-30 3:30 ` Bjorn Andersson
2026-01-28 11:40 ` [PATCH 2/3] PCI: dwc: Use common D3cold eligibility helper in suspend path Krishna Chaitanya Chundru
2026-01-28 14:28 ` Bjorn Andersson
2026-01-29 5:30 ` Krishna Chaitanya Chundru [this message]
2026-01-28 11:40 ` [PATCH 3/3] PCI: qcom: Add D3cold support Krishna Chaitanya Chundru
2026-01-28 12:28 ` Konrad Dybcio
2026-01-29 5:27 ` Krishna Chaitanya Chundru
2026-01-30 11:21 ` Konrad Dybcio
2026-01-28 14:47 ` Bjorn Andersson
2026-01-29 5:29 ` Krishna Chaitanya Chundru
2026-01-28 14:55 ` [PATCH 0/3] " Bjorn Andersson
2026-01-29 5:23 ` Krishna Chaitanya Chundru
2026-01-30 3:39 ` Bjorn Andersson
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