[PATCH v2 0/2] PCI/PM: Disable bridge D3 on a few devices

[PATCH v2 0/2] PCI/PM: Disable bridge D3 on a few devices

[Mario Limonciello]

A few devices have been reported over the past few cycles
to have problems with bridges at D3. This series adds them
to the block list for the feature.  See individual patches
for details.

Signed-off-by: Mario Limonciello <superm1@kernel.org>
---
Changes in v2:
- Pick up tags (Rafael)
- Correct URL in comment (Sashiko)
- Rebase on v7.4-rc2
- Link to v1: https://patch.msgid.link/20261102-superm1-kbz-222179-v1-0-c91a664ba251@kernel.org

---
Mario Limonciello (2):
      PCI/PM: Disable bridge D3 on Lenovo ThinkCentre M90n-1
      PCI/PM: Avoid D3cold for HP Spectre x360 Convertible 15-ch0xx PCIe Ports

 drivers/pci/pci.c | 36 +++++++++++++++++++++++++++++++++---
 1 file changed, 33 insertions(+), 3 deletions(-)
---
base-commit: 7475ea8b58616b33c04afb976cf0fbaad9dd63fb
change-id: 20261028-superm1-kbz-222179-4898547adf80

Best regards,
--  
Mario Limonciello <superm1@kernel.org>

[PATCH v2 1/2] PCI/PM: Disable bridge D3 on Lenovo ThinkCentre M90n-1

[Mario Limonciello]

On the Lenovo ThinkCentre M90n-1 (board 314D), suspending the empty
Root Port 9 turns off a clock needed by the onboard RTL8168 behind
Root Port 12.  The NIC becomes inaccessible and r8169 fails to probe
with "Unable to change power state from D3cold to D0".

The RP09.PXP_._OFF method gates PCH SRC clock 1, which also supplies
the NIC behind Root Port 12.  Keeping Root Port 9 in D0 preserves
that clock and allows the NIC to probe.  Commit 4d4c10f763d7 ("PCI:
Explicitly put devices into D0 when initializing") exposed the firmware
bug on every boot by ensuring that the first runtime suspend executes
the power resource's _OFF method.

Add the board to bridge_d3_blacklist to prevent bridge D3 transitions.
Check the blacklist before platform_pci_bridge_d3(), since ACPI allows
D3 on the affected hotplug port and would otherwise bypass the quirk.

Fixes: 4d4c10f763d7 ("PCI: Explicitly put devices into D0 when initializing")
Reported-by: Joshua Perry <josh@6bit.com>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=222179
Cc: stable@vger.kernel.org
Reviewed-by: Rafael J. Wysocki (Intel) <rafael@kernel.org>
Signed-off-by: Mario Limonciello <superm1@kernel.org>
---
 drivers/pci/pci.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 7c6f2aba81443..17ec7f065682d 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3028,6 +3028,17 @@ static const struct dmi_system_id bridge_d3_blacklist[] = {
 			DMI_MATCH(DMI_BOARD_VERSION, "95.33"),
 		},
 	},
+	{
+		/*
+		 * Suspending Root Port 9 gates a clock used by the onboard
+		 * RTL8168 behind Root Port 12, making the NIC inaccessible.
+		 */
+		.ident = "Lenovo ThinkCentre M90n-1",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
+			DMI_MATCH(DMI_BOARD_NAME, "314D"),
+		},
+	},
 #endif
 	{ }
 };
@@ -3073,6 +3084,10 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
 		if (bridge->is_thunderbolt)
 			return true;
 
+		/* Firmware D3 support does not override known platform bugs. */
+		if (dmi_check_system(bridge_d3_blacklist))
+			return false;
+
 		/* Platform might know better if the bridge supports D3 */
 		if (platform_pci_bridge_d3(bridge))
 			return true;
@@ -3085,9 +3100,6 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
 		if (IS_ENABLED(CONFIG_X86) && bridge->is_pciehp)
 			return false;
 
-		if (dmi_check_system(bridge_d3_blacklist))
-			return false;
-
 		/*
 		 * Out of caution, we only allow PCIe ports from 2015 or newer
 		 * into D3 on x86.

-- 
2.53.0

Re: [PATCH v2 1/2] PCI/PM: Disable bridge D3 on Lenovo ThinkCentre M90n-1

[sashiko-bot]

> On the Lenovo ThinkCentre M90n-1 (board 314D), suspending the empty
> Root Port 9 turns off a clock needed by the onboard RTL8168 behind
> Root Port 12.  The NIC becomes inaccessible and r8169 fails to probe
> with "Unable to change power state from D3cold to D0".
> 
> The RP09.PXP_._OFF method gates PCH SRC clock 1, which also supplies
> the NIC behind Root Port 12.  Keeping Root Port 9 in D0 preserves
> that clock and allows the NIC to probe.  Commit 4d4c10f763d7 ("PCI:
> Explicitly put devices into D0 when initializing") exposed the firmware
> bug on every boot by ensuring that the first runtime suspend executes
> the power resource's _OFF method.
> 
> Add the board to bridge_d3_blacklist to prevent bridge D3 transitions.
> Check the blacklist before platform_pci_bridge_d3(), since ACPI allows
> D3 on the affected hotplug port and would otherwise bypass the quirk.
> 
> Fixes: 4d4c10f763d7 ("PCI: Explicitly put devices into D0 when initializing")
> Reported-by: Joshua Perry <josh@6bit.com>
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=222179
> Cc: stable@vger.kernel.org
> Reviewed-by: Rafael J. Wysocki (Intel) <rafael@kernel.org>
> Signed-off-by: Mario Limonciello <superm1@kernel.org>

Sashiko has reviewed this patch and found no issues.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110-superm1-kbz-222179-v2-0-5605e6ce6454@kernel.org?part=1

[PATCH v2 2/2] PCI/PM: Avoid D3cold for HP Spectre x360 Convertible 15-ch0xx PCIe Ports

[Mario Limonciello]

HP Spectre x360 Convertible 15-ch0xx is an Intel Kaby Lake-G system that
contains an AMD Polaris Radeon dGPU.
Attempting to use the dGPU fails with the following sequence:

```
  amdgpu 0000:01:00.0: not ready 1023ms after resume; waiting
  amdgpu 0000:01:00.0: not ready 2047ms after resume; waiting
  amdgpu 0000:01:00.0: not ready 4095ms after resume; waiting
  amdgpu 0000:01:00.0: not ready 8191ms after resume; waiting
  amdgpu 0000:01:00.0: not ready 16383ms after resume; waiting
  amdgpu 0000:01:00.0: not ready 32767ms after resume; waiting
  amdgpu 0000:01:00.0: not ready 65535ms after resume; giving up
  amdgpu 0000:01:00.0: Unable to change power state from D3cold to D0, device inaccessible
  [drm:atom_op_jump [amdgpu]] *ERROR* atombios stuck in loop for more than 20secs aborting
```

The issue is that the Root Port the dGPU is connected to can't handle the
transition from D3cold to D0 so the dGPU can't properly exit runtime PM.

The existing logic in pci_bridge_d3_possible() checks for systems that are
newer than 2015 to decide that D3 is safe, but this system appears not to
work properly.

Add the system to bridge_d3_blacklist to prevent D3cold from being used.

Reported-and-tested-by: Tony Murray <murraytony@gmail.com>
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3389
Acked-by: Rafael J. Wysocki (Intel) <rafael@kernel.org>
Signed-off-by: Mario Limonciello <superm1@kernel.org>
---
 drivers/pci/pci.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 17ec7f065682d..6bd84b9809c8d 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3039,6 +3039,24 @@ static const struct dmi_system_id bridge_d3_blacklist[] = {
 			DMI_MATCH(DMI_BOARD_NAME, "314D"),
 		},
 	},
+	{
+		/*
+		 * Changing power state of root port dGPU is connected fails
+		 * https://gitlab.freedesktop.org/drm/amd/-/work_items/3389
+		 */
+		.ident = "HP Spectre x360 Convertible 15-ch0xx",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "HP"),
+			DMI_MATCH(DMI_BOARD_NAME, "83BB"),
+		},
+	},
+	{
+		.ident = "HP ZBook 15 G4",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "HP"),
+			DMI_MATCH(DMI_BOARD_NAME, "HP ZBook 15 G4"),
+		},
+	},
 #endif
 	{ }
 };

-- 
2.53.0

Re: [PATCH v2 2/2] PCI/PM: Avoid D3cold for HP Spectre x360 Convertible 15-ch0xx PCIe Ports

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] PCI/PM: undocumented HP ZBook 15 G4 quirk with wrong
  DMI_BOARD_NAME match
--

commit bf5c6b82503708661539d00aefb0a2e0f06652af
Author: Mario Limonciello <superm1@kernel.org>

PCI/PM: Avoid D3cold for HP Spectre x360 Convertible 15-ch0xx PCIe Ports

This commit adds DMI blacklist entries to bridge_d3_blacklist[] to prevent
PCIe ports from being put into D3cold on affected HP laptops.

> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 17ec7f065682d..6bd84b9809c8d 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -3039,6 +3039,24 @@ static const struct dmi_system_id bridge_d3_blacklist[] = {
>  			DMI_MATCH(DMI_BOARD_NAME, "314D"),
>  		},
>  	},
> +	{
> +		/*
> +		 * Changing power state of root port dGPU is connected fails
> +		 * https://gitlab.freedesktop.org/drm/amd/-/work_items/3389
> +		 */
> +		.ident = "HP Spectre x360 Convertible 15-ch0xx",
> +		.matches = {
> +			DMI_MATCH(DMI_BOARD_VENDOR, "HP"),
> +			DMI_MATCH(DMI_BOARD_NAME, "83BB"),
> +		},
> +	},
> +	{
> +		.ident = "HP ZBook 15 G4",
> +		.matches = {
> +			DMI_MATCH(DMI_BOARD_VENDOR, "HP"),
> +			DMI_MATCH(DMI_BOARD_NAME, "HP ZBook 15 G4"),
> +		},
> +	},

[Severity: Medium]
Can this HP ZBook 15 G4 entry ever match a target machine when checking
DMI_BOARD_NAME against "HP ZBook 15 G4"?

On HP systems, DMI_BOARD_NAME is a 4-character hex board ID (like "83BB"
above, or "8275" on the HP ZBook 15 G4), while "HP ZBook 15 G4" is the
DMI_PRODUCT_NAME string.  Also, this entry is not mentioned in the commit
message or explained with a comment like the other entries in
bridge_d3_blacklist[]; was it included by mistake, or should it match
DMI_PRODUCT_NAME (or the hex board ID) and be documented?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110-superm1-kbz-222179-v2-0-5605e6ce6454@kernel.org?part=2