[PATCH 0/3] PCI/PM: Keep hotplug ports that can't wake from D3hot out of D3

[PATCH 0/3] PCI/PM: Keep hotplug ports that can't wake from D3hot out of D3

[Aviv Bakal]

d4c79b63d82d ("PCI: Allow D3 for native hotplug-capable Root Ports on
non-x86 platforms") lets native pciehp ports runtime suspend to D3hot
on non-x86. The PCIe switch ports on AWS instances advertise PME from
D3hot but do not send it, so hotplug events such as an ENI attach are
lost on Graviton. x86 keeps the old logic, so the problem does not show
up there.

Patches 1-2 handle existing switch devices, which advertise PME:
patch 1 makes pci_bridge_d3_possible() honor PCI_DEV_FLAGS_NO_D3, and
patch 2 sets that flag on the Amazon switch ports.

Patch 3 handles switch devices that advertise no PME from D3hot: such
hotplug ports are kept out of D3.

Aviv Bakal (3):
  PCI/PM: Honor PCI_DEV_FLAGS_NO_D3 in pci_bridge_d3_possible()
  PCI: Avoid runtime D3 on Amazon PCIe switch ports
  PCI/PM: Keep hotplug ports out of D3 if they can't signal PME from
    D3hot

 drivers/pci/pci.c    | 16 +++++++++++++++-
 drivers/pci/quirks.c | 12 ++++++++++++
 2 files changed, 27 insertions(+), 1 deletion(-)


base-commit: 23c62304dde29abe92013d85910d03a77dada35d
-- 
2.50.1

[PATCH 1/3] PCI/PM: Honor PCI_DEV_FLAGS_NO_D3 in pci_bridge_d3_possible()

[Aviv Bakal]

pci_set_power_state() does not put a device with PCI_DEV_FLAGS_NO_D3
into D3, but pci_bridge_d3_possible() ignores the flag.
pcie_portdrv_probe() therefore enables runtime PM on such a port, and
on runtime suspend pciehp masks the hotplug interrupt while the port
stays in D0.

Return false from pci_bridge_d3_possible() when the flag is set.

Fixes: d4c79b63d82d ("PCI: Allow D3 for native hotplug-capable Root Ports on non-x86 platforms")
Cc: stable@vger.kernel.org # 7.3.x
Co-developed-by: Zeev Zilberman <zeev@amazon.com>
Signed-off-by: Zeev Zilberman <zeev@amazon.com>
Signed-off-by: Aviv Bakal <avivb@amazon.com>
---
 drivers/pci/pci.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 7c6f2aba8144..1a23be4b6a07 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3055,6 +3055,10 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
 		if (pci_bridge_d3_disable)
 			return false;
 
+		/* The port is known not to work correctly in D3 */
+		if (bridge->dev_flags & PCI_DEV_FLAGS_NO_D3)
+			return false;
+
 		/*
 		 * Hotplug ports handled by platform firmware may not be put
 		 * into D3 by the OS, e.g. ACPI slots ...
-- 
2.50.1

Re: [PATCH 1/3] PCI/PM: Honor PCI_DEV_FLAGS_NO_D3 in pci_bridge_d3_possible()

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] PCI/PM: pci_bridge_d3_possible() checks NO_D3 before final
  quirks
--

commit 5fefa5fbcbd02246d38adb690d51a8862ddc1cd4
Author: Aviv Bakal <avivb@amazon.com>

PCI/PM: Honor PCI_DEV_FLAGS_NO_D3 in pci_bridge_d3_possible()

This commit returns false from pci_bridge_d3_possible() when
PCI_DEV_FLAGS_NO_D3 is set on the bridge.

> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 7c6f2aba81443..1a23be4b6a073 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -3055,6 +3055,10 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
>  		if (pci_bridge_d3_disable)
>  			return false;
>  
> +		/* The port is known not to work correctly in D3 */
> +		if (bridge->dev_flags & PCI_DEV_FLAGS_NO_D3)
> +			return false;

[Severity: Medium]
Can this leave bridge->bridge_d3 stuck at true when PCI_DEV_FLAGS_NO_D3 is
set by a DECLARE_PCI_FIXUP_FINAL quirk?

During enumeration, pci_device_add() -> pci_init_capabilities() ->
pci_pm_init() initializes dev->bridge_d3 = pci_bridge_d3_possible(dev)
before final quirks run in pci_bus_add_device() or pci_apply_final_quirks().
When a final quirk such as quirk_plx_pex_no_d3() or quirk_tuxeo_rp_d3()
later sets PCI_DEV_FLAGS_NO_D3 on a port, pci_bridge_d3_possible() flips
from true to false, causing pci_bridge_d3_update() on child devices to return
early without ever clearing bridge->bridge_d3:

drivers/pci/pci.c:pci_bridge_d3_update() {
	bridge = pci_upstream_bridge(dev);
	if (!bridge || !pci_bridge_d3_possible(bridge))
		return;
    ...
}

In addition, when a child device's final quirk (like quirk_tuxeo_rp_d3())
sets PCI_DEV_FLAGS_NO_D3 on its parent Root Port after pcie_portdrv_probe()
has already bound to the port, pci_bridge_d3_possible() returns true during
probe and false during pcie_portdrv_remove() and pcie_portdrv_shutdown(),
leaving runtime PM enabled and skipping the matching pm_runtime_forbid() and
pm_runtime_get_noresume() calls on removal.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261115171831.1498006-1-avivb@amazon.com?part=1

[PATCH 2/3] PCI: Avoid runtime D3 on Amazon PCIe switch ports

[Aviv Bakal]

The PCIe switch ports on AWS instances (vendor 0x1d0f) advertise PME
from D3hot but do not send it. Since commit d4c79b63d82d ("PCI: Allow
D3 for native hotplug-capable Root Ports on non-x86 platforms") these
ports runtime suspend to D3hot on non-x86 platforms, and hotplug events
such as an ENI attach are lost.

Mark them PCI_DEV_FLAGS_NO_D3.

Fixes: d4c79b63d82d ("PCI: Allow D3 for native hotplug-capable Root Ports on non-x86 platforms")
Cc: stable@vger.kernel.org # 7.3.x
Co-developed-by: Zeev Zilberman <zeev@amazon.com>
Signed-off-by: Zeev Zilberman <zeev@amazon.com>
Signed-off-by: Aviv Bakal <avivb@amazon.com>
---
 drivers/pci/quirks.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 7f1f47ea2ee4..292047804b09 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1476,6 +1476,18 @@ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_AL, PCI_ANY_ID,
 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
 				PCI_CLASS_STORAGE_IDE, 8, quirk_no_ata_d3);
 
+/*
+ * Amazon 1d0f PCIe switch ports (e.g. 1d0f:cec2) on AWS instances
+ * advertise PME# from D3hot but never assert it, so hotplug events on
+ * a port in D3 are lost.
+ */
+static void quirk_amazon_bridge_no_d3(struct pci_dev *pdev)
+{
+	pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
+}
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_AMAZON, PCI_ANY_ID,
+			      PCI_CLASS_BRIDGE_PCI, 8, quirk_amazon_bridge_no_d3);
+
 /*
  * This was originally an Alpha-specific thing, but it really fits here.
  * The i82375 PCI/EISA bridge appears as non-classified. Fix that.
-- 
2.50.1

Re: [PATCH 2/3] PCI: Avoid runtime D3 on Amazon PCIe switch ports

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] PCI: quirk_amazon_bridge_no_d3() duplicates quirk_no_ata_d3()
--

commit 23d17d7ee035a77b0f0e403734f5f387abceea6d
Author: Aviv Bakal <avivb@amazon.com>

PCI: Avoid runtime D3 on Amazon PCIe switch ports

This commit adds an early PCI fixup quirk to set PCI_DEV_FLAGS_NO_D3 on
Amazon PCIe bridges so they do not enter runtime D3hot where PME# is not
asserted for hotplug events.

> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 7f1f47ea2ee41..292047804b09b 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -1476,6 +1476,18 @@ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_AL, PCI_ANY_ID,
>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
>  				PCI_CLASS_STORAGE_IDE, 8, quirk_no_ata_d3);
>  
> +/*
> + * Amazon 1d0f PCIe switch ports (e.g. 1d0f:cec2) on AWS instances
> + * advertise PME# from D3hot but never assert it, so hotplug events on
> + * a port in D3 are lost.
> + */
> +static void quirk_amazon_bridge_no_d3(struct pci_dev *pdev)
> +{
> +	pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
> +}
> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_AMAZON, PCI_ANY_ID,
> +			      PCI_CLASS_BRIDGE_PCI, 8, quirk_amazon_bridge_no_d3);

[Severity: Low]
This isn't a bug, but quirk_no_ata_d3() right above has the exact same body
(pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;) and relies on
DECLARE_PCI_FIXUP_CLASS_EARLY() for class matching.  Could quirk_no_ata_d3()
be renamed to quirk_no_d3() and reused here, matching generic helpers like
quirk_no_bus_reset() and quirk_no_flr() later in this file?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261115171831.1498006-1-avivb@amazon.com?part=2

[PATCH 3/3] PCI/PM: Keep hotplug ports out of D3 if they can't signal PME from D3hot

[Aviv Bakal]

On runtime suspend pciehp masks the hotplug interrupt and relies on
PME to resume the port on a slot event. pci_bridge_d3_possible() does
not check whether the port can signal PME from D3hot, so a port that
cannot is not resumed by slot events.

Return false from pci_bridge_d3_possible() for such native hotplug
ports. pci_pm_init() computes bridge_d3 before it reads PME_Support,
so move that assignment after dev->pme_support is set.

Co-developed-by: Zeev Zilberman <zeev@amazon.com>
Signed-off-by: Zeev Zilberman <zeev@amazon.com>
Signed-off-by: Aviv Bakal <avivb@amazon.com>
---
 drivers/pci/pci.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1a23be4b6a07..0b2e20e781e6 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3081,6 +3081,14 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
 		if (platform_pci_bridge_d3(bridge))
 			return true;
 
+		/*
+		 * pciehp masks the hotplug interrupt on runtime suspend and
+		 * relies on PME to resume the port on a slot event. A port
+		 * that cannot signal PME from D3hot is not resumed.
+		 */
+		if (bridge->is_pciehp && !pci_pme_capable(bridge, PCI_D3hot))
+			return false;
+
 		/*
 		 * Hotplug ports handled natively by the OS on x86 platforms
 		 * were not validated by vendors for runtime D3 at least until
@@ -3247,7 +3255,6 @@ void pci_pm_init(struct pci_dev *dev)
 	dev->pm_cap = pm;
 	dev->d3hot_delay = PCI_PM_D3HOT_WAIT;
 	dev->d3cold_delay = PCI_PM_D3COLD_WAIT;
-	dev->bridge_d3 = pci_bridge_d3_possible(dev);
 	dev->d3cold_allowed = true;
 
 	dev->d1_support = false;
@@ -3283,6 +3290,9 @@ void pci_pm_init(struct pci_dev *dev)
 		pci_pme_active(dev, false);
 	}
 
+	/* pci_bridge_d3_possible() looks at pme_support */
+	dev->bridge_d3 = pci_bridge_d3_possible(dev);
+
 poweron:
 	pci_update_current_state(dev, PCI_UNKNOWN);
 	if (dev->current_state == PCI_D0) {
-- 
2.50.1

Re: [PATCH 3/3] PCI/PM: Keep hotplug ports out of D3 if they can't signal PME from D3hot

[sashiko-bot]

> On runtime suspend pciehp masks the hotplug interrupt and relies on
> PME to resume the port on a slot event. pci_bridge_d3_possible() does
> not check whether the port can signal PME from D3hot, so a port that
> cannot is not resumed by slot events.
> 
> Return false from pci_bridge_d3_possible() for such native hotplug
> ports. pci_pm_init() computes bridge_d3 before it reads PME_Support,
> so move that assignment after dev->pme_support is set.
> 
> Co-developed-by: Zeev Zilberman <zeev@amazon.com>
> Signed-off-by: Zeev Zilberman <zeev@amazon.com>
> Signed-off-by: Aviv Bakal <avivb@amazon.com>

Sashiko has reviewed this patch and found no issues.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261115171831.1498006-1-avivb@amazon.com?part=3

Re: [PATCH 0/3] PCI/PM: Keep hotplug ports that can't wake from D3hot out of D3

[Lukas Wunner]

[cc += Sathya]

On Sun, Nov 15, 2026 at 07:18:28PM +0200, Aviv Bakal wrote:
> d4c79b63d82d ("PCI: Allow D3 for native hotplug-capable Root Ports on
> non-x86 platforms") lets native pciehp ports runtime suspend to D3hot
> on non-x86. The PCIe switch ports on AWS instances advertise PME from
> D3hot but do not send it, so hotplug events such as an ENI attach are
> lost on Graviton. x86 keeps the old logic, so the problem does not show
> up there.

Intel Catlow Lake suffers from a similar issue:

https://lore.kernel.org/all/20261103193136.2410148-1-sathyanarayanan.kuppuswamy@linux.intel.com/

Please try to follow the approach taken there.

Thanks,

Lukas