From: "Falcon, Thomas" <thomas.falcon@intel.com>
To: "alexander.shishkin@linux.intel.com"
<alexander.shishkin@linux.intel.com>,
"ak@linux.intel.com" <ak@linux.intel.com>,
"peterz@infradead.org" <peterz@infradead.org>,
"acme@kernel.org" <acme@kernel.org>,
"dapeng1.mi@linux.intel.com" <dapeng1.mi@linux.intel.com>,
"mingo@redhat.com" <mingo@redhat.com>,
"Hunter, Adrian" <adrian.hunter@intel.com>,
"namhyung@kernel.org" <namhyung@kernel.org>,
"Rogers, Ian" <irogers@google.com>,
"Eranian, Stephane" <eranian@google.com>
Cc: "Chen, Zide" <zide.chen@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-perf-users@vger.kernel.org"
<linux-perf-users@vger.kernel.org>,
"Mi, Dapeng1" <dapeng1.mi@intel.com>,
"Hao, Xudong" <xudong.hao@intel.com>
Subject: Re: [PATCH 2/8] perf/x86: Introduce is_x86_pmu() helper
Date: Fri, 5 Jun 2026 17:08:31 +0000 [thread overview]
Message-ID: <199e8dfcfbbb3e3c658c1592ad288eeeb44ccae4.camel@intel.com> (raw)
In-Reply-To: <20260605011136.2043393-3-dapeng1.mi@linux.intel.com>
On Fri, 2026-06-05 at 09:11 +0800, Dapeng Mi wrote:
> From: Ian Rogers <irogers@google.com>
>
> To facilitate the detection of x86 PMU structures in upcoming
> patches,
> the is_x86_pmu() helper is introduced. Additionally, the
> is_x86_event()
> helper has been refactored to utilize is_x86_pmu().
>
> No function changes intended.
Reviewed-by: Thomas Falcon <thomas.falcon@intel.com>
Thanks,
Tom
>
> Signed-off-by: Ian Rogers <irogers@google.com>
> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
> Reviewed-by: Zide Chen <zide.chen@intel.com>
> ---
>
> Original patch link:
> https://lore.kernel.org/all/20260316050838.3624051-1-dapeng1.mi@linux.intel.com/
>
> arch/x86/events/core.c | 16 ----------------
> arch/x86/events/perf_event.h | 18 +++++++++++++++++-
> 2 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 4b9e105309c6..3bd0522afe6d 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -774,22 +774,6 @@ void x86_pmu_enable_all(int added)
> }
> }
>
> -int is_x86_event(struct perf_event *event)
> -{
> - /*
> - * For a non-hybrid platforms, the type of X86 pmu is
> - * always PERF_TYPE_RAW.
> - * For a hybrid platform, the PERF_PMU_CAP_EXTENDED_HW_TYPE
> - * is a unique capability for the X86 PMU.
> - * Use them to detect a X86 event.
> - */
> - if (event->pmu->type == PERF_TYPE_RAW ||
> - event->pmu->capabilities &
> PERF_PMU_CAP_EXTENDED_HW_TYPE)
> - return true;
> -
> - return false;
> -}
> -
> struct pmu *x86_get_pmu(unsigned int cpu)
> {
> struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
> diff --git a/arch/x86/events/perf_event.h
> b/arch/x86/events/perf_event.h
> index 5902a297daa1..dbb5c8e8a8ea 100644
> --- a/arch/x86/events/perf_event.h
> +++ b/arch/x86/events/perf_event.h
> @@ -115,7 +115,23 @@ static inline bool is_topdown_event(struct
> perf_event *event)
> return is_metric_event(event) || is_slots_event(event);
> }
>
> -int is_x86_event(struct perf_event *event);
> +static inline bool is_x86_pmu(struct pmu *pmu)
> +{
> + /*
> + * For a non-hybrid platforms, the type of X86 pmu is
> + * always PERF_TYPE_RAW.
> + * For a hybrid platform, the PERF_PMU_CAP_EXTENDED_HW_TYPE
> + * is a unique capability for the X86 PMU.
> + * Use them to detect a X86 event.
> + */
> + return pmu->type == PERF_TYPE_RAW ||
> + pmu->capabilities & PERF_PMU_CAP_EXTENDED_HW_TYPE;
> +}
> +
> +static inline bool is_x86_event(struct perf_event *event)
> +{
> + return is_x86_pmu(event->pmu);
> +}
>
> static inline bool check_leader_group(struct perf_event *leader, int
> flags)
> {
next prev parent reply other threads:[~2026-06-05 17:08 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-05 1:11 [PATCH 0/8] perf/x86: Miscellaneous PMU bug fixes Dapeng Mi
2026-06-05 1:11 ` [PATCH 1/8] perf/x86/intel: Remove anythread_deprecated bit from perf_capabilities Dapeng Mi
2026-06-05 17:04 ` Falcon, Thomas
2026-06-05 1:11 ` [PATCH 2/8] perf/x86: Introduce is_x86_pmu() helper Dapeng Mi
2026-06-05 17:08 ` Falcon, Thomas [this message]
2026-06-05 1:11 ` [PATCH 3/8] perf/x86: Update cap_user_rdpmc base on rdpmc user disable state Dapeng Mi
2026-06-05 17:15 ` Falcon, Thomas
2026-06-05 1:11 ` [PATCH 4/8] perf/x86/intel: Fix redundant branch type check in intel_pmu_lbr_filter() Dapeng Mi
2026-06-05 18:28 ` Falcon, Thomas
2026-06-05 1:11 ` [PATCH 5/8] perf/x86/intel: Fix kernel address leakages in LBR stack Dapeng Mi
2026-06-05 1:33 ` sashiko-bot
2026-06-05 3:20 ` Mi, Dapeng
2026-06-05 1:11 ` [PATCH 6/8] perf/x86/intel: Validate return value of intel_pmu_init_hybrid() Dapeng Mi
2026-06-05 1:36 ` sashiko-bot
2026-06-05 3:29 ` Mi, Dapeng
2026-06-05 16:17 ` Chen, Zide
2026-06-05 18:47 ` Falcon, Thomas
2026-06-05 1:11 ` [PATCH 7/8] perf/x86/intel: Drop fixed-counter PEBS constraints for baseline PEBS Dapeng Mi
2026-06-05 20:32 ` Chen, Zide
2026-06-05 1:11 ` [PATCH 8/8] perf/core: Fix kernel register info leak via hardware skid Dapeng Mi
2026-06-05 1:38 ` sashiko-bot
2026-06-05 3:42 ` Mi, Dapeng
2026-06-05 19:08 ` Falcon, Thomas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=199e8dfcfbbb3e3c658c1592ad288eeeb44ccae4.camel@intel.com \
--to=thomas.falcon@intel.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=ak@linux.intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=dapeng1.mi@intel.com \
--cc=dapeng1.mi@linux.intel.com \
--cc=eranian@google.com \
--cc=irogers@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=xudong.hao@intel.com \
--cc=zide.chen@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox