Re: [PATCH V6 3/3] perf/x86/intel: Support PEBS counters snapshotting

[Peter Zijlstra <peterz@infradead.org>]

On Wed, Dec 18, 2024 at 11:55:53AM -0500, Liang, Kan wrote:
> 
> 
> On 2024-12-18 11:32 a.m., Peter Zijlstra wrote:
> > On Wed, Dec 18, 2024 at 07:16:43AM -0800, kan.liang@linux.intel.com wrote:
> > 
> >> To prevent the case that a PEBS record value might be in the past
> >> relative to what is already in the event, perf always stops the PMU and
> >> drains the PEBS buffer before updating the corresponding event->count.
> > 
> > Like I wrote here:
> > 
> >   https://lkml.kernel.org/r/20241218082404.GI11133@noisy.programming.kicks-ass.net
> > 
> > I don't think this is sufficient.
> 
> 
> I replied with an explanation this morning in the old V5 thread. I'm not
> sure if you got a chance to look at it.
> https://lore.kernel.org/all/5a4ab06e-8628-4e1d-addb-2af920deffad@linux.intel.com/

Bah, I actually checked there before replying and didn't see the email
-- it is there now.

> There will be a drain_pebs() right before handling A-overflow-PMI.
> 
>   B-assist			A=1
>   C				A=2
>   B-assist			A=3
>   		<- drain_pebs()
>   A-overflow-PMI		A=4
>   C-assist-PMI (DS buffer)	A=5
> 
> So the A-overflow-PMI will
>    - Process the DS. adjust A->count to 3
>    - adjust A->count to 4
> 
> Is it sufficient?

Yes, that will work. A bit yuck but perhaps good enough.

OK, I'll go stare at this new series tomorrow -- brain is about to give
out for the day.