From: Manivannan Sadhasivam via B4 Relay <devnull+manivannan.sadhasivam.linaro.org@kernel.org>
To: "Shuai Xue" <xueshuai@linux.alibaba.com>,
"Jing Zhang" <renyu.zj@linux.alibaba.com>,
"Will Deacon" <will@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>
Cc: Shradha Todi <shradha.t@samsung.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org, linux-pci@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH 2/4] PCI: dwc: Add helper to find the Vendor Specific Extended Capability (VSEC)
Date: Tue, 18 Feb 2025 20:06:41 +0530 [thread overview]
Message-ID: <20250218-pcie-qcom-ptm-v1-2-16d7e480d73e@linaro.org> (raw)
In-Reply-To: <20250218-pcie-qcom-ptm-v1-0-16d7e480d73e@linaro.org>
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
dw_pcie_find_vsec_capability() is used by upcoming DWC APIs to find the
VSEC capabilities like PTM, RAS etc...
Co-developed-by: Shradha Todi <shradha.t@samsung.com>
Signed-off-by: Shradha Todi <shradha.t@samsung.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/dwc/pcie-designware.c | 40 ++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 145e7f579072..a7c0671c6715 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -16,6 +16,7 @@
#include <linux/gpio/consumer.h>
#include <linux/ioport.h>
#include <linux/of.h>
+#include <linux/pcie-dwc.h>
#include <linux/platform_device.h>
#include <linux/sizes.h>
#include <linux/types.h>
@@ -283,6 +284,45 @@ u16 dw_pcie_find_ext_capability(struct dw_pcie *pci, u8 cap)
}
EXPORT_SYMBOL_GPL(dw_pcie_find_ext_capability);
+static u16 __dw_pcie_find_vsec_capability(struct dw_pcie *pci, u16 vendor_id,
+ u16 vsec_id)
+{
+ u16 vsec = 0;
+ u32 header;
+
+ if (vendor_id != dw_pcie_readw_dbi(pci, PCI_VENDOR_ID))
+ return 0;
+
+ while ((vsec = dw_pcie_find_next_ext_capability(pci, vsec,
+ PCI_EXT_CAP_ID_VNDR))) {
+ header = dw_pcie_readl_dbi(pci, vsec + PCI_VNDR_HEADER);
+ if (PCI_VNDR_HEADER_ID(header) == vsec_id)
+ return vsec;
+ }
+
+ return 0;
+}
+
+static u16 dw_pcie_find_vsec_capability(struct dw_pcie *pci,
+ const struct dwc_pcie_vsec_id *vsec_ids)
+{
+ const struct dwc_pcie_vsec_id *vid;
+ u16 vsec;
+ u32 header;
+
+ for (vid = vsec_ids; vid->vendor_id; vid++) {
+ vsec = __dw_pcie_find_vsec_capability(pci, vid->vendor_id,
+ vid->vsec_id);
+ if (vsec) {
+ header = dw_pcie_readl_dbi(pci, vsec + PCI_VNDR_HEADER);
+ if (PCI_VNDR_HEADER_REV(header) == vid->vsec_rev)
+ return vsec;
+ }
+ }
+
+ return 0;
+}
+
int dw_pcie_read(void __iomem *addr, int size, u32 *val)
{
if (!IS_ALIGNED((uintptr_t)addr, size)) {
--
2.25.1
next prev parent reply other threads:[~2025-02-18 14:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-18 14:36 [PATCH 0/4] PCI: dwc: Add PTM sysfs support Manivannan Sadhasivam via B4 Relay
2025-02-18 14:36 ` [PATCH 1/4] perf/dwc_pcie: Move common DWC struct definitions to 'pcie-dwc.h' Manivannan Sadhasivam via B4 Relay
2025-02-18 16:31 ` Dmitry Baryshkov
2025-02-19 7:55 ` Manivannan Sadhasivam
2025-02-20 6:01 ` Shradha Todi
2025-02-20 7:27 ` Manivannan Sadhasivam
2025-02-18 14:36 ` Manivannan Sadhasivam via B4 Relay [this message]
2025-02-18 14:36 ` [PATCH 3/4] PCI: dwc: Add sysfs support for PTM Manivannan Sadhasivam via B4 Relay
2025-02-18 17:54 ` Dmitry Baryshkov
2025-02-19 8:14 ` Manivannan Sadhasivam
2025-02-18 14:36 ` [PATCH 4/4] PCI: qcom-ep: Mask PTM_UPDATING interrupt Manivannan Sadhasivam via B4 Relay
2025-02-18 16:17 ` [PATCH 0/4] PCI: dwc: Add PTM sysfs support Frank Li
2025-02-19 7:49 ` Manivannan Sadhasivam
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