From: sashiko-bot@kernel.org
To: "Dapeng Mi" <dapeng1.mi@linux.intel.com>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [Patch v8 14/23] perf/x86: Support YMM sampling using sample_simd_vec_reg_* fields
Date: Fri, 29 May 2026 08:47:59 +0000 [thread overview]
Message-ID: <20260529084759.A4F051F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260529075645.580362-15-dapeng1.mi@linux.intel.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
New issues:
- [Medium] The `event_needs_ymm()` function evaluates flag-gated syscall parameters outside their corresponding flag gate (`PERF_SAMPLE_REGS_USER` / `PERF_SAMPLE_REGS_INTR`).
Pre-existing issues:
- [High] The function `perf_simd_reg_validate` improperly returns an error when unused, flag-gated parameters are not zero-filled, breaking ABI compatibility.
--
commit f738764532819a2044a1239c400d83c8404d4843
Author: Dapeng Mi <dapeng1.mi@linux.intel.com>
perf/x86: Support YMM sampling using sample_simd_vec_reg_* fields
This patch introduces support for sampling YMM registers via the
sample_simd_vec_reg_* fields. It updates the perf_simd_reg_value function
to assemble the XMM and YMMH halves into a complete YMM register and
sets the sample_simd_vec_reg_qwords to 4 for YMM sampling.
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
[ ... ]
> @@ -1967,6 +1973,8 @@ static void x86_pmu_sample_xregs(struct perf_event *event,
>
> if (event_needs_xmm(event))
> mask |= XFEATURE_MASK_SSE;
> + if (event_needs_ymm(event))
> + mask |= XFEATURE_MASK_YMM;
>
> mask &= x86_pmu.ext_regs_mask;
> if (sample_type & PERF_SAMPLE_REGS_USER) {
[Severity: Medium]
Does this evaluate flag-gated syscall parameters outside their flag gate?
According to the syscall parameter trust boundaries, userspace is not
required to zero-fill unused fields, so they may contain arbitrary garbage
when their flag is absent.
The event_needs_ymm() helper checks event->attr.sample_simd_regs_enabled
and event->attr.sample_simd_vec_reg_qwords.
However, in x86_pmu_sample_xregs(), this check happens before we verify if
the sample type actually includes PERF_SAMPLE_REGS_USER or
PERF_SAMPLE_REGS_INTR.
Could this cause the kernel to read uninitialized userspace values when
those sample_type flags are not set?
> diff --git a/arch/x86/kernel/perf_regs.c b/arch/x86/kernel/perf_regs.c
> --- a/arch/x86/kernel/perf_regs.c
> +++ b/arch/x86/kernel/perf_regs.c
[ ... ]
> @@ -121,7 +128,8 @@ int perf_simd_reg_validate(u16 simd_enabled, u16 vec_qwords,
> if (vec_mask_intr || vec_mask_user)
> return -EINVAL;
> } else {
> - if (vec_qwords != PERF_X86_XMM_QWORDS)
> + if (vec_qwords != PERF_X86_XMM_QWORDS &&
> + vec_qwords != PERF_X86_YMM_QWORDS)
> return -EINVAL;
[Severity: High]
This isn't a bug introduced by this patch, but does the surrounding
validation code in perf_simd_reg_validate() inappropriately reject legal
syscalls?
When simd_enabled is 0, the function checks if vec_qwords, vec_mask_intr,
and other parameters are zero, returning -EINVAL if they are not.
Since userspace isn't required to zero-fill unused arguments outside their
flag gate, these parameters could contain garbage.
Is it possible that enforcing zero-fill on these unused arguments
functionally breaks ABI compatibility by failing requests that should be
valid under the trust boundary rules?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260529075645.580362-1-dapeng1.mi@linux.intel.com?part=14
next prev parent reply other threads:[~2026-05-29 8:48 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 7:56 [Patch v8 00/23] Support SIMD/eGPRs/SSP registers sampling for perf Dapeng Mi
2026-05-29 7:56 ` [Patch v8 01/23] perf/x86/intel: Validate return value of intel_pmu_init_hybrid() Dapeng Mi
2026-05-29 8:53 ` sashiko-bot
2026-05-29 11:11 ` Peter Zijlstra
2026-05-29 7:56 ` [Patch v8 02/23] perf/x86: Move hybrid PMU initialization before x86_pmu_starting_cpu() Dapeng Mi
2026-05-29 8:51 ` sashiko-bot
2026-05-29 7:56 ` [Patch v8 03/23] perf/x86/intel: Enable large PEBS sampling for XMMs Dapeng Mi
2026-05-29 7:56 ` [Patch v8 04/23] perf/x86/intel: Convert x86_perf_regs to per-cpu variables Dapeng Mi
2026-05-29 7:56 ` [Patch v8 05/23] perf: Eliminate duplicate arch-specific functions definations Dapeng Mi
2026-05-29 7:56 ` [Patch v8 06/23] perf/x86: Use x86_perf_regs in the x86 nmi handlers Dapeng Mi
2026-05-29 7:56 ` [Patch v8 07/23] x86/fpu/xstate: Add xsaves_nmi() helper Dapeng Mi
2026-05-29 8:56 ` sashiko-bot
2026-05-29 11:32 ` Peter Zijlstra
2026-05-29 7:56 ` [Patch v8 08/23] x86/fpu: Ensure TIF_NEED_FPU_LOAD is set after saving FPU state Dapeng Mi
2026-05-29 7:56 ` [Patch v8 09/23] perf: Move and enhance has_extended_regs() for arch-specific use Dapeng Mi
2026-05-29 7:56 ` [Patch v8 10/23] perf/x86: Enable XMM Register Sampling for Non-PEBS Events Dapeng Mi
2026-05-29 9:02 ` sashiko-bot
2026-05-29 11:38 ` Peter Zijlstra
2026-05-29 7:56 ` [Patch v8 11/23] perf/x86: Enable XMM register sampling for REGS_USER case Dapeng Mi
2026-05-29 9:24 ` sashiko-bot
2026-05-29 11:42 ` Peter Zijlstra
2026-05-29 7:56 ` [Patch v8 12/23] perf: Add sampling support for SIMD registers Dapeng Mi
2026-05-29 8:36 ` sashiko-bot
2026-05-29 7:56 ` [Patch v8 13/23] perf/x86: Support XMM sampling using sample_simd_vec_reg_* fields Dapeng Mi
2026-05-29 8:49 ` sashiko-bot
2026-05-29 7:56 ` [Patch v8 14/23] perf/x86: Support YMM " Dapeng Mi
2026-05-29 8:47 ` sashiko-bot [this message]
2026-05-29 7:56 ` [Patch v8 15/23] perf/x86: Support ZMM " Dapeng Mi
2026-05-29 7:56 ` [Patch v8 16/23] perf/x86: Support OPMASK sampling using sample_simd_pred_reg_* fields Dapeng Mi
2026-05-29 9:21 ` sashiko-bot
2026-05-29 7:56 ` [Patch v8 17/23] perf: Enhance perf_reg_validate() with simd_enabled argument Dapeng Mi
2026-05-29 7:56 ` [Patch v8 18/23] perf/x86: Support eGPRs sampling using sample_regs_* fields Dapeng Mi
2026-05-29 9:31 ` sashiko-bot
2026-05-29 7:56 ` [Patch v8 19/23] perf/x86: Support SSP " Dapeng Mi
2026-05-29 10:03 ` sashiko-bot
2026-05-29 7:56 ` [Patch v8 20/23] perf/x86/intel: Support arch-PEBS based SIMD/eGPRs/SSP sampling Dapeng Mi
2026-05-29 9:45 ` sashiko-bot
2026-05-29 7:56 ` [Patch v8 21/23] perf/x86/intel: Enable PERF_PMU_CAP_SIMD_REGS capability Dapeng Mi
2026-05-29 10:43 ` sashiko-bot
2026-05-29 7:56 ` [Patch v8 22/23] perf/x86: Activate back-to-back NMI detection for arch-PEBS induced NMIs Dapeng Mi
2026-05-29 9:34 ` sashiko-bot
2026-05-29 7:56 ` [Patch v8 23/23] perf/x86/intel: Add sanity check for PEBS fragment size Dapeng Mi
2026-05-29 9:54 ` sashiko-bot
2026-05-29 8:32 ` [Patch v8 00/23] Support SIMD/eGPRs/SSP registers sampling for perf Mi, Dapeng
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