From: sashiko-bot@kernel.org
To: "Zide Chen" <zide.chen@intel.com>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [PATCH V3 1/8] perf/x86/intel/uncore: Fix PCI PMU cleanup on setup failure
Date: Thu, 11 Jun 2026 16:26:16 +0000 [thread overview]
Message-ID: <20260611162616.6DA751F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260611160033.66760-2-zide.chen@intel.com>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
New issues:
- [Medium] Unjustified removal of `WARN_ON_ONCE` safety check based on a misunderstanding of the Linux device model.
Pre-existing issues:
- [High] Active perf events will dereference a freed `intel_uncore_box` when a PCI device is forcefully unbound.
- [High] Lockless update of `pmu->boxes[die]` in PCI probe/remove paths races with CPU hotplug callbacks, leading to Use-After-Free.
--
commit 1ebe3c291f253a0ba73f6277fd61a8e1138e1725
Author: Zide Chen <zide.chen@intel.com>
perf/x86/intel/uncore: Fix PCI PMU cleanup on setup failure
This commit attempts to fix a cleanup issue when uncore_pci_pmu_register()
fails by explicitly managing pmu->boxes[die] and activeboxes. It also removes
a WARN_ON_ONCE() under the assumption that a NULL driver data pointer could
result from a registration failure during probe.
Link: https://sashiko.dev/#/patchset/20260512233048.9577-1-zide.chen@intel.com?part=1
> diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
> index 7857959c6e823..b69b6a21d46bf 100644
> --- a/arch/x86/events/intel/uncore.c
> +++ b/arch/x86/events/intel/uncore.c
[ ... ]
> @@ -1248,6 +1249,9 @@ static void uncore_pci_pmu_unregister(struct intel_uncore_pmu *pmu, int die)
> {
> struct intel_uncore_box *box = pmu->boxes[die];
>
> + if (!box)
> + return;
> +
> pmu->boxes[die] = NULL;
> if (atomic_dec_return(&pmu->activeboxes) == 0)
> uncore_pmu_unregister(pmu);
[Severity: High]
This is a pre-existing issue, but when a PCI device is forcefully unbound,
does unconditionally freeing the box memory here lead to a use-after-free if
there are active perf events?
If active perf events are currently open for this PMU, the perf core retains
them. Subsequent perf operations will dereference the freed memory:
uncore_pmu_event_read() {
struct intel_uncore_box *box = uncore_event_to_box(event);
uncore_perf_event_update(box, event);
...
}
[Severity: High]
This is also a pre-existing issue, but is there a race condition between
setting pmu->boxes[die] to NULL here and concurrent CPU hotplug callbacks?
CPU hotplug callbacks run under cpus_read_lock(), but PCI bind/unbind
operations can execute concurrently without it. If a CPU hotplug event reads
the box right before it is cleared:
CPU1
uncore_change_type_ctx()
box = pmu->boxes[die];
CPU2 would then execute uncore_pci_pmu_unregister():
pmu->boxes[die] = NULL;
...
kfree(box);
Would CPU1 then dereference the freed box memory when it subsequently accesses
box->cpu?
[ ... ]
> @@ -1272,7 +1276,6 @@ static void uncore_pci_remove(struct pci_dev *pdev)
> break;
> }
> }
> - WARN_ON_ONCE(i >= UNCORE_EXTRA_PCI_DEV_MAX);
> return;
> }
[Severity: Medium]
The commit message states that since pci_get_drvdata() returns NULL on
registration failure, uncore_pci_remove() can no longer treat NULL drvdata as
an indicator of an auxiliary PCI device. Is this assumption accurate?
If PMU registration fails during uncore_pci_probe(), the probe function
returns an error code. The PCI driver core responds by aborting the bind
process and will never invoke the driver's remove callback for that device.
Because uncore_pci_remove() is never called as a result of a registration
failure, does removing this check silently mask bugs where a successfully
bound primary device unexpectedly loses its driver data?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260611160033.66760-1-zide.chen@intel.com?part=1
next prev parent reply other threads:[~2026-06-11 16:26 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-11 16:00 [PATCH v3 0/8] perf/x86/intel/uncore: PMU setup robustness fixes Zide Chen
2026-06-11 16:00 ` [PATCH V3 1/8] perf/x86/intel/uncore: Fix PCI PMU cleanup on setup failure Zide Chen
2026-06-11 16:26 ` sashiko-bot [this message]
2026-06-11 16:00 ` [PATCH V3 2/8] perf/x86/intel/uncore: Fix refcnt and other cleanups Zide Chen
2026-06-11 16:29 ` sashiko-bot
2026-06-11 16:00 ` [PATCH V3 3/8] perf/x86/intel/uncore: Let init_box() callback report failures Zide Chen
2026-06-11 16:38 ` sashiko-bot
2026-06-11 16:00 ` [PATCH V3 4/8] perf/x86/intel/uncore: Keep PCI PMUs working when MMIO/MSR setup fails Zide Chen
2026-06-11 16:00 ` [PATCH V3 5/8] perf/x86/intel/uncore: Factor out box setup code Zide Chen
2026-06-11 16:00 ` [PATCH V3 6/8] perf/x86/intel/uncore: Introduce PMU flags and broken state Zide Chen
2026-06-11 16:30 ` sashiko-bot
2026-06-11 16:00 ` [PATCH V3 7/8] perf/x86/intel/uncore: Fix uncore_box ref/unref ordering Zide Chen
2026-06-11 16:29 ` sashiko-bot
2026-06-11 16:00 ` [PATCH V3 8/8] perf/x86/intel/uncore: Implement lazy setup for MSR/MMIO PMUs Zide Chen
2026-06-11 16:33 ` sashiko-bot
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