From: sashiko-bot@kernel.org
To: "Dapeng Mi" <dapeng1.mi@linux.intel.com>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [Patch v9 07/10] perf regs: Enable dumping of SIMD registers
Date: Mon, 06 Jul 2026 02:55:58 +0000 [thread overview]
Message-ID: <20260706025559.8384B1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260706023444.3067660-8-dapeng1.mi@linux.intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] SIMD register decoding logic dynamically probes the host kernel, breaking cross-platform and offline analysis of perf.data files.
--
commit 2e9a4421bef9edf42fbc7bb3efd49ba82ff3a75d
Author: Dapeng Mi <dapeng1.mi@linux.intel.com>
perf regs: Enable dumping of SIMD registers
Support dumping of SIMD registers with the new PERF_SAMPLE_REGS_ABI_SIMD
ABI.
Currently, the XMM, YMM, ZMM, OPMASK, eGPRs, and SSP registers on x86
platforms are supported with the PERF_SAMPLE_REGS_ABI_SIMD ABI.
> diff --git a/tools/perf/builtin-script.c b/tools/perf/builtin-script.c
> index 23f694c3f0c98..5768682dc95fc 100644
> --- a/tools/perf/builtin-script.c
> +++ b/tools/perf/builtin-script.c
[ ... ]
> @@ -719,23 +719,96 @@ static int perf_session__check_output_opt(struct perf_session *session)
[ ... ]
> + for (reg_c = 0; reg_c < 64; reg_c++) {
> + if (!regs->nr_vectors)
> + break;
> + if (intr) {
> + perf_intr_simd_reg_class_bitmap_qwords(e_machine, reg_c,
> + &qwords, /*pred=*/false);
> + } else {
> + perf_user_simd_reg_class_bitmap_qwords(e_machine, reg_c,
> + &qwords, /*pred=*/false);
> + }
[Severity: Medium]
Could this break offline and cross-platform analysis of perf.data files?
The perf_intr_simd_reg_class_bitmap_qwords() function dynamically probes the
host kernel via sys_perf_event_open() to determine the SIMD register lengths.
If a user analyzes a perf.data file on a different machine lacking support for
that specific SIMD ABI (such as a non-x86 architecture or an older kernel),
would the probe fail and return a length of 0, causing the register names to
be printed as "unknown"?
This same pattern appears in tools/perf/util/scripting-engines/trace-event-python.c
and tools/perf/util/session.c.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260706023444.3067660-1-dapeng1.mi@linux.intel.com?part=7
next prev parent reply other threads:[~2026-07-06 2:56 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-06 2:34 [Patch v9 00/10] Perf tools: Support eGPRs/SSP/SIMD registers sampling Dapeng Mi
2026-07-06 2:34 ` [Patch v9 01/10] perf dwarf-regs: Fix DWARF register index bounds check Dapeng Mi
2026-07-06 2:34 ` [Patch v9 02/10] perf util: Add missed fields in _attr__fprintf() and __attr_swap() Dapeng Mi
2026-07-06 2:34 ` [Patch v9 03/10] tools headers: Sync x86 headers with kernel sources Dapeng Mi
2026-07-06 2:54 ` sashiko-bot
2026-07-06 2:34 ` [Patch v9 04/10] perf headers: Sync perf_event.h/perf_regs.h with the kernel headers Dapeng Mi
2026-07-06 2:34 ` [Patch v9 05/10] perf regs: Support x86 eGPRs/SSP sampling Dapeng Mi
2026-07-06 2:59 ` sashiko-bot
2026-07-06 2:34 ` [Patch v9 06/10] perf regs: Support x86 SIMD registers sampling Dapeng Mi
2026-07-06 2:34 ` [Patch v9 07/10] perf regs: Enable dumping of SIMD registers Dapeng Mi
2026-07-06 2:55 ` sashiko-bot [this message]
2026-07-06 2:34 ` [Patch v9 08/10] perf dwarf-regs: Add SIMD/eGPRs support for x86 DWARF registers Dapeng Mi
2026-07-06 2:34 ` [Patch v9 09/10] perf tests: Add x86 eGPRs/SSP registers sampling test Dapeng Mi
2026-07-06 3:00 ` sashiko-bot
2026-07-06 2:34 ` [Patch v9 10/10] perf tests: Add SIMD " Dapeng Mi
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