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From: sashiko-bot@kernel.org
To: "Zhanpeng Zhang" <zhangzhanpeng.jasper@bytedance.com>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v10 9/9] selftests/riscv: add perf user-stack SSE copy regression test
Date: Fri, 11 Sep 2026 12:33:16 +0000	[thread overview]
Message-ID: <20260911123317.5A9111F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260911121456.33223-10-zhangzhanpeng.jasper@bytedance.com>

> On RISC-V, PMU overflow interrupts can be delivered through the SBI
> Supervisor Software Events (SSE) mechanism. A perf event that samples
> the raw user stack (PERF_SAMPLE_STACK_USER, as perf record
> --call-graph dwarf does) then copies a chunk of the interrupted task's
> user stack from an NMI-like context. If that copy is allowed to take a
> nested page fault it can corrupt the interrupted task's kernel state and
> hang or crash the machine under load; this is what
> riscv_perf_out_copy_user() and the nofault page-fault change fix.
> 
> The existing SSE selftest module exercises the framework (register,
> enable, inject, complete, priorities, stress) but never drives the perf
> user-stack copy that motivated the no-fault path. Add a userspace test
> that closes that gap:
> 
>   - Open a sampling hardware PMU event with PERF_SAMPLE_STACK_USER over a
>     deep, partially non-resident user stack, drain the ring buffer, and
>     verify every SAMPLE record is well formed and never reports more
>     dumped bytes than were requested. This checks that a non-resident
>     page truncates the dump cleanly instead of faulting or overrunning.
>   - Drive a multi-CPU unix-socket + deep-recursion workload under
>     high-frequency DWARF sampling; the pass criterion is simply that the
>     machine survives, since the original bug took it down.
> 
> The test reports SKIP when hardware PMU sampling is unavailable or
> perf_event_paranoid forbids it, so it is safe to run unprivileged or in
> constrained environments. It is placed under the RISC-V SSE selftests
> because SSE delivery is the RISC-V-specific condition it protects, and
> is wired into the sse subtarget Makefile alongside the module runner.
> 
> Signed-off-by: Zhanpeng Zhang <zhangzhanpeng.jasper@bytedance.com>

Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260911121456.33223-1-zhangzhanpeng.jasper@bytedance.com?part=9


      reply	other threads:[~2026-09-11 12:33 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-11 12:14 [PATCH v10 0/9] riscv: add SBI Supervisor Software Events support Zhanpeng Zhang
2026-09-11 12:14 ` [PATCH v10 1/9] riscv: add SBI SSE extension definitions Zhanpeng Zhang
2026-09-11 12:20   ` sashiko-bot
2026-09-11 12:14 ` [PATCH v10 2/9] riscv: add support for SBI Supervisor Software Events extension Zhanpeng Zhang
2026-09-11 12:34   ` sashiko-bot
2026-09-11 12:14 ` [PATCH v10 3/9] riscv: sse: mask events during shutdown and kexec Zhanpeng Zhang
2026-09-11 12:30   ` sashiko-bot
2026-09-11 12:14 ` [PATCH v10 4/9] drivers: firmware: add riscv SSE support Zhanpeng Zhang
2026-09-11 12:35   ` sashiko-bot
2026-09-11 12:14 ` [PATCH v10 5/9] riscv: mm: avoid enabling interrupts for nofault page faults Zhanpeng Zhang
2026-09-11 12:28   ` sashiko-bot
2026-09-11 12:14 ` [PATCH v10 6/9] perf: RISC-V: support callchains with SSE delivery Zhanpeng Zhang
2026-09-11 12:35   ` sashiko-bot
2026-09-11 12:14 ` [PATCH v10 7/9] perf: RISC-V: add support for SSE event Zhanpeng Zhang
2026-09-11 12:37   ` sashiko-bot
2026-09-11 12:14 ` [PATCH v10 8/9] selftests/riscv: add SSE test module Zhanpeng Zhang
2026-09-11 12:40   ` sashiko-bot
2026-09-11 12:14 ` [PATCH v10 9/9] selftests/riscv: add perf user-stack SSE copy regression test Zhanpeng Zhang
2026-09-11 12:33   ` sashiko-bot [this message]

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