Re: [PATCH v6 23/26] perf annotate-arm64: Support 'add' instruction tracking

[sashiko-bot@kernel.org]

> Extend update_insn_state_arm64() to track 'add' instructions for
> structure member address calculation.
> 
> Unlike x86, the arm64 'add' instruction has an extra base register among
> its source operands. Therefore, in terms of propagating the data type,
> it is essentially performing a 'mov', except that before the 'mov', it
> first needs to be updated by adding the offset or reg2.
> 
> A real-world example is shown below:
> 
>   ffff80008001c9a8 <flush_ptrace_hw_breakpoint>:
>   ffff80008001c9c4:  add  x19, x0, #0xeb8   // x0 (task_struct*) + 0xeb8 -> x19
> * ffff80008001c9d0:  ldr  x0, [x19]
> 
> Before this commit, the type flow broke at the 'add' instruction,
> leaving the subsequent load with no type information:
> 
>   chk [28] reg19 offset=0 ok=0 kind=0 cfa : no type information
>   final result: no type information
> 
> After this commit, the tracker correctly follows the member address
> calculation:
> 
>   var [0] reg0 offset 0 type='struct task_struct*'
>   add [1c] address of 0xeb8(reg0) -> reg19 type='struct task_struct*'
>   chk [28] reg19 offset=0 ok=1 kind=1 (struct task_struct*) : Good!
>   found by insn track: 0(reg19) type-offset=0xeb8
>   final result: type='struct task_struct'
> 
> Signed-off-by: Tengda Wu <wutengda@huaweicloud.com>

Sashiko has reviewed this patch and found no issues. It looks great!

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