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From: Peter Zijlstra <peterz@infradead.org>
To: Dapeng Mi <dapeng1.mi@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Andi Kleen <ak@linux.intel.com>,
	Eranian Stephane <eranian@google.com>,
	Sandipan Das <sandipan.das@amd.com>,
	Andrii Nakryiko <andrii@kernel.org>, Song Liu <song@kernel.org>,
	Ravi Bangoria <ravi.bangoria@amd.com>,
	Ananth Narayan <ananth.narayan@amd.com>,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	bpf@vger.kernel.org, Dapeng Mi <dapeng1.mi@intel.com>,
	Zide Chen <zide.chen@intel.com>,
	Falcon Thomas <thomas.falcon@intel.com>,
	Xudong Hao <xudong.hao@intel.com>,
	Sashiko <sashiko-bot@kernel.org>
Subject: Re: [Patch v5 11/18] perf/x86/intel: Use a dedicated LBR stack for BPF snapshotting
Date: Thu, 29 Oct 2026 11:41:15 +0100	[thread overview]
Message-ID: <20261029104115.GM1779021@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <20261029043914.1395147-12-dapeng1.mi@linux.intel.com>

On Thu, Oct 29, 2026 at 12:39:07PM +0800, Dapeng Mi wrote:
> BPF LBR snapshotting currently reuses the default LBR stack
> (cpuc->lbr_stack) when storing sampled data. This is unsafe when the
> BPF helper runs in PMI context via bpf_overflow_handler(): it can
> overwrite the cached LBR state for active PEBS LBR events, causing
> incorrect LBR data to be reported to userspace. When the PEBS and BPF
> stacks have different depths, this can also lead to out-of-bounds reads
> when the LBR stack is later exported.
> 
> Use a dedicated LBR stack for BPF snapshotting so the BPF path no
> longer clobbers the shared LBR state used by other perf events.
> 
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Fixes: 425507fa5f32 ("perf/x86/intel/lbr: Optimize v4 LBR unfreezing")
> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>

AMD has the same problem, no?

> ---
>  arch/x86/events/intel/core.c | 16 +++++++++++-----
>  1 file changed, 11 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 5eda551cc9f2..482a148916bf 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -2819,18 +2819,24 @@ static void intel_pmu_enable_all(int added)
>  	__intel_pmu_enable_all(false);
>  }
>  
> +struct lbr_snapshot {
> +	struct perf_branch_stack stack;
> +	struct perf_branch_entry entries[MAX_LBR_ENTRIES];
> +	u64 counters[MAX_LBR_ENTRIES];
> +};
> +static DEFINE_PER_CPU(struct lbr_snapshot, lbr_snapshot);
> +
>  static noinline int
>  __intel_pmu_snapshot_branch_stack(struct perf_branch_entry *entries,
>  				  unsigned int cnt, unsigned long flags,
>  				  int pmu_enabled, int lbr_enabled)
>  {
> -	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> +	struct lbr_snapshot *bpf = this_cpu_ptr(&lbr_snapshot);
>  
> -	intel_pmu_lbr_read(&cpuc->lbr_stack,
> -			   cpuc->lbr_entries, cpuc->lbr_counters);
> -	cnt = min_t(unsigned int, cnt, cpuc->lbr_stack.nr);
> +	intel_pmu_lbr_read(&bpf->stack, bpf->entries, bpf->counters);
> +	cnt = min_t(unsigned int, cnt, bpf->stack.nr);
>  
> -	memcpy(entries, cpuc->lbr_entries,
> +	memcpy(entries, bpf->entries,
>  	       sizeof(struct perf_branch_entry) * cnt);
>  
>  	/*
> -- 
> 2.34.1
> 

  parent reply	other threads:[~2026-10-29 10:41 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-29  4:38 [Patch v5 00/18] perf/x86: Fix multiple LBR sampling issues Dapeng Mi
2026-10-29  4:38 ` [Patch v5 01/18] perf/x86: Disable LBR if x86_pmu.lbr_nr exceeds MAX_LBR_ENTRIES Dapeng Mi
2026-10-29  5:03   ` sashiko-bot
2026-10-29  9:38   ` Peter Zijlstra
2026-10-29  9:56     ` Mi, Dapeng
2026-10-29 10:19       ` Peter Zijlstra
2026-10-30  0:45         ` Mi, Dapeng
2026-10-29  4:38 ` [Patch v5 02/18] perf/x86/intel: Validate LBR XSAVE state before updating LBR stack Dapeng Mi
2026-10-29  5:11   ` sashiko-bot
2026-10-29  9:40   ` Peter Zijlstra
2026-10-29 10:09     ` Mi, Dapeng
2026-10-29  4:38 ` [Patch v5 03/18] perf/x86/amd/lbr: Limit branch snapshots to valid entries Dapeng Mi
2026-10-29  4:53   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 04/18] perf/x86/intel/lbr: " Dapeng Mi
2026-10-29  4:56   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 05/18] perf/x86: Add lbr_enabled to track LBR state Dapeng Mi
2026-10-29  5:10   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 06/18] perf/x86/amd: Avoid re-enabling PMU and LBR for BPF when disabled Dapeng Mi
2026-10-29  5:08   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 07/18] perf/x86/intel: Add helper to enable PMU without LBR Dapeng Mi
2026-10-29  4:51   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 08/18] perf/x86/intel: Avoid re-enabling PMU and LBR for BPF when disabled Dapeng Mi
2026-10-29  5:02   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 09/18] perf/x86/intel: Keep LBR frozen throughout PMI handling Dapeng Mi
2026-10-29  4:59   ` sashiko-bot
2026-10-29 10:29   ` Peter Zijlstra
2026-10-30  0:56     ` Mi, Dapeng
2026-10-29  4:39 ` [Patch v5 10/18] perf/x86/intel: Allow LBR read helpers to operate on explicit stacks Dapeng Mi
2026-10-29  4:58   ` sashiko-bot
2026-10-29 10:38   ` Peter Zijlstra
2026-10-30  1:05     ` Mi, Dapeng
2026-10-30  9:26       ` Peter Zijlstra
2026-10-30  9:35         ` Mi, Dapeng
2026-10-29  4:39 ` [Patch v5 11/18] perf/x86/intel: Use a dedicated LBR stack for BPF snapshotting Dapeng Mi
2026-10-29  5:05   ` sashiko-bot
2026-10-29 10:41   ` Peter Zijlstra [this message]
2026-10-30  1:44     ` Mi, Dapeng
2026-10-29  4:39 ` [Patch v5 12/18] perf/x86/intel: Always snapshot live hardware LBR state for BPF Dapeng Mi
2026-10-29  5:01   ` sashiko-bot
2026-10-29 10:56   ` Peter Zijlstra
2026-10-30  1:48     ` Mi, Dapeng
2026-10-29  4:39 ` [Patch v5 13/18] perf/x86/intel: Refresh LBR stack for non-PEBS LBR events if needed Dapeng Mi
2026-10-29  5:09   ` sashiko-bot
2026-10-29 11:00   ` Peter Zijlstra
2026-10-30  1:54     ` Mi, Dapeng
2026-10-30  9:30       ` Peter Zijlstra
2026-10-29  4:39 ` [Patch v5 14/18] perf/x86/intel: Account arch-PEBS in lbr_pebs_users Dapeng Mi
2026-10-29  4:55   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 15/18] perf/x86/intel: Clear raw LBR counters in the LBR stack Dapeng Mi
2026-10-29  5:03   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 16/18] perf/x86/intel: Refill LBR stack for LBR counter events in PMI handler Dapeng Mi
2026-10-29  5:16   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 17/18] perf/x86/intel: Pass LBR stack size into store_lbr() Dapeng Mi
2026-10-29  4:53   ` sashiko-bot
2026-10-29  4:39 ` [Patch v5 18/18] perf/core: Don't overwrite shared LBR stack depth Dapeng Mi
2026-10-29  4:57   ` sashiko-bot

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