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From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: sashiko-reviews@lists.linux.dev
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [RESEND Patch v10 12/23] perf: Add sampling support for SIMD registers
Date: Tue, 25 Aug 2026 09:19:22 +0800	[thread overview]
Message-ID: <31313fb4-52a8-45de-9fe1-abac05dd8b6d@linux.intel.com> (raw)
In-Reply-To: <20260824085454.7A65E1F000E9@smtp.kernel.org>


On 8/24/2026 4:54 PM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
>
> Pre-existing issues:
> - [High] Unbounded or improperly ordered SIMD register sample size calculation causes a `u16` size overflow in `perf_event_header.size`, leading to ring buffer memory corruption.
> --
>
> --- Patch [12]: [RESEND Patch v10 12/23] perf: Add sampling support for SIMD registers ---
> commit e9a1c0bea3274c1464a1ceda195d11e8cdb5abe5
> Author: Kan Liang <kan.liang@linux.intel.com>
> perf: Add sampling support for SIMD registers
>
> This patch introduces new attribute fields in struct perf_event_attr to
> specify and retrieve SIMD registers during profiling. It also adds the
> PERF_SAMPLE_REGS_ABI_SIMD flag and a new output format to indicate the
> configuration and contents of these wider registers when sampled.
>
>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>> index 801cf34cf519b..6cc655e7694d4 100644
>> --- a/kernel/events/core.c
>> +++ b/kernel/events/core.c
> [ ... ]
>> @@ -8775,6 +8866,10 @@ void perf_prepare_sample(struct perf_sample_data *data,
>>  			u64 mask = event->attr.sample_regs_intr;
>>  
>>  			size += hweight64(mask) * sizeof(u64);
>> +			if (event_has_simd_regs(event)) {
>> +				size += perf_update_xregs_size(event, true);
>> +				data->regs_intr.abi |= PERF_SAMPLE_REGS_ABI_SIMD;
>> +			}
>>  		}
>>  
>>  		data->dyn_size += size;
> [Severity: High]
> This is a pre-existing issue, but does adding potentially large SIMD
> registers here guarantee an overflow of the 16-bit event size?
>
> Looking at perf_prepare_sample() in kernel/events/core.c,
> PERF_SAMPLE_STACK_USER is processed before this and maximizes the stack
> dump size to fit within U16_MAX. By appending the size of SIMD registers
> (which could be up to 32KB) after the stack truncation step, the total
> dyn_size can easily exceed 65535 bytes if a user configures a perf event
> with both PERF_SAMPLE_STACK_USER (requesting near 64KB) and
> PERF_SAMPLE_REGS_INTR with SIMD registers enabled.
>
> When perf_prepare_header() later writes the total size to header->size,
> the value will be silently truncated because header->size is a u16. Can
> this lead to the kernel writing more data than it reserved, causing ring
> buffer memory corruption?

The next patch "perf/x86: Support XMM sampling using sample_simd_vec_reg_*
fields" would add extra check for the extended register size, it would
ensure the extended register size won't exceed U16_MAX / 2. Thanks.

    size = sizeof(u64) * 4;
    size += (hweight64(vec_mask) * vec_qwords +
         hweight32(pred_mask) * pred_qwords) * sizeof(u64);
    /*
     * INTR_REGS and USR_REGS could be sampled simultaneously,
     * so roughly restrict the size to half of U16_MAX.
     */
    if (size >= U16_MAX / 2)
        return -EINVAL;


>

  reply	other threads:[~2026-08-25  1:19 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-24  8:27 [RESEND Patch v10 00/23] Support SIMD/eGPRs/SSP registers sampling for perf Dapeng Mi
2026-08-24  8:27 ` [RESEND Patch v10 01/23] perf/x86: Move hybrid PMU initialization before x86_pmu_starting_cpu() Dapeng Mi
2026-08-24  8:44   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 02/23] perf/x86/intel: Enable large PEBS sampling for XMMs Dapeng Mi
2026-08-24  8:52   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 03/23] perf/x86/intel: Convert x86_perf_regs to per-cpu variables Dapeng Mi
2026-08-24  8:46   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 04/23] perf: Eliminate duplicate arch-specific function definitions Dapeng Mi
2026-08-24  8:44   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 05/23] perf/x86: Use x86_perf_regs in NMI handlers Dapeng Mi
2026-08-24  8:54   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 06/23] x86/fpu/xstate: Add xsaves_nmi() helper Dapeng Mi
2026-08-24  8:54   ` sashiko-bot
2026-08-25  1:03     ` Mi, Dapeng
2026-08-24  8:27 ` [RESEND Patch v10 07/23] x86/fpu: Add update_fpu_state_and_flag() helper Dapeng Mi
2026-08-24  8:47   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 08/23] perf: Move and enhance has_extended_regs() for arch-specific use Dapeng Mi
2026-08-24  8:47   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 09/23] perf/x86/intel: Centralize PERF_PMU_CAP_EXTENDED_REGS updates Dapeng Mi
2026-08-24  8:46   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 10/23] perf/x86: Enable XMM register sampling for non-PEBS events Dapeng Mi
2026-08-24  8:53   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 11/23] perf/x86: Enable XMM register sampling for REGS_USER case Dapeng Mi
2026-08-24 10:16   ` sashiko-bot
2026-08-25  1:13     ` Mi, Dapeng
2026-08-24  8:27 ` [RESEND Patch v10 12/23] perf: Add sampling support for SIMD registers Dapeng Mi
2026-08-24  8:54   ` sashiko-bot
2026-08-25  1:19     ` Mi, Dapeng [this message]
2026-08-24  8:27 ` [RESEND Patch v10 13/23] perf/x86: Support XMM sampling using sample_simd_vec_reg_* fields Dapeng Mi
2026-08-24  9:12   ` sashiko-bot
2026-08-25  1:28     ` Mi, Dapeng
2026-08-24  8:27 ` [RESEND Patch v10 14/23] perf/x86: Support YMM " Dapeng Mi
2026-08-24  8:55   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 15/23] perf/x86: Support ZMM " Dapeng Mi
2026-08-24  8:58   ` sashiko-bot
2026-08-25  1:30     ` Mi, Dapeng
2026-08-24  8:27 ` [RESEND Patch v10 16/23] perf/x86: Support OPMASK sampling using sample_simd_pred_reg_* fields Dapeng Mi
2026-08-24  8:54   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 17/23] perf: Enhance perf_reg_validate() with simd_enabled argument Dapeng Mi
2026-08-24  8:56   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 18/23] perf/x86: Support eGPRs sampling using sample_regs_* fields Dapeng Mi
2026-08-24  8:59   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 19/23] perf/x86: Support SSP " Dapeng Mi
2026-08-24  9:39   ` sashiko-bot
2026-08-25  1:34     ` Mi, Dapeng
2026-08-24  8:27 ` [RESEND Patch v10 20/23] perf/x86/intel: Support arch-PEBS based SIMD/eGPRs sampling Dapeng Mi
2026-08-24  9:09   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 21/23] perf/x86/intel: Advertise PERF_PMU_CAP_SIMD_REGS capability Dapeng Mi
2026-08-24  9:25   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 22/23] perf/x86: Activate back-to-back NMI detection for arch-PEBS induced NMIs Dapeng Mi
2026-08-24  9:06   ` sashiko-bot
2026-08-24  8:27 ` [RESEND Patch v10 23/23] perf/x86/intel: Add sanity check for PEBS record/fragment size Dapeng Mi
2026-08-24  9:08   ` sashiko-bot
2026-08-25  1:39     ` Mi, Dapeng
2026-09-01  8:55 ` [RESEND Patch v10 00/23] Support SIMD/eGPRs/SSP registers sampling for perf Mi, Dapeng
2026-09-02 11:56   ` Peter Zijlstra
2026-09-02 12:13     ` Mi, Dapeng

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