Re: [PATCH v3 14/21] perf annotate-arm64: Support load instruction tracking

[Namhyung Kim <namhyung@kernel.org>]

On Wed, Jul 01, 2026 at 04:37:52PM +0800, Tengda Wu wrote:
> 
> 
> On 2026/7/1 12:14, sashiko-bot@kernel.org wrote:
> > Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> > - [Medium] Missing invalidation of the destination register on type resolution failure during load instruction tracking.
> > - [Medium] The data type profiling logic ignores the second destination register of load pair (ldp) instructions, leading to stale state retention.
> > --
> > 
> > commit 579f01582f34ef50d993c4cb489f025353f8dbcc
> > Author: Tengda Wu <wutengda@huaweicloud.com>
> > 
> > perf annotate-arm64: Support load instruction tracking
> > 
> > This commit extends update_insn_state_arm64() to handle LDR instructions.
> > It tracks register state changes when data is loaded from memory to registers,
> > supporting signed offset, pre-index, and post-index addressing modes.
> > 
> >> diff --git a/tools/perf/util/annotate-arch/annotate-arm64.c b/tools/perf/util/annotate-arch/annotate-arm64.c
> >> index 48b1c94273eb6..b48545f35620c 100644
> >> --- a/tools/perf/util/annotate-arch/annotate-arm64.c
> >> +++ b/tools/perf/util/annotate-arch/annotate-arm64.c
> > 
> > [ ... ]
> > 
> >> +static void update_load_insn_state(struct type_state *state,
> >> +				   struct disasm_line *dl,
> >> +				   struct annotated_op_loc *src,
> >> +				   struct annotated_op_loc *dst)
> >> +{
> >> +	struct type_state_reg *tsr;
> >> +	struct type_state_reg src_tsr;
> >> +	Dwarf_Die type_die;
> >> +	u32 insn_offset = dl->al.offset;
> >> +	int reg_offset;
> >> +	int sreg = src->reg1;
> >> +	int dreg = dst->reg1;
> > 
> > [Severity: Medium]
> > Does this ignore the second destination register for load pair (ldp)
> > instructions?

Right, I think it's better to check "ldr" for this function.  Maybe you
can add another function for "ldp" to invalidate both registers for now.

Thanks,
Namhyung