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From: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
To: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	krishna.chundru@oss.qualcomm.com, quic_vbadigan@quicinc.com,
	quic_nayiluri@quicinc.com, quic_ramkri@quicinc.com,
	quic_nitegupt@quicinc.com,
	Mrinmay Sarkar <quic_msarkar@quicinc.com>,
	Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
Subject: [PATCH v3 2/2] arm64: dts: qcom: sa8775p: Remove max link speed property for PCIe EP
Date: Sun, 25 May 2025 11:27:18 +0530	[thread overview]
Message-ID: <20250525-update_phy-v3-2-5b315cd39993@quicinc.com> (raw)
In-Reply-To: <20250525-update_phy-v3-0-5b315cd39993@quicinc.com>

From: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>

The maximum link speed was previously restricted to Gen3 due to the
absence of Gen4 equalization support in the driver.

Add change to remove max link speed property, Since Gen4 equalization
support has already been added into the driver.

Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 5bd0c03476b143444543c68cd1c1d475c3302555..b001e9a30e863d8964219c8bd61bc328be71b256 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -6462,7 +6462,6 @@ pcie0_ep: pcie-ep@1c00000 {
 		power-domains = <&gcc PCIE_0_GDSC>;
 		phys = <&pcie0_phy>;
 		phy-names = "pciephy";
-		max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
 		num-lanes = <2>;
 		linux,pci-domain = <0>;
 
@@ -6620,7 +6619,6 @@ pcie1_ep: pcie-ep@1c10000 {
 		power-domains = <&gcc PCIE_1_GDSC>;
 		phys = <&pcie1_phy>;
 		phy-names = "pciephy";
-		max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
 		num-lanes = <4>;
 		linux,pci-domain = <1>;
 

-- 
2.25.1


-- 
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linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  parent reply	other threads:[~2025-05-25  5:57 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-25  5:57 [PATCH v3 0/2] Update PCIe PHY settings for QCS8300 and SA8775P Mrinmay Sarkar
2025-05-25  5:57 ` [PATCH v3 1/2] phy: qcom: qmp-pcie: Update PHY settings for QCS8300 & SA8775P Mrinmay Sarkar
2025-05-25  5:57 ` Mrinmay Sarkar [this message]
2025-05-25 13:29   ` [PATCH v3 2/2] arm64: dts: qcom: sa8775p: Remove max link speed property for PCIe EP Dmitry Baryshkov
2025-05-27 10:36     ` Konrad Dybcio
2025-05-30  5:38       ` Mrinmay Sarkar
2025-05-30 10:50         ` Konrad Dybcio
2025-05-30 10:56           ` Konrad Dybcio
2025-06-04  6:34             ` Mrinmay Sarkar

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