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From: Michael Riesch via B4 Relay <devnull+michael.riesch.collabora.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,  Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	 Philipp Zabel <p.zabel@pengutronix.de>,
	 Kever Yang <kever.yang@rock-chips.com>,
	 Jagan Teki <jagan@amarulasolutions.com>,
	 Sebastian Reichel <sebastian.reichel@collabora.com>,
	 Diederik de Haas <didi.debian@cknow.org>,
	 Neil Armstrong <neil.armstrong@linaro.org>,
	 Heiko Stuebner <heiko@sntech.de>,
	 Collabora Kernel Team <kernel@collabora.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	 linux-rockchip@lists.infradead.org,
	linux-kernel@vger.kernel.org,  linux-phy@lists.infradead.org,
	 Michael Riesch <michael.riesch@collabora.com>
Subject: [PATCH v3 3/7] dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant
Date: Mon, 01 Sep 2025 22:47:44 +0200	[thread overview]
Message-ID: <20250616-rk3588-csi-dphy-v3-3-a5ccd5f1f438@collabora.com> (raw)
In-Reply-To: <20250616-rk3588-csi-dphy-v3-0-a5ccd5f1f438@collabora.com>

From: Michael Riesch <michael.riesch@collabora.com>

The Rockchip RK3588 variant of the CSI-2 DPHY features two reset lines.
Add the variant and allow for the additional reset.

Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
 .../bindings/phy/rockchip-inno-csi-dphy.yaml       | 50 +++++++++++++++++++++-
 1 file changed, 49 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
index 9ad72518e6da..e37c9fd74788 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
@@ -21,6 +21,7 @@ properties:
       - rockchip,rk3326-csi-dphy
       - rockchip,rk3368-csi-dphy
       - rockchip,rk3568-csi-dphy
+      - rockchip,rk3588-csi-dphy
 
   reg:
     maxItems: 1
@@ -40,11 +41,15 @@ properties:
 
   resets:
     items:
-      - description: exclusive PHY reset line
+      - description: APB reset line
+      - description: PHY reset line
+    minItems: 1
 
   reset-names:
     items:
       - const: apb
+      - const: phy
+    minItems: 1
 
   rockchip,grf:
     $ref: /schemas/types.yaml#/definitions/phandle
@@ -64,6 +69,30 @@ allOf:
     then:
       required:
         - power-domains
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - rockchip,px30-csi-dphy
+              - rockchip,rk1808-csi-dphy
+              - rockchip,rk3326-csi-dphy
+              - rockchip,rk3368-csi-dphy
+              - rockchip,rk3568-csi-dphy
+    then:
+      properties:
+        resets:
+          maxItems: 1
+
+        reset-names:
+          maxItems: 1
+    else:
+      properties:
+        resets:
+          minItems: 2
+
+        reset-names:
+          minItems: 2
 
 required:
   - compatible
@@ -91,3 +120,22 @@ examples:
         reset-names = "apb";
         rockchip,grf = <&grf>;
     };
+  - |
+    #include <dt-bindings/clock/rockchip,rk3588-cru.h>
+    #include <dt-bindings/reset/rockchip,rk3588-cru.h>
+
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        phy@fedc0000 {
+            compatible = "rockchip,rk3588-csi-dphy";
+            reg = <0x0 0xfedc0000 0x0 0x8000>;
+            clocks = <&cru PCLK_CSIPHY0>;
+            clock-names = "pclk";
+            #phy-cells = <0>;
+            resets = <&cru SRST_P_CSIPHY0>, <&cru SRST_CSIPHY0>;
+            reset-names = "apb", "phy";
+            rockchip,grf = <&csidphy0_grf>;
+        };
+    };

-- 
2.39.5



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  parent reply	other threads:[~2025-09-01 23:26 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-01 20:47 [PATCH v3 0/7] phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant Michael Riesch via B4 Relay
2025-09-01 20:47 ` [PATCH v3 1/7] dt-bindings: soc: rockchip: add rk3588 csidphy grf syscon Michael Riesch via B4 Relay
2025-09-01 20:47 ` [PATCH v3 2/7] dt-bindings: phy: rockchip-inno-csi-dphy: make power-domains non-required Michael Riesch via B4 Relay
2025-09-01 21:07   ` Michael Riesch
2025-09-02  7:54   ` Krzysztof Kozlowski
2025-09-01 20:47 ` Michael Riesch via B4 Relay [this message]
2025-09-02  7:55   ` [PATCH v3 3/7] dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant Krzysztof Kozlowski
2025-09-02 10:14     ` Michael Riesch
2025-09-01 20:47 ` [PATCH v3 4/7] phy: rockchip: phy-rockchip-inno-csidphy: allow writes to grf register 0 Michael Riesch via B4 Relay
2025-09-01 20:47 ` [PATCH v3 5/7] phy: rockchip: phy-rockchip-inno-csidphy: allow for different reset lines Michael Riesch via B4 Relay
2025-09-01 20:47 ` [PATCH v3 6/7] phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant Michael Riesch via B4 Relay
2025-09-01 20:47 ` [PATCH v3 7/7] arm64: dts: rockchip: add mipi csi-2 dphy nodes to rk3588 Michael Riesch via B4 Relay
2025-09-02  0:00   ` Michael Riesch

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