From: Michael Riesch via B4 Relay <devnull+michael.riesch.collabora.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>, Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Kever Yang <kever.yang@rock-chips.com>,
Jagan Teki <jagan@amarulasolutions.com>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Diederik de Haas <didi.debian@cknow.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Collabora Kernel Team <kernel@collabora.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
Michael Riesch <michael.riesch@collabora.com>
Subject: [PATCH v3 7/7] arm64: dts: rockchip: add mipi csi-2 dphy nodes to rk3588
Date: Mon, 01 Sep 2025 22:47:48 +0200 [thread overview]
Message-ID: <20250616-rk3588-csi-dphy-v3-7-a5ccd5f1f438@collabora.com> (raw)
In-Reply-To: <20250616-rk3588-csi-dphy-v3-0-a5ccd5f1f438@collabora.com>
From: Michael Riesch <michael.riesch@collabora.com>
The Rockchip RK3588 features two MIPI CSI-2 DPHYs. Add the device
tree nodes for them.
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 33 +++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index 70f03e68ba55..eedf93247e9c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -621,6 +621,16 @@ php_grf: syscon@fd5b0000 {
reg = <0x0 0xfd5b0000 0x0 0x1000>;
};
+ csidphy0_grf: syscon@fd5b4000 {
+ compatible = "rockchip,rk3588-csidphy-grf", "syscon";
+ reg = <0x0 0xfd5b4000 0x0 0x1000>;
+ };
+
+ csidphy1_grf: syscon@fd5b5000 {
+ compatible = "rockchip,rk3588-csidphy-grf", "syscon";
+ reg = <0x0 0xfd5b5000 0x0 0x1000>;
+ };
+
pipe_phy0_grf: syscon@fd5bc000 {
compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
reg = <0x0 0xfd5bc000 0x0 0x100>;
@@ -3052,6 +3062,29 @@ mipidcphy1: phy@fedb0000 {
<&cru SRST_S_MIPI_DCPHY1>;
reset-names = "m_phy", "apb", "grf", "s_phy";
#phy-cells = <1>;
+ };
+
+ csi_dphy0: phy@fedc0000 {
+ compatible = "rockchip,rk3588-csi-dphy";
+ reg = <0x0 0xfedc0000 0x0 0x8000>;
+ clocks = <&cru PCLK_CSIPHY0>;
+ clock-names = "pclk";
+ #phy-cells = <0>;
+ resets = <&cru SRST_P_CSIPHY0>, <&cru SRST_CSIPHY0>;
+ reset-names = "apb", "phy";
+ rockchip,grf = <&csidphy0_grf>;
+ status = "disabled";
+ };
+
+ csi_dphy1: phy@fedc8000 {
+ compatible = "rockchip,rk3588-csi-dphy";
+ reg = <0x0 0xfedc8000 0x0 0x8000>;
+ clocks = <&cru PCLK_CSIPHY1>;
+ clock-names = "pclk";
+ #phy-cells = <0>;
+ resets = <&cru SRST_P_CSIPHY1>, <&cru SRST_CSIPHY1>;
+ reset-names = "apb", "phy";
+ rockchip,grf = <&csidphy1_grf>;
status = "disabled";
};
--
2.39.5
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-09-02 0:53 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-01 20:47 [PATCH v3 0/7] phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant Michael Riesch via B4 Relay
2025-09-01 20:47 ` [PATCH v3 1/7] dt-bindings: soc: rockchip: add rk3588 csidphy grf syscon Michael Riesch via B4 Relay
2025-09-01 20:47 ` [PATCH v3 2/7] dt-bindings: phy: rockchip-inno-csi-dphy: make power-domains non-required Michael Riesch via B4 Relay
2025-09-01 21:07 ` Michael Riesch
2025-09-02 7:54 ` Krzysztof Kozlowski
2025-09-01 20:47 ` [PATCH v3 3/7] dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant Michael Riesch via B4 Relay
2025-09-02 7:55 ` Krzysztof Kozlowski
2025-09-02 10:14 ` Michael Riesch
2025-09-01 20:47 ` [PATCH v3 4/7] phy: rockchip: phy-rockchip-inno-csidphy: allow writes to grf register 0 Michael Riesch via B4 Relay
2025-09-01 20:47 ` [PATCH v3 5/7] phy: rockchip: phy-rockchip-inno-csidphy: allow for different reset lines Michael Riesch via B4 Relay
2025-09-01 20:47 ` [PATCH v3 6/7] phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant Michael Riesch via B4 Relay
2025-09-01 20:47 ` Michael Riesch via B4 Relay [this message]
2025-09-02 0:00 ` [PATCH v3 7/7] arm64: dts: rockchip: add mipi csi-2 dphy nodes to rk3588 Michael Riesch
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