From: Vladimir Oltean <vladimir.oltean@nxp.com>
To: Tanjeff Moos <Tanjeff.Moos@westermo.com>
Cc: Sean Anderson <sean.anderson@seco.com>,
"linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>
Subject: Re: Lynx 10G SerDes Driver on my kernel
Date: Sun, 8 Feb 2026 15:42:11 +0200 [thread overview]
Message-ID: <20260208134211.3vsgebmvh7yhee5c@skbuf> (raw)
In-Reply-To: <1e508f4e-d9a7-4e06-8308-e2d67099e927@westermo.com>
On Thu, Feb 05, 2026 at 05:47:12PM +0100, Tanjeff Moos wrote:
> Question: How is the lane supposed to be enabled?
By a phy_init() and phy_power_on() sequence.
In current mainline this is done by the fman_memac driver:
https://elixir.bootlin.com/linux/v6.18.6/source/drivers/net/ethernet/freescale/fman/fman_memac.c#L526-L545
In LF I've moved the phy_init()
https://github.com/nxp-qoriq/linux/blob/lf-6.12.y/drivers/net/pcs/pcs-lynx.c#L563
and phy_power_on()
https://github.com/nxp-qoriq/linux/blob/lf-6.12.y/drivers/net/pcs/pcs-lynx.c#L435
to the Lynx PCS driver to simplify MAC drivers a little bit, since they
all have to go through the same steps (the Lynx PCS is present in dpaa1,
dpaa2, enetc, felix switch).
--
linux-phy mailing list
linux-phy@lists.infradead.org
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next prev parent reply other threads:[~2026-02-08 13:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-02 11:12 Lynx 10G SerDes Driver on my kernel Tanjeff Moos
2025-12-02 16:29 ` Vladimir Oltean
2025-12-03 11:41 ` Tanjeff Moos
2025-12-03 12:26 ` Vladimir Oltean
2025-12-03 16:25 ` Tanjeff Moos
2025-12-03 18:00 ` Vladimir Oltean
2025-12-04 19:01 ` Tanjeff Moos
2025-12-04 19:34 ` Vladimir Oltean
2025-12-05 11:38 ` Tanjeff Moos
2025-12-05 12:44 ` Vladimir Oltean
2025-12-08 16:50 ` Tanjeff Moos
2026-02-05 16:47 ` Tanjeff Moos
2026-02-08 13:42 ` Vladimir Oltean [this message]
2026-02-12 8:30 ` Tanjeff Moos
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