[PATCH 00/25] ARM: rockchip: Add peripheral support for RV1106

[PATCH 00/25] ARM: rockchip: Add peripheral support for RV1106

[Vladislav Leonov]

Basic support for the Rockchip RV1106/RV1103 SoCs currently under review.
This series builds on top of that and enables the peripherals needed to
bring up a board beyond a serial console:

 - CRU reset controller support (dt-bindings + clk driver), needed
   by most of the other peripherals below.
 - Ethernet (GMAC) via dwmac-rk.
 - USB2 PHY and USB3-OTG (DWC3).
 - I2C (rk3x).
 - DMA (PL330) + support DMA for the UART nodes.
 - SPI, including a new SCLK_IN_SPI1 clock gate.
 - RNG.
 - SDMMC1.
 - A dts-only quirk (arm,cpu-registers-not-fw-configured) needed on
   the ARM timer node when booting without a secure firmware that
   pre-configures the CPU timer registers.
 - PWM.

Each new dt-binding is added ahead of the driver and dts nodes that
depend on it, so the series bisects cleanly.

This series depends on:
 - "Add support for the Rockchip RV1106 and RV1103" (v3)
   https://lore.kernel.org/all/20260729133609.3465563-1-sjg@chromium.org

 - "pinctrl: Add support for the Rockchip RV1106" (v3)
   https://lore.kernel.org/all/20260729132736.3807082-1-sjg@chromium.org

Testing: boot-tested on custom RV1106 board, with every peripheral
touched by this series: reset/CRU, Ethernet, USB2 PHY/USB3 DWC3,
I2C, DMA+UART, SPI, RNG, SDMMC1 and PWM - exercised and confirmed working.


Vladislav Leonov (25):
  dt-bindings: reset: Add RV1106 CRU reset definitions
  clk: rockchip: Add reset controller support for RV1106
  ARM: dts: rockchip: Add reset bindings to RV1106
  dt-bindings: net: rockchip-dwmac: add RV1106 compatible
  net: ethernet: stmicro: stmmac: dwmac-rk: Add RV1106 support
  ARM: dts: rockchip: Add Ethernet GMAC node for RV1106
  dt-bindings: phy: rockchip,inno-usb2phy: Add RV1106 compatible
  phy: rockchip: inno-usb2: Add support for RV1106
  dt-bindings: usb: rockchip,dwc3: add RV1106 SoC support
  ARM: dts: rockchip: Add USB2 PHY and USB3-OTG (DWC3) nodes for RV1106
  dt-bindings: i2c: rk3x: Add RV1106 compatible
  ARM: dts: rockchip: Add I2C nodes for RV1106
  ARM: dts: rockchip: Add DMAC node for RV1106
  ARM: dts: rockchip: Add DMA support to UART nodes
  dt-bindings: clock: rockchip: Add SCLK_IN_SPI1 for RV1106
  clk: rockchip: Add SCLK_IN_SPI1 gate for RV1106
  dt-bindings: spi: rockchip: Add RV1106 compatible
  spi: rockchip: Add support for RV1106
  ARM: dts: rockchip: Add SPI nodes for RV1106
  dt-bindings: rng: rockchip: Add RV1106 compatible
  ARM: dts: rockchip: Add RNG node for RV1106
  ARM: dts: rockchip: Add SDMMC1 node for RV1106
  ARM: dts: rockchip: add arm,cpu-registers-not-fw-configured to RV1106
    timer node
  dt-bindings: pwm: rockchip: Add RV1106 compatible
  ARM: dts: rockchip: Add PWM nodes for RV1106

 .../devicetree/bindings/i2c/i2c-rk3x.yaml     |   1 +
 .../bindings/net/rockchip-dwmac.yaml          |   2 +
 .../bindings/phy/rockchip,inno-usb2phy.yaml   |   9 +-
 .../devicetree/bindings/pwm/pwm-rockchip.yaml |   8 +
 .../bindings/rng/rockchip,rk3588-rng.yaml     |  11 +-
 .../devicetree/bindings/spi/spi-rockchip.yaml |   5 +
 .../bindings/usb/rockchip,dwc3.yaml           |  35 +-
 arch/arm/boot/dts/rockchip/rv1106.dtsi        | 426 ++++++++++++++++++
 drivers/clk/rockchip/Makefile                 |   2 +-
 drivers/clk/rockchip/clk-rv1106.c             |   4 +
 drivers/clk/rockchip/clk.h                    |   1 +
 drivers/clk/rockchip/rst-rv1106.c             | 340 ++++++++++++++
 .../net/ethernet/stmicro/stmmac/dwmac-rk.c    |  55 +++
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c |  76 ++++
 drivers/spi/spi-rockchip.c                    |   1 +
 .../dt-bindings/clock/rockchip,rv1106-cru.h   |   2 +
 .../dt-bindings/reset/rockchip,rv1106-cru.h   | 305 +++++++++++++
 17 files changed, 1272 insertions(+), 11 deletions(-)
 create mode 100644 drivers/clk/rockchip/rst-rv1106.c
 create mode 100644 include/dt-bindings/reset/rockchip,rv1106-cru.h

---
base-commit: ac414f5eda0814030636177593400acdacfe5e1e
branch: rv1106

-- 
2.47.3


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[PATCH 07/25] dt-bindings: phy: rockchip,inno-usb2phy: Add RV1106 compatible

[Vladislav Leonov]

The RV1106 has a single USB2 PHY with only an OTG port. Its OTG port
also exposes a "disconnect" interrupt in addition to the existing
otg-bvalid/otg-id/linestate, needed for reliable HS device unplug
detection, so allow up to 4 interrupts for that variant.

Add the "rockchip,rv1106-usb2phy" compatible and require
"rockchip,usbgrf" for it, matching the other Rockchip PHYs that need
GRF access.

Signed-off-by: Vladislav Leonov <vlad@zlab.su>
---

 .../devicetree/bindings/phy/rockchip,inno-usb2phy.yaml   | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
index f50fc69fbbe4..4bc418376b18 100644
--- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
@@ -25,6 +25,7 @@ properties:
       - rockchip,rk3568-usb2phy
       - rockchip,rk3576-usb2phy
       - rockchip,rk3588-usb2phy
+      - rockchip,rv1106-usb2phy
       - rockchip,rv1108-usb2phy
 
   reg:
@@ -121,7 +122,7 @@ properties:
 
       interrupts:
         minItems: 1
-        maxItems: 3
+        maxItems: 4
 
       interrupt-names:
         oneOf:
@@ -131,6 +132,11 @@ properties:
               - const: otg-bvalid
               - const: otg-id
               - const: linestate
+          - items:
+              - const: otg-bvalid
+              - const: otg-id
+              - const: linestate
+              - const: disconnect
 
       phy-supply:
         description:
@@ -160,6 +166,7 @@ allOf:
             enum:
               - rockchip,rk3528-usb2phy
               - rockchip,rk3568-usb2phy
+              - rockchip,rv1106-usb2phy
               - rockchip,rv1108-usb2phy
     then:
       required:
-- 
2.47.3


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[PATCH 08/25] phy: rockchip: inno-usb2: Add support for RV1106

[Vladislav Leonov]

The RV1106 has a single USB2 PHY with only an OTG port, so add its
phy_cfgs entry with the OTG port's control/status/detect bit offsets
and charger-detection register layout.

Also add rv1106_usb2phy_tuning() to apply the vendor HS PHY tuning:
enable pre-emphasis in all line states, raise the Tx pre-emphasis
strength and eye height, increase the 45ohm HS ODT drive strength,
lower the Rx squelch trigger point, bypass squelch detector
calibration, disable the differential receiver to save power, and
switch the HS disconnect detector to single-ended mode (needed for
reliable unplug detection).

The register offsets and values are ported from the Rockchip vendor
BSP kernel; one difference is that the BSP driver additionally lowered
the Tx pre-emphasis strength on newer chip revisions via
rockchip_get_cpu_version(), which has no mainline equivalent, so only
the new revision's tuning value is kept here.

Signed-off-by: Vladislav Leonov <vlad@zlab.su>
---

 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 76 +++++++++++++++++++
 1 file changed, 76 insertions(+)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 7d8a533f24ae..ee24382a732a 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1617,6 +1617,38 @@ static int rk3588_usb2phy_tuning(struct rockchip_usb2phy *rphy)
 	return ret;
 }
 
+static int rv1106_usb2phy_tuning(struct rockchip_usb2phy *rphy)
+{
+	int ret;
+
+	/* Always enable pre-emphasis in SOF & EOP & chirp & non-chirp state */
+	ret = regmap_update_bits(rphy->phy_base, 0x30, GENMASK(2, 0), 0x07);
+
+	/* Set Tx HS pre_emphasize strength to 3'b001 */
+	ret |= regmap_update_bits(rphy->phy_base, 0x40, GENMASK(5, 3), 0x01 << 3);
+
+	/* Set RX Squelch trigger point configure to 4'b0000 (112.5 mV) */
+	ret |= regmap_update_bits(rphy->phy_base, 0x64, GENMASK(6, 3), 0x00 << 3);
+
+	/* Turn off differential receiver by default to save power */
+	ret |= regmap_update_bits(rphy->phy_base, 0x100, BIT(6), 0);
+
+	/* Set 45ohm HS ODT value to 5'b10111 to increase driver strength */
+	ret |= regmap_update_bits(rphy->phy_base, 0x11c, GENMASK(4, 0), 0x17);
+
+	/* Set Tx HS eye height tuning to 3'b011 (462 mV) */
+	ret |= regmap_update_bits(rphy->phy_base, 0x124, GENMASK(4, 2), 0x03 << 2);
+
+	/* Bypass Squelch detector calibration */
+	ret |= regmap_update_bits(rphy->phy_base, 0x1a4, GENMASK(7, 4), 0x01 << 4);
+	ret |= regmap_update_bits(rphy->phy_base, 0x1b4, GENMASK(7, 4), 0x01 << 4);
+
+	/* Set HS disconnect detect mode to single ended detect mode */
+	ret |= regmap_update_bits(rphy->phy_base, 0x70, BIT(2), BIT(2));
+
+	return ret;
+}
+
 static const struct rockchip_usb2phy_cfg rk3036_phy_cfgs[] = {
 	{
 		.reg = 0x17c,
@@ -2324,6 +2356,49 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rv1106_phy_cfgs[] = {
+	{
+		.reg = 0xff3e0000,
+		.num_ports	= 1,
+		.phy_tuning	= rv1106_usb2phy_tuning,
+		.clkout_ctl	= { 0x0058, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0050, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0100, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0104, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0108, 2, 2, 0, 1 },
+				.idfall_det_en	= { 0x0100, 5, 5, 0, 1 },
+				.idfall_det_st	= { 0x0104, 5, 5, 0, 1 },
+				.idfall_det_clr = { 0x0108, 5, 5, 0, 1 },
+				.idrise_det_en	= { 0x0100, 4, 4, 0, 1 },
+				.idrise_det_st	= { 0x0104, 4, 4, 0, 1 },
+				.idrise_det_clr = { 0x0108, 4, 4, 0, 1 },
+				.ls_det_en	= { 0x0100, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0104, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0108, 0, 0, 0, 1 },
+				.utmi_avalid	= { 0x0060, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x0060, 9, 9, 0, 1 },
+				.utmi_id	= { 0x0060, 6, 6, 0, 1 },
+				.utmi_ls	= { 0x0060, 5, 4, 0, 1 },
+			},
+		},
+		.chg_det = {
+			.opmode		= { 0x0050, 8, 0, 0, 0x1d7 },
+			.cp_det		= { 0x0060, 13, 13, 0, 1 },
+			.dcp_det	= { 0x0060, 12, 12, 0, 1 },
+			.dp_det		= { 0x0060, 14, 14, 0, 1 },
+			.idm_sink_en	= { 0x0058, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0058, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0058, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0058, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0058, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0058, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{
 		.reg = 0x100,
@@ -2380,6 +2455,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
 	{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
 	{ .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
 	{ .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
+	{ .compatible = "rockchip,rv1106-usb2phy", .data = &rv1106_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
 	{}
 };
-- 
2.47.3


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Re: [PATCH 00/25] ARM: rockchip: Add peripheral support for RV1106

[Jakub Kicinski]

On Mon, 10 Aug 2026 15:10:51 +0300 Vladislav Leonov wrote:
> Basic support for the Rockchip RV1106/RV1103 SoCs currently under review.
> This series builds on top of that and enables the peripherals needed to
> bring up a board beyond a serial console:

Don't expect maintainers to dig out patches for their subsystems
from a big series. This is not how upstream development works.
Repost 4+5 as a separate series to networking..

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