[PATCH V2 0/8] Enable USB host functions on Jetson AGX Thor

[PATCH V2 0/8] Enable USB host functions on Jetson AGX Thor

[Wayne Chang]

Enable support for USB host functions on the Tegra264 Jetson AGX Thor
platform

Sing-Han Chen (1):
  phy: tegra: xusb: Use devm_clk_get_optional to fetch USB2 tracking
    clock

Wayne Chang (7):
  dt-bindings: phy: tegra-xusb: Add support for Tegra264
  dt-bindings: usb: Add Tegra264 XUSB host support
  arm64: tegra: Enable XUSB host function on Jetson AGX Thor
  phy: tegra: xusb: Increase timeout for USB2_TRK_COMPLETED polling
  phy: tegra: xusb: Add Tegra264 support
  usb: host: xhci-tegra: Skip MBOX MSG_ENABLED on Tegra264
  usb: host: xhci-tegra: Add Tegra264 XHCI support

 .../phy/nvidia,tegra194-xusb-padctl.yaml      |   1 +
 .../bindings/usb/nvidia,tegra234-xusb.yaml    |  35 +++-
 .../arm64/boot/dts/nvidia/tegra264-p3834.dtsi |  50 ++++++
 .../dts/nvidia/tegra264-p4071-0000+p3834.dtsi |  95 +++++++++++
 arch/arm64/boot/dts/nvidia/tegra264.dtsi      | 154 ++++++++++++++++++
 drivers/phy/tegra/Makefile                    |   1 +
 drivers/phy/tegra/xusb-tegra186.c             |  31 +++-
 drivers/phy/tegra/xusb.c                      |   6 +
 drivers/phy/tegra/xusb.h                      |   3 +
 drivers/usb/host/xhci-tegra.c                 |  37 +++++
 10 files changed, 405 insertions(+), 8 deletions(-)


base-commit: 66498c75b4f8017f62d720d9b59675bdf3abce91
-- 
2.25.1


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[PATCH V2 1/8] dt-bindings: phy: tegra-xusb: Add support for Tegra264

[Wayne Chang]

Add the compatible string for the Tegra264 XUSB PHY.

Signed-off-by: Wayne Chang <waynec@nvidia.com>
---
V1 -> V2: No change
 .../devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml     | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml
index d8de900a4fce..f6fe3c90b5b0 100644
--- a/Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml
+++ b/Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml
@@ -45,6 +45,7 @@ properties:
     enum:
       - nvidia,tegra194-xusb-padctl
       - nvidia,tegra234-xusb-padctl
+      - nvidia,tegra264-xusb-padctl
 
   reg:
     items:
-- 
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[PATCH V2 2/8] dt-bindings: usb: Add Tegra264 XUSB host support

[Wayne Chang]

Extend the Tegra234 XUSB host binding to cover Tegra264:

- Add nvidia,tegra264-xusb compatible string
- Document optional USB wake interrupts for Tegra264
- Document Tegra264 PMC wake event to port mapping
- Allow up to five IOMMU specifiers for the additional XUSB host
  stream IDs

Signed-off-by: Wayne Chang <waynec@nvidia.com>
---
V1 -> V2: Property definitions are back at the top level with the widest
constraints, The allOf conditional only tightens Tegra234 to interrupts
maxItems 9 and iommus maxItems 1.

 .../bindings/usb/nvidia,tegra234-xusb.yaml    | 35 ++++++++++++++++---
 1 file changed, 30 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
index ec0993497fbb..d63f0db4224c 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
@@ -17,7 +17,9 @@ description: |
 
 properties:
   compatible:
-    const: nvidia,tegra234-xusb
+    enum:
+      - nvidia,tegra234-xusb
+      - nvidia,tegra264-xusb
 
   reg:
     items:
@@ -43,6 +45,7 @@ properties:
       - description: USB wake event 4
       - description: USB wake event 5
       - description: USB wake event 6
+      - description: USB wake event 7
     description: |
       The first two interrupts are required for the USB host controller. The
       remaining USB wake event interrupts are optional. Each USB wake event is
@@ -50,10 +53,9 @@ properties:
       platform. The USB host controller can function even if no wake-up events
       are defined. The USB wake event interrupts are handled by the Tegra PMC;
       hence, the interrupt controller for these is the PMC and the interrupt
-      IDs correspond to the PMC wake event IDs. A complete list of wake event
-      IDs is provided below, and this information is also present in the Tegra
-      TRM document.
+      IDs correspond to the PMC wake event IDs.
 
+      Tegra234 PMC wake events:
         PMC wake-up 76 for USB3 port 0 wakeup
         PMC wake-up 77 for USB3 port 1 wakeup
         PMC wake-up 78 for USB3 port 2 and port 3 wakeup
@@ -62,6 +64,16 @@ properties:
         PMC wake-up 81 for USB2 port 2 wakeup
         PMC wake-up 82 for USB2 port 3 wakeup
 
+      Tegra264 PMC wake events:
+        PMC wake-up 79 for USB3 port 0 wakeup
+        PMC wake-up 80 for USB3 port 1 wakeup
+        PMC wake-up 81 for USB3 port 2 wakeup
+        PMC wake-up 82 for USB3 port 3 wakeup
+        PMC wake-up 83 for USB2 port 0 wakeup
+        PMC wake-up 84 for USB2 port 1 wakeup
+        PMC wake-up 85 for USB2 port 2 wakeup
+        PMC wake-up 86 for USB2 port 3 wakeup
+
   clocks:
     items:
       - description: XUSB host clock
@@ -97,7 +109,8 @@ properties:
       - const: write
 
   iommus:
-    maxItems: 1
+    minItems: 1
+    maxItems: 5
 
   nvidia,xusb-padctl:
     $ref: /schemas/types.yaml#/definitions/phandle
@@ -137,6 +150,18 @@ properties:
 allOf:
   - $ref: usb-xhci.yaml
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: nvidia,tegra234-xusb
+    then:
+      properties:
+        interrupts:
+          maxItems: 9
+        iommus:
+          maxItems: 1
+
 unevaluatedProperties: false
 
 examples:
-- 
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[PATCH V2 3/8] arm64: tegra: Enable XUSB host function on Jetson AGX Thor

[Wayne Chang]

Enable XUSB host and pad controller on Jetson AGX Thor.

Signed-off-by: Wayne Chang <waynec@nvidia.com>
---
V1 -> V2: No change
 .../arm64/boot/dts/nvidia/tegra264-p3834.dtsi |  50 ++++++
 .../dts/nvidia/tegra264-p4071-0000+p3834.dtsi |  95 +++++++++++
 arch/arm64/boot/dts/nvidia/tegra264.dtsi      | 154 ++++++++++++++++++
 3 files changed, 299 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi
index 58cd81bc33d7..609c7e7d964d 100644
--- a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi
@@ -39,4 +39,54 @@ cmdqv@6200000 {
 			status = "okay";
 		};
 	};
+
+	bus@a800000000 {
+		padctl@8680000 {
+			vclamp-usb-supply = <&vdd_ao_1v8>;
+			avdd-usb-supply = <&vdd_ao_3v3>;
+
+			ports {
+				usb2-0 {
+					vbus-supply = <&vdd_5v0_sys>;
+				};
+
+				usb2-1 {
+					vbus-supply = <&vdd_5v0_sys>;
+				};
+
+				usb2-2 {
+					vbus-supply = <&vdd_5v0_sys>;
+				};
+
+				usb2-3 {
+					vbus-supply = <&vdd_5v0_sys>;
+				};
+			};
+		};
+	};
+
+	vdd_5v0_sys: regulator-vdd-5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "VIN_SYS_5V0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vdd_ao_1v8: regulator-vdd-1v8-ao {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-AO-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+	};
+
+	vdd_ao_3v3: regulator-vdd-3v3-ao {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-AO-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
 };
diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi
index 45f8df9bbfd6..9d6d0c31f881 100644
--- a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi
@@ -9,4 +9,99 @@ aliases {
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	bus@a800000000 {
+		padctl@8680000 {
+			status = "okay";
+
+			pads {
+				usb2 {
+					lanes {
+						usb2-0 {
+							status = "okay";
+						};
+
+						usb2-1 {
+							status = "okay";
+						};
+
+						usb2-2 {
+							status = "okay";
+						};
+
+						usb2-3 {
+							status = "okay";
+						};
+					};
+				};
+
+				usb3 {
+					lanes {
+						usb3-0 {
+							status = "okay";
+						};
+
+						usb3-1 {
+							status = "okay";
+						};
+
+						usb3-2 {
+							status = "okay";
+						};
+					};
+				};
+			};
+
+			ports {
+				usb2-0 {
+					mode = "host";
+					status = "okay";
+				};
+
+				usb2-1 {
+					mode = "host";
+					status = "okay";
+				};
+
+				usb2-2 {
+					mode = "host";
+					status = "okay";
+				};
+
+				usb2-3 {
+					mode = "host";
+					status = "okay";
+				};
+
+				usb3-0 {
+					nvidia,usb2-companion = <1>;
+					status = "okay";
+				};
+
+				usb3-1 {
+					nvidia,usb2-companion = <0>;
+					status = "okay";
+				};
+
+				usb3-2 {
+					nvidia,usb2-companion = <3>;
+					status = "okay";
+				};
+			};
+		};
+
+		usb@aa10000 {
+			status = "okay";
+
+			phys = <&{/bus@a800000000/padctl@8680000/pads/usb2/lanes/usb2-0}>,
+			       <&{/bus@a800000000/padctl@8680000/pads/usb2/lanes/usb2-1}>,
+			       <&{/bus@a800000000/padctl@8680000/pads/usb2/lanes/usb2-2}>,
+			       <&{/bus@a800000000/padctl@8680000/pads/usb2/lanes/usb2-3}>,
+			       <&{/bus@a800000000/padctl@8680000/pads/usb3/lanes/usb3-0}>,
+			       <&{/bus@a800000000/padctl@8680000/pads/usb3/lanes/usb3-1}>,
+			       <&{/bus@a800000000/padctl@8680000/pads/usb3/lanes/usb3-2}>;
+			phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3",
+				    "usb3-0", "usb3-1", "usb3-2";
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
index 013228a81723..e59b1b0a5b92 100644
--- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
@@ -4147,6 +4147,160 @@ pci@8480000 {
 			nvidia,bpmp = <&bpmp 5>;
 			status = "disabled";
 		};
+
+		xusb_padctl: padctl@8680000 {
+			compatible = "nvidia,tegra264-xusb-padctl";
+			reg = <0x00 0x8680000 0x00 0x20000>,
+			      <0x00 0x86a0000 0x00 0x10000>;
+			reg-names = "padctl", "ao";
+			interrupts = <GIC_SPI 4101 IRQ_TYPE_LEVEL_HIGH>;
+
+			resets = <&bpmp TEGRA264_RESET_XUSB1_PADCTL>;
+			reset-names = "padctl";
+
+			status = "disabled";
+
+			pads {
+				usb2 {
+					lanes {
+						usb2-0 {
+							nvidia,function = "xusb";
+							status = "disabled";
+							#phy-cells = <0>;
+						};
+
+						usb2-1 {
+							nvidia,function = "xusb";
+							status = "disabled";
+							#phy-cells = <0>;
+						};
+
+						usb2-2 {
+							nvidia,function = "xusb";
+							status = "disabled";
+							#phy-cells = <0>;
+						};
+
+						usb2-3 {
+							nvidia,function = "xusb";
+							status = "disabled";
+							#phy-cells = <0>;
+						};
+					};
+				};
+
+				usb3 {
+					lanes {
+						usb3-0 {
+							nvidia,function = "xusb";
+							status = "disabled";
+							#phy-cells = <0>;
+						};
+
+						usb3-1 {
+							nvidia,function = "xusb";
+							status = "disabled";
+							#phy-cells = <0>;
+						};
+
+						usb3-2 {
+							nvidia,function = "xusb";
+							status = "disabled";
+							#phy-cells = <0>;
+						};
+
+						usb3-3 {
+							nvidia,function = "xusb";
+							status = "disabled";
+							#phy-cells = <0>;
+						};
+					};
+				};
+			};
+
+			ports {
+				usb2-0 {
+					status = "disabled";
+				};
+
+				usb2-1 {
+					status = "disabled";
+				};
+
+				usb2-2 {
+					status = "disabled";
+				};
+
+				usb2-3 {
+					status = "disabled";
+				};
+
+				usb3-0 {
+					status = "disabled";
+				};
+
+				usb3-1 {
+					status = "disabled";
+				};
+
+				usb3-2 {
+					status = "disabled";
+				};
+
+				usb3-3 {
+					status = "disabled";
+				};
+			};
+		};
+
+		usb@aa10000 {
+			compatible = "nvidia,tegra264-xusb";
+			reg = <0x00 0xaa10000 0x00 0x40000>,
+			      <0x00 0xaa00000 0x00 0x10000>,
+			      <0x00 0xaa50000 0x00 0x10000>;
+			reg-names = "hcd", "fpci", "bar2";
+
+			interrupts-extended = <&gic GIC_SPI 952 IRQ_TYPE_LEVEL_HIGH>,
+						  <&gic GIC_SPI 4096 IRQ_TYPE_LEVEL_HIGH>,
+						  <&pmc 79 IRQ_TYPE_LEVEL_HIGH>,
+						  <&pmc 80 IRQ_TYPE_LEVEL_HIGH>,
+						  <&pmc 81 IRQ_TYPE_LEVEL_HIGH>,
+						  <&pmc 82 IRQ_TYPE_LEVEL_HIGH>,
+						  <&pmc 83 IRQ_TYPE_LEVEL_HIGH>,
+						  <&pmc 84 IRQ_TYPE_LEVEL_HIGH>,
+						  <&pmc 85 IRQ_TYPE_LEVEL_HIGH>,
+						  <&pmc 86 IRQ_TYPE_LEVEL_HIGH>;
+
+			clocks = <&bpmp TEGRA264_CLK_XUSB1_CORE_HOST>,
+				<&bpmp TEGRA264_CLK_XUSB1_FALCON>,
+				<&bpmp TEGRA264_CLK_XUSB1_CORE_SUPERSPEED>,
+				<&bpmp TEGRA264_CLK_XUSB1_SS>,
+				<&bpmp TEGRA264_CLK_OSC>,
+				<&bpmp TEGRA264_CLK_XUSB1_FS>,
+				<&bpmp TEGRA264_CLK_UTMI_PLL1>,
+				<&bpmp TEGRA264_CLK_OSC>,
+				<&bpmp TEGRA264_CLK_PLLE0>;
+			clock-names = "xusb_host", "xusb_falcon_src",
+				      "xusb_ss", "xusb_ss_src", "xusb_hs_src",
+				      "xusb_fs_src", "pll_u_480m", "clk_m",
+				      "pll_e";
+			interconnects = <&mc TEGRA264_MEMORY_CLIENT_XUSB_DEVR &emc>,
+					<&mc TEGRA264_MEMORY_CLIENT_XUSB_DEVW &emc>;
+			interconnect-names = "dma-mem", "write";
+			iommus = <&smmu1 TEGRA264_SID_XUSB_DEV>,
+				<&smmu1 TEGRA264_SID_XUSB_DEV1>,
+				<&smmu1 TEGRA264_SID_XUSB_DEV2>,
+				<&smmu1 TEGRA264_SID_XUSB_DEV3>,
+				<&smmu1 TEGRA264_SID_XUSB_DEV4>;
+
+			power-domains = <&bpmp TEGRA264_POWER_DOMAIN_XUSB_HOST>,
+					<&bpmp TEGRA264_POWER_DOMAIN_XUSB_SS>;
+			power-domain-names = "xusb_host", "xusb_ss";
+
+			nvidia,xusb-padctl = <&xusb_padctl>;
+			dma-coherent;
+			status = "disabled";
+		};
 	};
 
 	bpmp: bpmp {
-- 
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[PATCH V2 4/8] phy: tegra: xusb: Use devm_clk_get_optional to fetch USB2 tracking clock

[Wayne Chang]

From: Sing-Han Chen <singhanc@nvidia.com>

The USB2 PAD tracking clock is an optional clock so use
devm_clk_get_optional() so a missing clock in devicetree is
represented as NULL and probe can continue. clk_prepare_enable()
and clk_disable_unprepare() already treat a NULL clock as a no-op.

Signed-off-by: Sing-Han Chen <singhanc@nvidia.com>
Signed-off-by: Wayne Chang <waynec@nvidia.com>
---
V1 -> V2: No change
 drivers/phy/tegra/xusb-tegra186.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/phy/tegra/xusb-tegra186.c b/drivers/phy/tegra/xusb-tegra186.c
index 60156aea2707..800be0cbb3f9 100644
--- a/drivers/phy/tegra/xusb-tegra186.c
+++ b/drivers/phy/tegra/xusb-tegra186.c
@@ -1045,7 +1045,7 @@ tegra186_usb2_pad_probe(struct tegra_xusb_padctl *padctl,
 		goto out;
 	}
 
-	priv->usb2_trk_clk = devm_clk_get(&pad->dev, "trk");
+	priv->usb2_trk_clk = devm_clk_get_optional(&pad->dev, "trk");
 	if (IS_ERR(priv->usb2_trk_clk)) {
 		err = PTR_ERR(priv->usb2_trk_clk);
 		dev_dbg(&pad->dev, "failed to get usb2 trk clock: %d\n", err);
-- 
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[PATCH V2 5/8] phy: tegra: xusb: Increase timeout for USB2_TRK_COMPLETED polling

[Wayne Chang]

On Tegra264, the UTMI bias tracking circuit runs at 1 MHz and needs
more cycles for the biases to settle than on earlier SoCs such as
Tegra234. The existing timeout is therefore not long enough and can
cause spurious polling failures during bias pad power-on. Therefore,
increase the timeout to 200 cycles to support Tegra264 devices

Signed-off-by: Wayne Chang <waynec@nvidia.com>
---
V1 -> V2: No change
 drivers/phy/tegra/xusb-tegra186.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/phy/tegra/xusb-tegra186.c b/drivers/phy/tegra/xusb-tegra186.c
index 800be0cbb3f9..9c1bcd4a72ac 100644
--- a/drivers/phy/tegra/xusb-tegra186.c
+++ b/drivers/phy/tegra/xusb-tegra186.c
@@ -636,7 +636,7 @@ static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl)
 
 	if (padctl->soc->poll_trk_completed) {
 		err = padctl_readl_poll(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1,
-					USB2_TRK_COMPLETED, USB2_TRK_COMPLETED, 100);
+					USB2_TRK_COMPLETED, USB2_TRK_COMPLETED, 200);
 		if (err) {
 			/* The failure with polling on trk complete will not
 			 * cause the failure of powering on the bias pad.
-- 
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[PATCH V2 6/8] phy: tegra: xusb: Add Tegra264 support

[Wayne Chang]

Add support for the XUSB pad controller for Tegra264. Most of
the Tegra264 XUSB PADCTL registers definition and programming sequence
are the same as Tegra234, Tegra264 XUSB PADCTL can share the same
driver with Tegra186, Tegra194, and Tegra234 XUSB PADCTL.

Signed-off-by: Wayne Chang <waynec@nvidia.com>
---
V1 -> V2 : Rebase and update the has_per_pad_term for Tegra264
 drivers/phy/tegra/Makefile        |  1 +
 drivers/phy/tegra/xusb-tegra186.c | 27 ++++++++++++++++++++++++++-
 drivers/phy/tegra/xusb.c          |  6 ++++++
 drivers/phy/tegra/xusb.h          |  3 +++
 4 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/tegra/Makefile b/drivers/phy/tegra/Makefile
index eeeea72de117..33a695d4ed59 100644
--- a/drivers/phy/tegra/Makefile
+++ b/drivers/phy/tegra/Makefile
@@ -8,4 +8,5 @@ phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_210_SOC) += xusb-tegra210.o
 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_186_SOC) += xusb-tegra186.o
 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_194_SOC) += xusb-tegra186.o
 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_234_SOC) += xusb-tegra186.o
+phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_264_SOC) += xusb-tegra186.o
 obj-$(CONFIG_PHY_TEGRA194_P2U) += phy-tegra194-p2u.o
diff --git a/drivers/phy/tegra/xusb-tegra186.c b/drivers/phy/tegra/xusb-tegra186.c
index 9c1bcd4a72ac..322efdea0d80 100644
--- a/drivers/phy/tegra/xusb-tegra186.c
+++ b/drivers/phy/tegra/xusb-tegra186.c
@@ -1668,7 +1668,8 @@ EXPORT_SYMBOL_GPL(tegra186_xusb_padctl_soc);
 #endif
 
 #if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
-	IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
+	IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) || \
+	IS_ENABLED(CONFIG_ARCH_TEGRA_264_SOC)
 static const char * const tegra194_xusb_padctl_supply_names[] = {
 	"avdd-usb",
 	"vclamp-usb",
@@ -1753,6 +1754,30 @@ const struct tegra_xusb_padctl_soc tegra234_xusb_padctl_soc = {
 	.has_per_pad_term = true,
 };
 EXPORT_SYMBOL_GPL(tegra234_xusb_padctl_soc);
+
+const struct tegra_xusb_padctl_soc tegra264_xusb_padctl_soc = {
+	.num_pads = ARRAY_SIZE(tegra194_pads),
+	.pads = tegra194_pads,
+	.ports = {
+		.usb2 = {
+			.ops = &tegra186_usb2_port_ops,
+			.count = 4,
+		},
+		.usb3 = {
+			.ops = &tegra186_usb3_port_ops,
+			.count = 4,
+		},
+	},
+	.ops = &tegra186_xusb_padctl_ops,
+	.supply_names = tegra194_xusb_padctl_supply_names,
+	.num_supplies = ARRAY_SIZE(tegra194_xusb_padctl_supply_names),
+	.supports_gen2 = true,
+	.poll_trk_completed = true,
+	.trk_hw_mode = true,
+	.supports_lp_cfg_en = true,
+	.has_per_pad_term = true,
+};
+EXPORT_SYMBOL_GPL(tegra264_xusb_padctl_soc);
 #endif
 
 MODULE_AUTHOR("JC Kuo <jckuo@nvidia.com>");
diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c
index 9d74c0ecc31b..d0d0b252a205 100644
--- a/drivers/phy/tegra/xusb.c
+++ b/drivers/phy/tegra/xusb.c
@@ -77,6 +77,12 @@ static const struct of_device_id tegra_xusb_padctl_of_match[] = {
 		.compatible = "nvidia,tegra234-xusb-padctl",
 		.data = &tegra234_xusb_padctl_soc,
 	},
+#endif
+#if defined(CONFIG_ARCH_TEGRA_264_SOC)
+	{
+		.compatible = "nvidia,tegra264-xusb-padctl",
+		.data = &tegra264_xusb_padctl_soc,
+	},
 #endif
 	{ }
 };
diff --git a/drivers/phy/tegra/xusb.h b/drivers/phy/tegra/xusb.h
index 77609e54de66..d8d799d9e752 100644
--- a/drivers/phy/tegra/xusb.h
+++ b/drivers/phy/tegra/xusb.h
@@ -514,5 +514,8 @@ extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;
 #if defined(CONFIG_ARCH_TEGRA_234_SOC)
 extern const struct tegra_xusb_padctl_soc tegra234_xusb_padctl_soc;
 #endif
+#if defined(CONFIG_ARCH_TEGRA_264_SOC)
+extern const struct tegra_xusb_padctl_soc tegra264_xusb_padctl_soc;
+#endif
 
 #endif /* __PHY_TEGRA_XUSB_H */
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[PATCH V2 7/8] usb: host: xhci-tegra: Skip MBOX MSG_ENABLED on Tegra264

[Wayne Chang]

Tegra264 XUSB does not use the firmware mailbox handshake to enable
controller messages (MBOX_CMD_MSG_ENABLED). Add a per-SoC flag and
short-circuit __tegra_xusb_enable_firmware_messages() so both probe
and resume avoid sending the command.

Signed-off-by: Wayne Chang <waynec@nvidia.com>
---
V1 -> V2: No change
 drivers/usb/host/xhci-tegra.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index e7e6d569f1db..7d56f35ec9e7 100644
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -250,6 +250,7 @@ struct tegra_xusb_soc {
 	bool otg_set_port_power;
 
 	bool has_bar2;
+	bool enable_firmware_messages;
 };
 
 struct tegra_xusb_context {
@@ -1260,6 +1261,9 @@ static int __tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra)
 	struct tegra_xusb_mbox_msg msg;
 	int err;
 
+	if (!tegra->soc->enable_firmware_messages)
+		return 0;
+
 	/* Enable firmware messages from controller. */
 	msg.cmd = MBOX_CMD_MSG_ENABLED;
 	msg.data = 0;
@@ -2580,6 +2584,7 @@ static const struct tegra_xusb_soc tegra124_soc = {
 		.owner = 0xf0,
 		.smi_intr = XUSB_CFG_ARU_SMI_INTR,
 	},
+	.enable_firmware_messages = true,
 };
 #if IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_132_SOC)
 MODULE_FIRMWARE("nvidia/tegra124/xusb.bin");
@@ -2621,6 +2626,7 @@ static const struct tegra_xusb_soc tegra210_soc = {
 		.owner = 0xf0,
 		.smi_intr = XUSB_CFG_ARU_SMI_INTR,
 	},
+	.enable_firmware_messages = true,
 };
 #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
 MODULE_FIRMWARE("nvidia/tegra210/xusb.bin");
@@ -2670,6 +2676,7 @@ static const struct tegra_xusb_soc tegra186_soc = {
 		.smi_intr = XUSB_CFG_ARU_SMI_INTR,
 	},
 	.lpm_support = true,
+	.enable_firmware_messages = true,
 };
 
 static const char * const tegra194_supply_names[] = {
@@ -2704,6 +2711,7 @@ static const struct tegra_xusb_soc tegra194_soc = {
 		.smi_intr = XUSB_CFG_ARU_SMI_INTR,
 	},
 	.lpm_support = true,
+	.enable_firmware_messages = true,
 };
 #if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC)
 MODULE_FIRMWARE("nvidia/tegra194/xusb.bin");
@@ -2741,6 +2749,7 @@ static const struct tegra_xusb_soc tegra234_soc = {
 	},
 	.lpm_support = true,
 	.has_bar2 = true,
+	.enable_firmware_messages = true,
 };
 
 static const struct of_device_id tegra_xusb_of_match[] = {
-- 
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[PATCH V2 8/8] usb: host: xhci-tegra: Add Tegra264 XHCI support

[Wayne Chang]

This change adds Tegra264 XUSB host mode controller support.
The host controller is very similar to the existing Tegra234 XHCI,
except the number of max_num_wakes.

Signed-off-by: Wayne Chang <waynec@nvidia.com>
---
V1 -> V2: No change
 drivers/usb/host/xhci-tegra.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index 7d56f35ec9e7..9a55d5818efb 100644
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -2752,12 +2752,40 @@ static const struct tegra_xusb_soc tegra234_soc = {
 	.enable_firmware_messages = true,
 };
 
+static const struct tegra_xusb_soc tegra264_soc = {
+	.supply_names = tegra194_supply_names,
+	.num_supplies = ARRAY_SIZE(tegra194_supply_names),
+	.phy_types = tegra194_phy_types,
+	.num_types = ARRAY_SIZE(tegra194_phy_types),
+	.max_num_wakes = 8,
+	.context = &tegra186_xusb_context,
+	.ports = {
+		.usb3 = { .offset = 0, .count = 4, },
+		.usb2 = { .offset = 4, .count = 4, },
+	},
+	.scale_ss_clock = false,
+	.has_ipfs = false,
+	.otg_reset_sspi = false,
+	.ops = &tegra234_ops,
+	.mbox = {
+		.cmd = XUSB_BAR2_ARU_MBOX_CMD,
+		.data_in = XUSB_BAR2_ARU_MBOX_DATA_IN,
+		.data_out = XUSB_BAR2_ARU_MBOX_DATA_OUT,
+		.owner = XUSB_BAR2_ARU_MBOX_OWNER,
+		.smi_intr = XUSB_BAR2_ARU_SMI_INTR,
+	},
+	.lpm_support = true,
+	.has_bar2 = true,
+	.enable_firmware_messages = false,
+};
+
 static const struct of_device_id tegra_xusb_of_match[] = {
 	{ .compatible = "nvidia,tegra124-xusb", .data = &tegra124_soc },
 	{ .compatible = "nvidia,tegra210-xusb", .data = &tegra210_soc },
 	{ .compatible = "nvidia,tegra186-xusb", .data = &tegra186_soc },
 	{ .compatible = "nvidia,tegra194-xusb", .data = &tegra194_soc },
 	{ .compatible = "nvidia,tegra234-xusb", .data = &tegra234_soc },
+	{ .compatible = "nvidia,tegra264-xusb", .data = &tegra264_soc },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, tegra_xusb_of_match);
-- 
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Re: [PATCH V2 3/8] arm64: tegra: Enable XUSB host function on Jetson AGX Thor

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incorrect use of the GIC_SPI macro for GICv3 Extended SPIs (ESPIs), leading to invalid hardware IRQ mapping and kernel warnings at boot.
--

commit 25f7b692b008d6ac4dd9bcab2f8ae074b1c59801
Author: Wayne Chang <waynec@nvidia.com>

arm64: tegra: Enable XUSB host function on Jetson AGX Thor
    
Enable XUSB host and pad controller on Jetson AGX Thor.

> diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
> index 013228a817237..e59b1b0a5b925 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
> @@ -4147,6 +4147,160 @@ pci@8480000 {
>  			nvidia,bpmp = <&bpmp 5>;
>  			status = "disabled";
>  		};
> +
> +		xusb_padctl: padctl@8680000 {
> +			compatible = "nvidia,tegra264-xusb-padctl";
> +			reg = <0x00 0x8680000 0x00 0x20000>,
> +			      <0x00 0x86a0000 0x00 0x10000>;
> +			reg-names = "padctl", "ao";
> +			interrupts = <GIC_SPI 4101 IRQ_TYPE_LEVEL_HIGH>;

[Severity: Medium]
Does this use of GIC_SPI for INTID 4101 lead to an incorrect hardware IRQ
mapping?

The GICv3 DT bindings limit GIC_SPI indices to 0-987. During system boot,
when parsing the device tree to set up interrupts for padctl@8680000, indices
greater than 987 emit a warning and map to index + 32, which would compute to
4133 instead of 4101.

Should this use the GIC_ESPI macro with a 0-based index (e.g., GIC_ESPI 5) to
correctly specify the ESPI?

[ ... ]

> +		usb@aa10000 {
> +			compatible = "nvidia,tegra264-xusb";
> +			reg = <0x00 0xaa10000 0x00 0x40000>,
> +			      <0x00 0xaa00000 0x00 0x10000>,
> +			      <0x00 0xaa50000 0x00 0x10000>;
> +			reg-names = "hcd", "fpci", "bar2";
> +
> +			interrupts-extended = <&gic GIC_SPI 952 IRQ_TYPE_LEVEL_HIGH>,
> +						  <&gic GIC_SPI 4096 IRQ_TYPE_LEVEL_HIGH>,

[Severity: Medium]
Similarly, does this map to the wrong hardware interrupt (4128 instead of
4096) due to the use of GIC_SPI for an ESPI?

This will likely trigger a "SPI 4096 out of range (use ESPI?)" warning during
boot when parsing the usb@aa10000 node, and could break USB functionality.

Should this use GIC_ESPI 0 instead?

> +						  <&pmc 79 IRQ_TYPE_LEVEL_HIGH>,
> +						  <&pmc 80 IRQ_TYPE_LEVEL_HIGH>,

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Re: [PATCH V2 4/8] phy: tegra: xusb: Use devm_clk_get_optional to fetch USB2 tracking clock

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

Pre-existing issues:
- [High] Double free of the pad structure on the `tegra_xusb_pad_init()` error path.
- [High] Improper use of `device_unregister()` for an un-added device causes a NULL pointer dereference.
--

commit 0aeed6fcdb21e8c89c88a750c7002793b60d83d1
Author: Sing-Han Chen <singhanc@nvidia.com>

phy: tegra: xusb: Use devm_clk_get_optional to fetch USB2 tracking clock

This commit updates the USB2 PAD tracking clock fetching to use
devm_clk_get_optional, allowing the probe to continue if the optional
tracking clock is missing in the devicetree.

> diff --git a/drivers/phy/tegra/xusb-tegra186.c b/drivers/phy/tegra/xusb-tegra186.c
> --- a/drivers/phy/tegra/xusb-tegra186.c
> +++ b/drivers/phy/tegra/xusb-tegra186.c
> @@ -1045,7 +1045,7 @@ tegra186_usb2_pad_probe(struct tegra_xusb_padctl *padctl,
>  		goto out;
>  	}

[Severity: High]
This isn't a bug introduced by this patch, but while reviewing the error
handling around this initialization, I noticed a couple of pre-existing
issues in the failure path of tegra_xusb_pad_init() just above this change.

If dev_set_name() or device_add() fails in tegra_xusb_pad_init(), it jumps
to the unregister label and calls device_unregister(&pad->dev).

First, does calling device_unregister() on a device that was never fully 
added cause a NULL pointer dereference? Since device_add() failed or wasn't
called, dev->p would be NULL. When device_del() is called internally, it
attempts to access dev->p->knode_parent, which seems like it would crash.
Should this strictly use put_device(&pad->dev) instead?

Second, if tegra_xusb_pad_init() fails, calling device_unregister() drops
the reference count to 0, which triggers tegra_xusb_pad_release() and its
associated pad-specific remove callback, executing the first free. However,
when the error is returned here to tegra186_usb2_pad_probe(), the code
explicitly calls kfree(usb2). Could this result in a double-free of the
usb2 structure?

> -	priv->usb2_trk_clk = devm_clk_get(&pad->dev, "trk");
> +	priv->usb2_trk_clk = devm_clk_get_optional(&pad->dev, "trk");
>  	if (IS_ERR(priv->usb2_trk_clk)) {
>  		err = PTR_ERR(priv->usb2_trk_clk);
>  		dev_dbg(&pad->dev, "failed to get usb2 trk clock: %d\n", err);

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Re: [PATCH V2 1/8] dt-bindings: phy: tegra-xusb: Add support for Tegra264

[Krzysztof Kozlowski]

On Tue, Sep 01, 2026 at 02:58:28AM +0800, Wayne Chang wrote:
> Add the compatible string for the Tegra264 XUSB PHY.

Same questions as v1. You will get exactly the same one at v3 if it is
not unaswered here.

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Re: [PATCH V2 2/8] dt-bindings: usb: Add Tegra264 XUSB host support

[Krzysztof Kozlowski]

On Tue, Sep 01, 2026 at 02:58:29AM +0800, Wayne Chang wrote:
> Extend the Tegra234 XUSB host binding to cover Tegra264:
> 
> - Add nvidia,tegra264-xusb compatible string
> - Document optional USB wake interrupts for Tegra264
> - Document Tegra264 PMC wake event to port mapping
> - Allow up to five IOMMU specifiers for the additional XUSB host
>   stream IDs
> 
> Signed-off-by: Wayne Chang <waynec@nvidia.com>

Why are USB patches mixed with DTS and phy ones? That's like three
separate subsystems, of which Greg explicitly said many, many times he
takes everything or nothing. Please read submitting patches in DT.



> ---
> V1 -> V2: Property definitions are back at the top level with the widest
> constraints, The allOf conditional only tightens Tegra234 to interrupts
> maxItems 9 and iommus maxItems 1.
> 
>  .../bindings/usb/nvidia,tegra234-xusb.yaml    | 35 ++++++++++++++++---
>  1 file changed, 30 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
> index ec0993497fbb..d63f0db4224c 100644
> --- a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
> +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
> @@ -17,7 +17,9 @@ description: |
>  
>  properties:
>    compatible:
> -    const: nvidia,tegra234-xusb
> +    enum:
> +      - nvidia,tegra234-xusb
> +      - nvidia,tegra264-xusb
>  
>    reg:
>      items:
> @@ -43,6 +45,7 @@ properties:
>        - description: USB wake event 4
>        - description: USB wake event 5
>        - description: USB wake event 6
> +      - description: USB wake event 7
>      description: |
>        The first two interrupts are required for the USB host controller. The
>        remaining USB wake event interrupts are optional. Each USB wake event is
> @@ -50,10 +53,9 @@ properties:
>        platform. The USB host controller can function even if no wake-up events
>        are defined. The USB wake event interrupts are handled by the Tegra PMC;
>        hence, the interrupt controller for these is the PMC and the interrupt
> -      IDs correspond to the PMC wake event IDs. A complete list of wake event
> -      IDs is provided below, and this information is also present in the Tegra
> -      TRM document.
> +      IDs correspond to the PMC wake event IDs.
>  
> +      Tegra234 PMC wake events:
>          PMC wake-up 76 for USB3 port 0 wakeup
>          PMC wake-up 77 for USB3 port 1 wakeup
>          PMC wake-up 78 for USB3 port 2 and port 3 wakeup
> @@ -62,6 +64,16 @@ properties:
>          PMC wake-up 81 for USB2 port 2 wakeup
>          PMC wake-up 82 for USB2 port 3 wakeup
>  
> +      Tegra264 PMC wake events:
> +        PMC wake-up 79 for USB3 port 0 wakeup
> +        PMC wake-up 80 for USB3 port 1 wakeup
> +        PMC wake-up 81 for USB3 port 2 wakeup
> +        PMC wake-up 82 for USB3 port 3 wakeup
> +        PMC wake-up 83 for USB2 port 0 wakeup
> +        PMC wake-up 84 for USB2 port 1 wakeup
> +        PMC wake-up 85 for USB2 port 2 wakeup
> +        PMC wake-up 86 for USB2 port 3 wakeup
> +
>    clocks:
>      items:
>        - description: XUSB host clock
> @@ -97,7 +109,8 @@ properties:
>        - const: write
>  
>    iommus:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 5

You should list the items instead. Flexible array means now the order
have a meaning.

>  
>    nvidia,xusb-padctl:
>      $ref: /schemas/types.yaml#/definitions/phandle
> @@ -137,6 +150,18 @@ properties:
>  allOf:
>    - $ref: usb-xhci.yaml
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: nvidia,tegra234-xusb
> +    then:
> +      properties:
> +        interrupts:
> +          maxItems: 9
> +        iommus:
> +          maxItems: 1

And the new device has flexible interrpts and iommus?

Best regards,
Krzysztof


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Re: [PATCH V2 1/8] dt-bindings: phy: tegra-xusb: Add support for Tegra264

[Wayne Chang]

On 9/1/26 18:06, Krzysztof Kozlowski wrote:
> External email: Use caution opening links or attachments
>
>
> On Tue, Sep 01, 2026 at 02:58:28AM +0800, Wayne Chang wrote:
>> Add the compatible string for the Tegra264 XUSB PHY.
> Same questions as v1. You will get exactly the same one at v3 if it is
> not unaswered here.

Thanks for the review. I'll add the rationale to the commit message.

thanks,

Wayne.

>
> Best regards,
> Krzysztof
>
>

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Re: [PATCH V2 2/8] dt-bindings: usb: Add Tegra264 XUSB host support

[Wayne Chang]

Hi Krzysztof,

Thanks for the review. I'll split the changes into three parts and 
address all the comments.
- phy: tegra: xusb: dt-bindings/phy + drivers/phy/tegra
- usb: host: xhci-tegra + its dt-bindings/usb
- arm64: DTS enablement

thanks,
Wayne.

On 9/1/26 18:10, Krzysztof Kozlowski wrote:
> External email: Use caution opening links or attachments
>
>
> On Tue, Sep 01, 2026 at 02:58:29AM +0800, Wayne Chang wrote:
>> Extend the Tegra234 XUSB host binding to cover Tegra264:
>>
>> - Add nvidia,tegra264-xusb compatible string
>> - Document optional USB wake interrupts for Tegra264
>> - Document Tegra264 PMC wake event to port mapping
>> - Allow up to five IOMMU specifiers for the additional XUSB host
>>    stream IDs
>>
>> Signed-off-by: Wayne Chang <waynec@nvidia.com>
> Why are USB patches mixed with DTS and phy ones? That's like three
> separate subsystems, of which Greg explicitly said many, many times he
> takes everything or nothing. Please read submitting patches in DT.
>
>
>
>> ---
>> V1 -> V2: Property definitions are back at the top level with the widest
>> constraints, The allOf conditional only tightens Tegra234 to interrupts
>> maxItems 9 and iommus maxItems 1.
>>
>>   .../bindings/usb/nvidia,tegra234-xusb.yaml    | 35 ++++++++++++++++---
>>   1 file changed, 30 insertions(+), 5 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
>> index ec0993497fbb..d63f0db4224c 100644
>> --- a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
>> +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
>> @@ -17,7 +17,9 @@ description: |
>>
>>   properties:
>>     compatible:
>> -    const: nvidia,tegra234-xusb
>> +    enum:
>> +      - nvidia,tegra234-xusb
>> +      - nvidia,tegra264-xusb
>>
>>     reg:
>>       items:
>> @@ -43,6 +45,7 @@ properties:
>>         - description: USB wake event 4
>>         - description: USB wake event 5
>>         - description: USB wake event 6
>> +      - description: USB wake event 7
>>       description: |
>>         The first two interrupts are required for the USB host controller. The
>>         remaining USB wake event interrupts are optional. Each USB wake event is
>> @@ -50,10 +53,9 @@ properties:
>>         platform. The USB host controller can function even if no wake-up events
>>         are defined. The USB wake event interrupts are handled by the Tegra PMC;
>>         hence, the interrupt controller for these is the PMC and the interrupt
>> -      IDs correspond to the PMC wake event IDs. A complete list of wake event
>> -      IDs is provided below, and this information is also present in the Tegra
>> -      TRM document.
>> +      IDs correspond to the PMC wake event IDs.
>>
>> +      Tegra234 PMC wake events:
>>           PMC wake-up 76 for USB3 port 0 wakeup
>>           PMC wake-up 77 for USB3 port 1 wakeup
>>           PMC wake-up 78 for USB3 port 2 and port 3 wakeup
>> @@ -62,6 +64,16 @@ properties:
>>           PMC wake-up 81 for USB2 port 2 wakeup
>>           PMC wake-up 82 for USB2 port 3 wakeup
>>
>> +      Tegra264 PMC wake events:
>> +        PMC wake-up 79 for USB3 port 0 wakeup
>> +        PMC wake-up 80 for USB3 port 1 wakeup
>> +        PMC wake-up 81 for USB3 port 2 wakeup
>> +        PMC wake-up 82 for USB3 port 3 wakeup
>> +        PMC wake-up 83 for USB2 port 0 wakeup
>> +        PMC wake-up 84 for USB2 port 1 wakeup
>> +        PMC wake-up 85 for USB2 port 2 wakeup
>> +        PMC wake-up 86 for USB2 port 3 wakeup
>> +
>>     clocks:
>>       items:
>>         - description: XUSB host clock
>> @@ -97,7 +109,8 @@ properties:
>>         - const: write
>>
>>     iommus:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 5
> You should list the items instead. Flexible array means now the order
> have a meaning.
>
>>     nvidia,xusb-padctl:
>>       $ref: /schemas/types.yaml#/definitions/phandle
>> @@ -137,6 +150,18 @@ properties:
>>   allOf:
>>     - $ref: usb-xhci.yaml
>>
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: nvidia,tegra234-xusb
>> +    then:
>> +      properties:
>> +        interrupts:
>> +          maxItems: 9
>> +        iommus:
>> +          maxItems: 1
> And the new device has flexible interrpts and iommus?
>
> Best regards,
> Krzysztof
>
>

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Re: [PATCH V2 2/8] dt-bindings: usb: Add Tegra264 XUSB host support

[Krzysztof Kozlowski]

On 03/09/2026 09:11, Wayne Chang wrote:
> Hi Krzysztof,
> 
> Thanks for the review. I'll split the changes into three parts and 
> address all the comments.
> - phy: tegra: xusb: dt-bindings/phy + drivers/phy/tegra
> - usb: host: xhci-tegra + its dt-bindings/usb
> - arm64: DTS enablement

Why are you top-posting? Does that mean you ignored the comments inline?

Best regards,
Krzysztof

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Re: [PATCH V2 2/8] dt-bindings: usb: Add Tegra264 XUSB host support

[Wayne Chang]

On 9/3/26 16:07, Krzysztof Kozlowski wrote:
> External email: Use caution opening links or attachments
>
>
> On 03/09/2026 09:11, Wayne Chang wrote:
>> Hi Krzysztof,
>>
>> Thanks for the review. I'll split the changes into three parts and
>> address all the comments.
>> - phy: tegra: xusb: dt-bindings/phy + drivers/phy/tegra
>> - usb: host: xhci-tegra + its dt-bindings/usb
>> - arm64: DTS enablement
> Why are you top-posting? Does that mean you ignored the comments inline?
Sorry, that's not what I meant. I apologize if my previous message came 
across the wrong way.

I have addressed all of your review comments in the latest revision.

https://lore.kernel.org/linux-tegra/20260903074539.613220-1-waynec@nvidia.com/

Thanks again for your detailed comments. I really appreciate your review 
and feedback.


thanks,

Wayne.


>
> Best regards,
> Krzysztof
>

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