* [PATCH v15 01/16] dt-bindings: phy: rockchip-usbdp: add improved ports scheme
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-15 13:49 ` [PATCH v15 02/16] phy: rockchip: usbdp: Update mode_change after error handling Sebastian Reichel
` (15 subsequent siblings)
16 siblings, 0 replies; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
Currently the Rockchip USBDP PHY is missing a documented port scheme.
Meanwhile upstream RK3588 DTS files are a bit messy and use different
port schemes. The upstream USBDP PHY Linux kernel driver does not yet
parse the ports at all and thus does not create any implicit ABI either.
But with the current mess it is not possible to properly support USB-C
DP AltMode. Thus this introduces a proper port scheme following roughly
the ports design of the Qualcomm QMP USB4-USB3-DP PHY controller binding
with a slight difference that there is an additional port for the
USB-C SBU port as the Rockchip USB-DP PHY also contains the SBU mux.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
.../bindings/phy/phy-rockchip-usbdp.yaml | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml
index 8b7059d5b182..89efaf005a7b 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml
@@ -110,10 +110,34 @@ properties:
port:
$ref: /schemas/graph.yaml#/properties/port
+ deprecated: true
description:
A port node to link the PHY to a TypeC controller for the purpose of
handling orientation switching.
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description:
+ Output endpoint of the PHY for USB (or DP when configured into 4 lane
+ mode), which should point to the superspeed port of a USB connector.
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Incoming endpoint from the USB controller
+
+ port@2:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Incoming endpoint from the DisplayPort controller
+
+ port@3:
+ $ref: /schemas/graph.yaml#/properties/port
+ description:
+ Output endpoint of the PHY for DP Auxiliary, which should either point to
+ the SBU port of a USB-C connector or a DisplayPort connector input port.
+
required:
- compatible
- reg
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v15 02/16] phy: rockchip: usbdp: Update mode_change after error handling
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
2026-09-15 13:49 ` [PATCH v15 01/16] dt-bindings: phy: rockchip-usbdp: add improved ports scheme Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 3:18 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 03/16] phy: rockchip: usbdp: Do not lose USB3 PHY status Sebastian Reichel
` (14 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel, Sashiko
If rk_udphy_init() or rk_udphy_setup() fails, the reinit will not be
tried again. Fix this by only updating the variable after all potential
errors have been handled.
Note, that no errors have been seen on real hardware and failures would
most likely be fatal and require at least a full reboot as the function
already asserts the PHY reset lines. So this is more of a theoretical
issue.
Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: https://lore.kernel.org/linux-phy/20260612163835.8D5471F000E9@smtp.kernel.org/
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 07a839e41db7..13649b52e99b 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -999,15 +999,14 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode)
}
if (udphy->status == UDPHY_MODE_NONE) {
- udphy->mode_change = false;
ret = rk_udphy_setup(udphy);
if (ret)
return ret;
if (udphy->mode & UDPHY_MODE_USB)
rk_udphy_u3_port_disable(udphy, false);
- } else if (udphy->mode_change) {
udphy->mode_change = false;
+ } else if (udphy->mode_change) {
udphy->status = UDPHY_MODE_NONE;
if (udphy->mode == UDPHY_MODE_DP)
rk_udphy_u3_port_disable(udphy, true);
@@ -1016,6 +1015,7 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode)
ret = rk_udphy_setup(udphy);
if (ret)
return ret;
+ udphy->mode_change = false;
}
udphy->status |= mode;
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 02/16] phy: rockchip: usbdp: Update mode_change after error handling
2026-09-15 13:49 ` [PATCH v15 02/16] phy: rockchip: usbdp: Update mode_change after error handling Sebastian Reichel
@ 2026-09-26 3:18 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 3:18 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sashiko
On Tue, Sep 15, 2026 at 03:49:49PM +0200, Sebastian Reichel wrote:
> If rk_udphy_init() or rk_udphy_setup() fails, the reinit will not be
> tried again. Fix this by only updating the variable after all potential
> errors have been handled.
>
> Note, that no errors have been seen on real hardware and failures would
> most likely be fatal and require at least a full reboot as the function
> already asserts the PHY reset lines. So this is more of a theoretical
> issue.
>
> Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Closes: https://lore.kernel.org/linux-phy/20260612163835.8D5471F000E9@smtp.kernel.org/
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 03/16] phy: rockchip: usbdp: Do not lose USB3 PHY status
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
2026-09-15 13:49 ` [PATCH v15 01/16] dt-bindings: phy: rockchip-usbdp: add improved ports scheme Sebastian Reichel
2026-09-15 13:49 ` [PATCH v15 02/16] phy: rockchip: usbdp: Update mode_change after error handling Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 3:28 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 04/16] phy: rockchip: usbdp: Fix devm_clk_bulk_get_all check Sebastian Reichel
` (13 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
By default (i.e. without manually enabling runtime PM) DWC3 requests the
USB3 PHY once and keeps it enabled all the time. When DisplayPort is
being requested later on, a mode change is needed. This re-initializes
the PHY. During re-initialization the status variable has incorrectly
been cleared, which means the tracking information for USB3 is lost.
This is not an immediate problem, since the DP side keeps the PHY
enabled. But once DP is toggled off, the whole PHY will be disabled.
This is a problem, because the USB side still needs it powered.
Fix things by not clearing the status flags.
Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 13649b52e99b..da0fa75fc9f0 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -1007,7 +1007,6 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode)
rk_udphy_u3_port_disable(udphy, false);
udphy->mode_change = false;
} else if (udphy->mode_change) {
- udphy->status = UDPHY_MODE_NONE;
if (udphy->mode == UDPHY_MODE_DP)
rk_udphy_u3_port_disable(udphy, true);
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 03/16] phy: rockchip: usbdp: Do not lose USB3 PHY status
2026-09-15 13:49 ` [PATCH v15 03/16] phy: rockchip: usbdp: Do not lose USB3 PHY status Sebastian Reichel
@ 2026-09-26 3:28 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 3:28 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree
On Tue, Sep 15, 2026 at 03:49:50PM +0200, Sebastian Reichel wrote:
> By default (i.e. without manually enabling runtime PM) DWC3 requests the
> USB3 PHY once and keeps it enabled all the time. When DisplayPort is
> being requested later on, a mode change is needed. This re-initializes
> the PHY. During re-initialization the status variable has incorrectly
> been cleared, which means the tracking information for USB3 is lost.
>
> This is not an immediate problem, since the DP side keeps the PHY
> enabled. But once DP is toggled off, the whole PHY will be disabled.
> This is a problem, because the USB side still needs it powered.
>
> Fix things by not clearing the status flags.
>
> Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 04/16] phy: rockchip: usbdp: Fix devm_clk_bulk_get_all check
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (2 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 03/16] phy: rockchip: usbdp: Do not lose USB3 PHY status Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 3:30 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 05/16] phy: rockchip: usbdp: Handle missing clock-names DT property gracefully Sebastian Reichel
` (12 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel, Sashiko
If devm_clk_bulk_get_all() returns -EPROBE_DEFER, it is replaced with
-ENODEV, permanently failing the driver probe instead of allowing it to
defer. Avoid masking the error code to fix the issue.
This effectively drops returning -ENODEV in case no clocks are being
described in DT. This special case will now be handled by the follow-up
check searching for "refclk" and exit with -EINVAL.
None of this will be hit in practice, since the driver is only used by
RK3588 and RK3576 - on these platforms the DT is validated to contain
the clocks and the clock driver is force probed early. Thus there is
no need to backport this.
Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: https://lore.kernel.org/linux-phy/20260612164107.C7DB21F000E9@smtp.kernel.org/
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index da0fa75fc9f0..c6cda0b80bfa 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -426,8 +426,8 @@ static int rk_udphy_clk_init(struct rk_udphy *udphy, struct device *dev)
int i;
udphy->num_clks = devm_clk_bulk_get_all(dev, &udphy->clks);
- if (udphy->num_clks < 1)
- return -ENODEV;
+ if (udphy->num_clks < 0)
+ return udphy->num_clks;
/* used for configure phy reference clock frequency */
for (i = 0; i < udphy->num_clks; i++) {
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 04/16] phy: rockchip: usbdp: Fix devm_clk_bulk_get_all check
2026-09-15 13:49 ` [PATCH v15 04/16] phy: rockchip: usbdp: Fix devm_clk_bulk_get_all check Sebastian Reichel
@ 2026-09-26 3:30 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 3:30 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sashiko
On Tue, Sep 15, 2026 at 03:49:51PM +0200, Sebastian Reichel wrote:
> If devm_clk_bulk_get_all() returns -EPROBE_DEFER, it is replaced with
> -ENODEV, permanently failing the driver probe instead of allowing it to
> defer. Avoid masking the error code to fix the issue.
>
> This effectively drops returning -ENODEV in case no clocks are being
> described in DT. This special case will now be handled by the follow-up
> check searching for "refclk" and exit with -EINVAL.
>
> None of this will be hit in practice, since the driver is only used by
> RK3588 and RK3576 - on these platforms the DT is validated to contain
> the clocks and the clock driver is force probed early. Thus there is
> no need to backport this.
>
> Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Closes: https://lore.kernel.org/linux-phy/20260612164107.C7DB21F000E9@smtp.kernel.org/
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 05/16] phy: rockchip: usbdp: Handle missing clock-names DT property gracefully
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (3 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 04/16] phy: rockchip: usbdp: Fix devm_clk_bulk_get_all check Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 3:32 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 06/16] phy: rockchip: usbdp: Drop seamless DP takeover Sebastian Reichel
` (11 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel, Sashiko
The rk_udphy_clk_init() function would currently try to do a strncmp for
a NULL pointer, if DT specifies 'clocks' property, but no 'clock-names'
property. Fix this by making sure the clock has an id string set.
Note that DT binding requires setting clock-names, so this is only a
problem when booting a non-compliant device tree.
Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: https://sashiko.dev/#/message/20260619154349.071321F000E9%40smtp.kernel.org
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index c6cda0b80bfa..93364728bca4 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -431,6 +431,9 @@ static int rk_udphy_clk_init(struct rk_udphy *udphy, struct device *dev)
/* used for configure phy reference clock frequency */
for (i = 0; i < udphy->num_clks; i++) {
+ if (!udphy->clks[i].id)
+ continue;
+
if (!strncmp(udphy->clks[i].id, "refclk", 6)) {
udphy->refclk = udphy->clks[i].clk;
break;
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 05/16] phy: rockchip: usbdp: Handle missing clock-names DT property gracefully
2026-09-15 13:49 ` [PATCH v15 05/16] phy: rockchip: usbdp: Handle missing clock-names DT property gracefully Sebastian Reichel
@ 2026-09-26 3:32 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 3:32 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sashiko
On Tue, Sep 15, 2026 at 03:49:52PM +0200, Sebastian Reichel wrote:
> The rk_udphy_clk_init() function would currently try to do a strncmp for
> a NULL pointer, if DT specifies 'clocks' property, but no 'clock-names'
> property. Fix this by making sure the clock has an id string set.
>
> Note that DT binding requires setting clock-names, so this is only a
> problem when booting a non-compliant device tree.
>
> Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Closes: https://sashiko.dev/#/message/20260619154349.071321F000E9%40smtp.kernel.org
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 06/16] phy: rockchip: usbdp: Drop seamless DP takeover
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (4 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 05/16] phy: rockchip: usbdp: Handle missing clock-names DT property gracefully Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 3:33 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 07/16] phy: rockchip: usbdp: Keep clocks running on PHY re-init Sebastian Reichel
` (10 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel, Sashiko
Right now the DRM drivers do not support seamless DP takeover and I'm
I'm not aware of any bootloader implementing this feature either.
In any case this feature would be limited to boards using the USBDP PHY
for a DP or eDP connection instead of the more commonly USB-C connector.
With USB-C's DP AltMode a seamless DP takeover requires handing over the
state of the TCPM state machine from the bootloader to the kernel. This
in turn requires a huge amount of work to keep the state machine
implementations synchronized. It's very unlikely we will see somebody
implementing that in the foreseeable future.
As the current code is obviously buggy and untested, let's simply drop
support for seamless DP takeover. It can be re-implemented cleanly once
somebody adds all missing bits.
Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: https://lore.kernel.org/linux-phy/20260612164107.C7DB21F000E9@smtp.kernel.org/
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 31 -------------------------------
1 file changed, 31 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 93364728bca4..ce2b74a28801 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -451,11 +451,6 @@ static int rk_udphy_reset_assert_all(struct rk_udphy *udphy)
return reset_control_bulk_assert(udphy->num_rsts, udphy->rsts);
}
-static int rk_udphy_reset_deassert_all(struct rk_udphy *udphy)
-{
- return reset_control_bulk_deassert(udphy->num_rsts, udphy->rsts);
-}
-
static int rk_udphy_reset_deassert(struct rk_udphy *udphy, char *name)
{
struct reset_control_bulk_data *list = udphy->rsts;
@@ -923,28 +918,6 @@ static int rk_udphy_parse_lane_mux_data(struct rk_udphy *udphy)
return 0;
}
-static int rk_udphy_get_initial_status(struct rk_udphy *udphy)
-{
- int ret;
- u32 value;
-
- ret = clk_bulk_prepare_enable(udphy->num_clks, udphy->clks);
- if (ret) {
- dev_err(udphy->dev, "failed to enable clk\n");
- return ret;
- }
-
- rk_udphy_reset_deassert_all(udphy);
-
- regmap_read(udphy->pma_regmap, CMN_LANE_MUX_AND_EN_OFFSET, &value);
- if (FIELD_GET(CMN_DP_LANE_MUX_ALL, value) && FIELD_GET(CMN_DP_LANE_EN_ALL, value))
- udphy->status = UDPHY_MODE_DP;
- else
- rk_udphy_disable(udphy);
-
- return 0;
-}
-
static int rk_udphy_parse_dt(struct rk_udphy *udphy)
{
struct device *dev = udphy->dev;
@@ -1494,10 +1467,6 @@ static int rk_udphy_probe(struct platform_device *pdev)
if (ret)
return ret;
- ret = rk_udphy_get_initial_status(udphy);
- if (ret)
- return ret;
-
mutex_init(&udphy->mutex);
platform_set_drvdata(pdev, udphy);
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 06/16] phy: rockchip: usbdp: Drop seamless DP takeover
2026-09-15 13:49 ` [PATCH v15 06/16] phy: rockchip: usbdp: Drop seamless DP takeover Sebastian Reichel
@ 2026-09-26 3:33 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 3:33 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sashiko
On Tue, Sep 15, 2026 at 03:49:53PM +0200, Sebastian Reichel wrote:
> Right now the DRM drivers do not support seamless DP takeover and I'm
> I'm not aware of any bootloader implementing this feature either.
>
> In any case this feature would be limited to boards using the USBDP PHY
> for a DP or eDP connection instead of the more commonly USB-C connector.
> With USB-C's DP AltMode a seamless DP takeover requires handing over the
> state of the TCPM state machine from the bootloader to the kernel. This
> in turn requires a huge amount of work to keep the state machine
> implementations synchronized. It's very unlikely we will see somebody
> implementing that in the foreseeable future.
>
> As the current code is obviously buggy and untested, let's simply drop
> support for seamless DP takeover. It can be re-implemented cleanly once
> somebody adds all missing bits.
>
> Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Closes: https://lore.kernel.org/linux-phy/20260612164107.C7DB21F000E9@smtp.kernel.org/
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 07/16] phy: rockchip: usbdp: Keep clocks running on PHY re-init
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (5 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 06/16] phy: rockchip: usbdp: Drop seamless DP takeover Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 3:37 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 08/16] phy: rockchip: usbdp: Amend SSC modulation deviation Sebastian Reichel
` (9 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
When a mode change is required rk_udphy_power_on() disables
the clocks and then calls rk_udphy_setup(), which then enables
all the clocks again before continuing with rk_udphy_init().
Considering that rk_udphy_init() does assert the reset lines,
re-enabling the clocks is just delaying things. Avoid it by
directly calling rk_udphy_init().
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index ce2b74a28801..925f2d162212 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -986,8 +986,7 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode)
if (udphy->mode == UDPHY_MODE_DP)
rk_udphy_u3_port_disable(udphy, true);
- rk_udphy_disable(udphy);
- ret = rk_udphy_setup(udphy);
+ ret = rk_udphy_init(udphy);
if (ret)
return ret;
udphy->mode_change = false;
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 07/16] phy: rockchip: usbdp: Keep clocks running on PHY re-init
2026-09-15 13:49 ` [PATCH v15 07/16] phy: rockchip: usbdp: Keep clocks running on PHY re-init Sebastian Reichel
@ 2026-09-26 3:37 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 3:37 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree
On Tue, Sep 15, 2026 at 03:49:54PM +0200, Sebastian Reichel wrote:
> When a mode change is required rk_udphy_power_on() disables
> the clocks and then calls rk_udphy_setup(), which then enables
> all the clocks again before continuing with rk_udphy_init().
>
> Considering that rk_udphy_init() does assert the reset lines,
> re-enabling the clocks is just delaying things. Avoid it by
> directly calling rk_udphy_init().
>
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 08/16] phy: rockchip: usbdp: Amend SSC modulation deviation
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (6 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 07/16] phy: rockchip: usbdp: Keep clocks running on PHY re-init Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 3:59 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 09/16] phy: rockchip: usbdp: Fix LFPS detect threshold control Sebastian Reichel
` (8 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
From: Frank Wang <frank.wang@rock-chips.com>
Move SSC modulation deviation into private config of clock
- 24M: 0x00d4[5:0] = 0x30
- 26M: 0x00d4[5:0] = 0x33
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
[Taken over from rockchip's kernel tree; register 0x00d4 is not
described in the TRM]
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 925f2d162212..586363f5ca20 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -349,7 +349,8 @@ static const struct reg_sequence rk_udphy_24m_refclk_cfg[] = {
{0x0a64, 0xa8}, {0x1a3c, 0xd0},
{0x1a44, 0xd0}, {0x1a48, 0x01},
{0x1a4c, 0x0d}, {0x1a54, 0xe0},
- {0x1a5c, 0xe0}, {0x1a64, 0xa8}
+ {0x1a5c, 0xe0}, {0x1a64, 0xa8},
+ {0x00d4, 0x30}
};
static const struct reg_sequence rk_udphy_26m_refclk_cfg[] = {
@@ -376,7 +377,7 @@ static const struct reg_sequence rk_udphy_26m_refclk_cfg[] = {
{0x0c30, 0x0e}, {0x0c48, 0x06},
{0x1c30, 0x0e}, {0x1c48, 0x06},
{0x028c, 0x18}, {0x0af0, 0x00},
- {0x1af0, 0x00}
+ {0x1af0, 0x00}, {0x00d4, 0x33}
};
static const struct reg_sequence rk_udphy_init_sequence[] = {
@@ -411,8 +412,7 @@ static const struct reg_sequence rk_udphy_init_sequence[] = {
{0x0070, 0x7d}, {0x0074, 0x68},
{0x0af4, 0x1a}, {0x1af4, 0x1a},
{0x0440, 0x3f}, {0x10d4, 0x08},
- {0x20d4, 0x08}, {0x00d4, 0x30},
- {0x0024, 0x6e},
+ {0x20d4, 0x08}, {0x0024, 0x6e}
};
static inline int rk_udphy_grfreg_write(struct regmap *base,
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 08/16] phy: rockchip: usbdp: Amend SSC modulation deviation
2026-09-15 13:49 ` [PATCH v15 08/16] phy: rockchip: usbdp: Amend SSC modulation deviation Sebastian Reichel
@ 2026-09-26 3:59 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 3:59 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree
On Tue, Sep 15, 2026 at 03:49:55PM +0200, Sebastian Reichel wrote:
> From: Frank Wang <frank.wang@rock-chips.com>
>
> Move SSC modulation deviation into private config of clock
>
> - 24M: 0x00d4[5:0] = 0x30
> - 26M: 0x00d4[5:0] = 0x33
>
> Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
> [Taken over from rockchip's kernel tree; register 0x00d4 is not
> described in the TRM]
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 09/16] phy: rockchip: usbdp: Fix LFPS detect threshold control
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (7 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 08/16] phy: rockchip: usbdp: Amend SSC modulation deviation Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 4:00 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 10/16] phy: rockchip: usbdp: Add missing mode_change update Sebastian Reichel
` (7 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel, William Wu
From: William Wu <william.wu@rock-chips.com>
According to the LFPS Tx Low Power/LFPS Rx Detect Threshold [1],
the device under test(DUT) must not respond if LFPS below the
minimum LFPS Rx Detect Threshold 100mV. Test fail on Rockchip
platforms, because the default LFPS detect threshold is set to
65mV.
The USBDP PHY LFPS detect threshold voltage could be set to
30mV ~ 140mV, and since there could be 10-20% PVT variation,
we set LFPS detect threshold voltage to 110mV.
[1] https://compliance.usb.org/resources/LFPS_Rx_Tx_Low_Power_Compliance_Update_Rev5.pdf
Signed-off-by: William Wu <william.wu@rock-chips.com>
[Taken over from rockchip's kernel tree; the registers are not described
in the TRM]
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 586363f5ca20..665a4636d9dc 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -412,7 +412,8 @@ static const struct reg_sequence rk_udphy_init_sequence[] = {
{0x0070, 0x7d}, {0x0074, 0x68},
{0x0af4, 0x1a}, {0x1af4, 0x1a},
{0x0440, 0x3f}, {0x10d4, 0x08},
- {0x20d4, 0x08}, {0x0024, 0x6e}
+ {0x20d4, 0x08}, {0x0024, 0x6e},
+ {0x09c0, 0x0a}, {0x19c0, 0x0a}
};
static inline int rk_udphy_grfreg_write(struct regmap *base,
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 09/16] phy: rockchip: usbdp: Fix LFPS detect threshold control
2026-09-15 13:49 ` [PATCH v15 09/16] phy: rockchip: usbdp: Fix LFPS detect threshold control Sebastian Reichel
@ 2026-09-26 4:00 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 4:00 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, William Wu
On Tue, Sep 15, 2026 at 03:49:56PM +0200, Sebastian Reichel wrote:
> From: William Wu <william.wu@rock-chips.com>
>
> According to the LFPS Tx Low Power/LFPS Rx Detect Threshold [1],
> the device under test(DUT) must not respond if LFPS below the
> minimum LFPS Rx Detect Threshold 100mV. Test fail on Rockchip
> platforms, because the default LFPS detect threshold is set to
> 65mV.
>
> The USBDP PHY LFPS detect threshold voltage could be set to
> 30mV ~ 140mV, and since there could be 10-20% PVT variation,
> we set LFPS detect threshold voltage to 110mV.
>
> [1] https://compliance.usb.org/resources/LFPS_Rx_Tx_Low_Power_Compliance_Update_Rev5.pdf
>
> Signed-off-by: William Wu <william.wu@rock-chips.com>
> [Taken over from rockchip's kernel tree; the registers are not described
> in the TRM]
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 10/16] phy: rockchip: usbdp: Add missing mode_change update
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (8 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 09/16] phy: rockchip: usbdp: Fix LFPS detect threshold control Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 4:01 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 11/16] phy: rockchip: usbdp: Support single-lane DP Sebastian Reichel
` (6 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
rk_udphy_set_typec_default_mapping() updates the available modes,
but does not set the mode_change as required. This results in
missing re-initialization and thus non-working DisplayPort.
Fix this issue by introducing a new helper to update the available
modes.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 665a4636d9dc..b72daf80af15 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -616,6 +616,15 @@ static void rk_udphy_dp_hpd_event_trigger(struct rk_udphy *udphy, bool hpd)
rk_udphy_grfreg_write(udphy->vogrf, &cfg->vogrfcfg[udphy->id].hpd_trigger, hpd);
}
+static void rk_udphy_mode_set(struct rk_udphy *udphy, u8 mode)
+{
+ if (udphy->mode == mode)
+ return;
+
+ udphy->mode_change = true;
+ udphy->mode = mode;
+}
+
static void rk_udphy_set_typec_default_mapping(struct rk_udphy *udphy)
{
if (udphy->flip) {
@@ -646,7 +655,7 @@ static void rk_udphy_set_typec_default_mapping(struct rk_udphy *udphy)
gpiod_set_value_cansleep(udphy->sbu2_dc_gpio, 1);
}
- udphy->mode = UDPHY_MODE_DP_USB;
+ rk_udphy_mode_set(udphy, UDPHY_MODE_DP_USB);
}
static int rk_udphy_orien_sw_set(struct typec_switch_dev *sw,
@@ -1360,10 +1369,7 @@ static int rk_udphy_typec_mux_set(struct typec_mux_dev *mux,
usleep_range(750, 800);
rk_udphy_dp_hpd_event_trigger(udphy, true);
} else if (data->status & DP_STATUS_HPD_STATE) {
- if (udphy->mode != mode) {
- udphy->mode = mode;
- udphy->mode_change = true;
- }
+ rk_udphy_mode_set(udphy, mode);
rk_udphy_dp_hpd_event_trigger(udphy, true);
} else {
rk_udphy_dp_hpd_event_trigger(udphy, false);
--
2.53.0
--
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https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 10/16] phy: rockchip: usbdp: Add missing mode_change update
2026-09-15 13:49 ` [PATCH v15 10/16] phy: rockchip: usbdp: Add missing mode_change update Sebastian Reichel
@ 2026-09-26 4:01 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 4:01 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree
On Tue, Sep 15, 2026 at 03:49:57PM +0200, Sebastian Reichel wrote:
> rk_udphy_set_typec_default_mapping() updates the available modes,
> but does not set the mode_change as required. This results in
> missing re-initialization and thus non-working DisplayPort.
>
> Fix this issue by introducing a new helper to update the available
> modes.
>
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
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https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 11/16] phy: rockchip: usbdp: Support single-lane DP
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (9 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 10/16] phy: rockchip: usbdp: Add missing mode_change update Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-15 14:03 ` sashiko-bot
2026-09-26 4:03 ` Manivannan Sadhasivam
2026-09-15 13:49 ` [PATCH v15 12/16] phy: rockchip: usbdp: Limit DP lane count to muxed lanes Sebastian Reichel
` (5 subsequent siblings)
16 siblings, 2 replies; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
From: Zhang Yubing <yubing.zhang@rock-chips.com>
Implement support for using just a single DisplayPort line.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 64 +++++++++++++------------------
1 file changed, 27 insertions(+), 37 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index b72daf80af15..4fce9cd66473 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -192,6 +192,7 @@ struct rk_udphy {
int id;
bool dp_in_use;
+ int dp_lanes;
/* PHY const config */
const struct rk_udphy_cfg *cfgs;
@@ -534,6 +535,13 @@ static void rk_udphy_usb_bvalid_enable(struct rk_udphy *udphy, u8 enable)
* <0 1> dpln0 dpln1 usbrx usbtx
* <2 3> usbrx usbtx dpln0 dpln1
* ---------------------------------------------------------------------------
+ * if 1 lane for dp function, 2 lane for usb function, define rockchip,dp-lane-mux = <x>;
+ * sample as follow:
+ * ---------------------------------------------------------------------------
+ * B11-B10 A2-A3 A11-A10 B2-B3
+ * rockchip,dp-lane-mux ln0(tx/rx) ln1(tx) ln2(tx/rx) ln3(tx)
+ * <0> dpln0 \ usbrx usbtx
+ * ---------------------------------------------------------------------------
*/
static void rk_udphy_dplane_select(struct rk_udphy *udphy)
@@ -541,18 +549,18 @@ static void rk_udphy_dplane_select(struct rk_udphy *udphy)
const struct rk_udphy_cfg *cfg = udphy->cfgs;
u32 value = 0;
- switch (udphy->mode) {
- case UDPHY_MODE_DP:
- value |= 2 << udphy->dp_lane_sel[2] * 2;
+ switch (udphy->dp_lanes) {
+ case 4:
value |= 3 << udphy->dp_lane_sel[3] * 2;
+ value |= 2 << udphy->dp_lane_sel[2] * 2;
fallthrough;
- case UDPHY_MODE_DP_USB:
- value |= 0 << udphy->dp_lane_sel[0] * 2;
+ case 2:
value |= 1 << udphy->dp_lane_sel[1] * 2;
- break;
+ fallthrough;
- case UDPHY_MODE_USB:
+ case 1:
+ value |= 0 << udphy->dp_lane_sel[0] * 2;
break;
default:
@@ -565,28 +573,6 @@ static void rk_udphy_dplane_select(struct rk_udphy *udphy)
FIELD_PREP(DP_AUX_DOUT_SEL, udphy->dp_aux_dout_sel) | value);
}
-static int rk_udphy_dplane_get(struct rk_udphy *udphy)
-{
- int dp_lanes;
-
- switch (udphy->mode) {
- case UDPHY_MODE_DP:
- dp_lanes = 4;
- break;
-
- case UDPHY_MODE_DP_USB:
- dp_lanes = 2;
- break;
-
- case UDPHY_MODE_USB:
- default:
- dp_lanes = 0;
- break;
- }
-
- return dp_lanes;
-}
-
static void rk_udphy_dplane_enable(struct rk_udphy *udphy, int dp_lanes)
{
u32 val = 0;
@@ -656,6 +642,7 @@ static void rk_udphy_set_typec_default_mapping(struct rk_udphy *udphy)
}
rk_udphy_mode_set(udphy, UDPHY_MODE_DP_USB);
+ udphy->dp_lanes = 2;
}
static int rk_udphy_orien_sw_set(struct typec_switch_dev *sw,
@@ -894,7 +881,7 @@ static int rk_udphy_parse_lane_mux_data(struct rk_udphy *udphy)
return 0;
}
- if (num_lanes != 2 && num_lanes != 4)
+ if (num_lanes != 1 && num_lanes != 2 && num_lanes != 4)
return dev_err_probe(udphy->dev, -EINVAL,
"invalid number of lane mux\n");
@@ -920,9 +907,11 @@ static int rk_udphy_parse_lane_mux_data(struct rk_udphy *udphy)
}
udphy->mode = UDPHY_MODE_DP;
- if (num_lanes == 2) {
+ udphy->dp_lanes = num_lanes;
+ if (num_lanes == 1 || num_lanes == 2) {
udphy->mode |= UDPHY_MODE_USB;
- udphy->flip = (udphy->lane_mux_sel[0] == PHY_LANE_MUX_DP);
+ udphy->flip = (udphy->lane_mux_sel[0] == PHY_LANE_MUX_DP) ||
+ (udphy->lane_mux_sel[1] == PHY_LANE_MUX_DP);
}
return 0;
@@ -1049,18 +1038,17 @@ static int rk_udphy_dp_phy_exit(struct phy *phy)
static int rk_udphy_dp_phy_power_on(struct phy *phy)
{
struct rk_udphy *udphy = phy_get_drvdata(phy);
- int ret, dp_lanes;
+ int ret;
mutex_lock(&udphy->mutex);
- dp_lanes = rk_udphy_dplane_get(udphy);
- phy_set_bus_width(phy, dp_lanes);
+ phy_set_bus_width(phy, udphy->dp_lanes);
ret = rk_udphy_power_on(udphy, UDPHY_MODE_DP);
if (ret)
goto unlock;
- rk_udphy_dplane_enable(udphy, dp_lanes);
+ rk_udphy_dplane_enable(udphy, udphy->dp_lanes);
rk_udphy_dplane_select(udphy);
@@ -1340,6 +1328,7 @@ static int rk_udphy_typec_mux_set(struct typec_mux_dev *mux,
udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;
mode = UDPHY_MODE_DP;
+ udphy->dp_lanes = 4;
break;
case TYPEC_DP_STATE_D:
@@ -1356,6 +1345,7 @@ static int rk_udphy_typec_mux_set(struct typec_mux_dev *mux,
udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;
}
mode = UDPHY_MODE_DP_USB;
+ udphy->dp_lanes = 2;
break;
}
@@ -1500,7 +1490,7 @@ static int rk_udphy_probe(struct platform_device *pdev)
ret = PTR_ERR(udphy->phy_dp);
return dev_err_probe(dev, ret, "failed to create DP phy\n");
}
- phy_set_bus_width(udphy->phy_dp, rk_udphy_dplane_get(udphy));
+ phy_set_bus_width(udphy->phy_dp, udphy->dp_lanes);
udphy->phy_dp->attrs.max_link_rate = 8100;
phy_set_drvdata(udphy->phy_dp, udphy);
--
2.53.0
--
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linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 11/16] phy: rockchip: usbdp: Support single-lane DP
2026-09-15 13:49 ` [PATCH v15 11/16] phy: rockchip: usbdp: Support single-lane DP Sebastian Reichel
@ 2026-09-15 14:03 ` sashiko-bot
2026-09-26 4:03 ` Manivannan Sadhasivam
1 sibling, 0 replies; 34+ messages in thread
From: sashiko-bot @ 2026-09-15 14:03 UTC (permalink / raw)
To: Sebastian Reichel
Cc: olteanv, robh, neil.armstrong, conor+dt, devicetree, linux-phy,
vkoul
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] phy: rockchip: usbdp: errant DP lane enable in USB-only mode
--
commit eaea7c0e371c41abc4589c0ac17cb5d7fe7f1179
Author: Zhang Yubing <yubing.zhang@rock-chips.com>
phy: rockchip: usbdp: Support single-lane DP
This commit implements support for using just a single DisplayPort line in
the rockchip usbdp phy driver.
> diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
> index b72daf80af15f..4fce9cd664735 100644
> --- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
> +++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
[ ... ]
> @@ -1049,18 +1038,17 @@ static int rk_udphy_dp_phy_power_on(struct phy *phy)
> static int rk_udphy_dp_phy_power_on(struct phy *phy)
> {
> struct rk_udphy *udphy = phy_get_drvdata(phy);
> - int ret, dp_lanes;
> + int ret;
>
> mutex_lock(&udphy->mutex);
>
> - dp_lanes = rk_udphy_dplane_get(udphy);
> - phy_set_bus_width(phy, dp_lanes);
> + phy_set_bus_width(phy, udphy->dp_lanes);
>
> ret = rk_udphy_power_on(udphy, UDPHY_MODE_DP);
> if (ret)
> goto unlock;
>
> - rk_udphy_dplane_enable(udphy, dp_lanes);
> + rk_udphy_dplane_enable(udphy, udphy->dp_lanes);
[Severity: Medium]
Could this unintentionally enable unclocked DP lane drivers on the physical
pins in USB-only mode?
If the DP controller calls phy_power_on(), rk_udphy_power_on() might detect
that UDPHY_MODE_DP is not supported in udphy->mode. If it does, it prints a
message and returns 0 (success) without powering up the DP PLLs. Execution
then proceeds to this rk_udphy_dplane_enable() call.
Prior to this patch, rk_udphy_dplane_get() returned 0 when DP was disabled,
which safely disabled the lanes and asserted CMN_DP_CMN_RSTN. Now, since
rk_udphy_typec_mux_set() unconditionally sets udphy->dp_lanes to 2 or 4 in
Type-C states (even without DP altmode), a non-zero value is passed here.
Does passing the decoupled udphy->dp_lanes skip asserting the reset and
erroneously enable unclocked DP lane drivers, potentially causing undefined
PHY behavior or electrical contention on shared pins?
[ ... ]
> @@ -1356,6 +1345,7 @@ static int rk_udphy_typec_mux_set(struct typec_mux_dev *mux,
> udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;
> }
> mode = UDPHY_MODE_DP_USB;
> + udphy->dp_lanes = 2;
> break;
> }
[Severity: Medium]
Does this unconditionally set dp_lanes to 2 for USB-only Type-C states without
updating udphy->mode, contributing to the DP lane enable issue mentioned above
in rk_udphy_dp_phy_power_on()?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260915-rockchip-usbdp-cleanup-v15-0-80e2c11d1ce8@collabora.com?part=11
--
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^ permalink raw reply [flat|nested] 34+ messages in thread* Re: [PATCH v15 11/16] phy: rockchip: usbdp: Support single-lane DP
2026-09-15 13:49 ` [PATCH v15 11/16] phy: rockchip: usbdp: Support single-lane DP Sebastian Reichel
2026-09-15 14:03 ` sashiko-bot
@ 2026-09-26 4:03 ` Manivannan Sadhasivam
1 sibling, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 4:03 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree
On Tue, Sep 15, 2026 at 03:49:58PM +0200, Sebastian Reichel wrote:
> From: Zhang Yubing <yubing.zhang@rock-chips.com>
>
> Implement support for using just a single DisplayPort line.
>
> Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
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https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 12/16] phy: rockchip: usbdp: Limit DP lane count to muxed lanes
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (10 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 11/16] phy: rockchip: usbdp: Support single-lane DP Sebastian Reichel
@ 2026-09-15 13:49 ` Sebastian Reichel
2026-09-26 4:04 ` Manivannan Sadhasivam
2026-09-15 13:50 ` [PATCH v15 13/16] phy: rockchip: usbdp: Rename DP lane functions Sebastian Reichel
` (4 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:49 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel, Sashiko
In theory the DP controller could request 4 lanes when the PHY is
restricted to 2 lanes as the other half is used by USB3.
With the current user (DW-DP) this cannot happen, but as the check is
cheap and users might change in the future protect things accordingly.
Not doing so would corrupt USB3 usage by the following code configuring
the voltages.
Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: https://lore.kernel.org/linux-phy/20260612165546.98E1F1F000E9@smtp.kernel.org/
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 4fce9cd66473..2af7c3878714 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -1098,6 +1098,9 @@ static int rk_udphy_dp_phy_verify_link_rate(struct rk_udphy *udphy,
static int rk_udphy_dp_phy_verify_lanes(struct rk_udphy *udphy,
struct phy_configure_opts_dp *dp)
{
+ if (dp->lanes > udphy->dp_lanes)
+ return -EINVAL;
+
switch (dp->lanes) {
case 1:
case 2:
--
2.53.0
--
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linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 12/16] phy: rockchip: usbdp: Limit DP lane count to muxed lanes
2026-09-15 13:49 ` [PATCH v15 12/16] phy: rockchip: usbdp: Limit DP lane count to muxed lanes Sebastian Reichel
@ 2026-09-26 4:04 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 4:04 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sashiko
On Tue, Sep 15, 2026 at 03:49:59PM +0200, Sebastian Reichel wrote:
> In theory the DP controller could request 4 lanes when the PHY is
> restricted to 2 lanes as the other half is used by USB3.
>
> With the current user (DW-DP) this cannot happen, but as the check is
> cheap and users might change in the future protect things accordingly.
> Not doing so would corrupt USB3 usage by the following code configuring
> the voltages.
>
> Fixes: 2f70bbddeb45 ("phy: rockchip: add usbdp combo phy driver")
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Closes: https://lore.kernel.org/linux-phy/20260612165546.98E1F1F000E9@smtp.kernel.org/
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 13/16] phy: rockchip: usbdp: Rename DP lane functions
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (11 preceding siblings ...)
2026-09-15 13:49 ` [PATCH v15 12/16] phy: rockchip: usbdp: Limit DP lane count to muxed lanes Sebastian Reichel
@ 2026-09-15 13:50 ` Sebastian Reichel
2026-09-26 4:06 ` Manivannan Sadhasivam
2026-09-15 13:50 ` [PATCH v15 14/16] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST Sebastian Reichel
` (3 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:50 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
The common prefix for DisplayPort related functions is rk_udphy_dp_
(with a final _), so update the two DP lane functions to follow that
scheme.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 2af7c3878714..9dae41239e48 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -544,7 +544,7 @@ static void rk_udphy_usb_bvalid_enable(struct rk_udphy *udphy, u8 enable)
* ---------------------------------------------------------------------------
*/
-static void rk_udphy_dplane_select(struct rk_udphy *udphy)
+static void rk_udphy_dp_lane_select(struct rk_udphy *udphy)
{
const struct rk_udphy_cfg *cfg = udphy->cfgs;
u32 value = 0;
@@ -573,7 +573,7 @@ static void rk_udphy_dplane_select(struct rk_udphy *udphy)
FIELD_PREP(DP_AUX_DOUT_SEL, udphy->dp_aux_dout_sel) | value);
}
-static void rk_udphy_dplane_enable(struct rk_udphy *udphy, int dp_lanes)
+static void rk_udphy_dp_lane_enable(struct rk_udphy *udphy, int dp_lanes)
{
u32 val = 0;
int i;
@@ -1048,9 +1048,9 @@ static int rk_udphy_dp_phy_power_on(struct phy *phy)
if (ret)
goto unlock;
- rk_udphy_dplane_enable(udphy, udphy->dp_lanes);
+ rk_udphy_dp_lane_enable(udphy, udphy->dp_lanes);
- rk_udphy_dplane_select(udphy);
+ rk_udphy_dp_lane_select(udphy);
unlock:
mutex_unlock(&udphy->mutex);
@@ -1068,7 +1068,7 @@ static int rk_udphy_dp_phy_power_off(struct phy *phy)
struct rk_udphy *udphy = phy_get_drvdata(phy);
mutex_lock(&udphy->mutex);
- rk_udphy_dplane_enable(udphy, 0);
+ rk_udphy_dp_lane_enable(udphy, 0);
rk_udphy_power_off(udphy, UDPHY_MODE_DP);
mutex_unlock(&udphy->mutex);
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 13/16] phy: rockchip: usbdp: Rename DP lane functions
2026-09-15 13:50 ` [PATCH v15 13/16] phy: rockchip: usbdp: Rename DP lane functions Sebastian Reichel
@ 2026-09-26 4:06 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 4:06 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree
On Tue, Sep 15, 2026 at 03:50:00PM +0200, Sebastian Reichel wrote:
> The common prefix for DisplayPort related functions is rk_udphy_dp_
> (with a final _), so update the two DP lane functions to follow that
> scheme.
>
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 14/16] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (12 preceding siblings ...)
2026-09-15 13:50 ` [PATCH v15 13/16] phy: rockchip: usbdp: Rename DP lane functions Sebastian Reichel
@ 2026-09-15 13:50 ` Sebastian Reichel
2026-09-26 4:10 ` Manivannan Sadhasivam
2026-09-15 13:50 ` [PATCH v15 15/16] phy: rockchip: usbdp: Cleanup DP lane selection function Sebastian Reichel
` (2 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:50 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
Cleanup code by replacing open-coded version of FIELD_PREP_WM16_CONST
with the existing helper macro.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 9dae41239e48..d95a44835caf 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -12,6 +12,7 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
+#include <linux/hw_bitfield.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/mutex.h>
@@ -74,7 +75,6 @@
#define TRSV_LN2_MON_RX_CDR_DONE_OFFSET 0x1b84 /* trsv_reg06E1 */
#define TRSV_LN2_MON_RX_CDR_LOCK_DONE BIT(0)
-#define BIT_WRITEABLE_SHIFT 16
#define PHY_AUX_DP_DATA_POL_NORMAL 0
#define PHY_AUX_DP_DATA_POL_INVERT 1
#define PHY_LANE_MUX_USB 0
@@ -103,8 +103,8 @@ struct rk_udphy_grf_reg {
#define _RK_UDPHY_GEN_GRF_REG(offset, mask, disable, enable) \
{\
offset, \
- FIELD_PREP_CONST(mask, disable) | (mask << BIT_WRITEABLE_SHIFT), \
- FIELD_PREP_CONST(mask, enable) | (mask << BIT_WRITEABLE_SHIFT), \
+ FIELD_PREP_WM16_CONST(mask, disable), \
+ FIELD_PREP_WM16_CONST(mask, enable), \
}
#define RK_UDPHY_GEN_GRF_REG(offset, bitend, bitstart, disable, enable) \
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 14/16] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST
2026-09-15 13:50 ` [PATCH v15 14/16] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST Sebastian Reichel
@ 2026-09-26 4:10 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 4:10 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree
On Tue, Sep 15, 2026 at 03:50:01PM +0200, Sebastian Reichel wrote:
> Cleanup code by replacing open-coded version of FIELD_PREP_WM16_CONST
> with the existing helper macro.
>
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 15/16] phy: rockchip: usbdp: Cleanup DP lane selection function
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (13 preceding siblings ...)
2026-09-15 13:50 ` [PATCH v15 14/16] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST Sebastian Reichel
@ 2026-09-15 13:50 ` Sebastian Reichel
2026-09-26 4:20 ` Manivannan Sadhasivam
2026-09-15 13:50 ` [PATCH v15 16/16] phy: rockchip: usbdp: Register DP aux bridge Sebastian Reichel
2026-10-03 9:36 ` [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Vinod Koul
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:50 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
Use FIELD_PREP_WM16() helpers to simplify the DP lane selection
logic.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-usbdp.c | 28 +++++++---------------------
1 file changed, 7 insertions(+), 21 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index d95a44835caf..8874f8429a67 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -547,30 +547,16 @@ static void rk_udphy_usb_bvalid_enable(struct rk_udphy *udphy, u8 enable)
static void rk_udphy_dp_lane_select(struct rk_udphy *udphy)
{
const struct rk_udphy_cfg *cfg = udphy->cfgs;
- u32 value = 0;
-
- switch (udphy->dp_lanes) {
- case 4:
- value |= 3 << udphy->dp_lane_sel[3] * 2;
- value |= 2 << udphy->dp_lane_sel[2] * 2;
- fallthrough;
-
- case 2:
- value |= 1 << udphy->dp_lane_sel[1] * 2;
- fallthrough;
+ u32 value = FIELD_PREP_WM16(DP_LANE_SEL_ALL, 0);
+ int i;
- case 1:
- value |= 0 << udphy->dp_lane_sel[0] * 2;
- break;
+ for (i = 0; i < udphy->dp_lanes; i++)
+ value |= field_prep(DP_LANE_SEL_N(udphy->dp_lane_sel[i]), i);
- default:
- break;
- }
+ value |= FIELD_PREP_WM16(DP_AUX_DIN_SEL, udphy->dp_aux_din_sel);
+ value |= FIELD_PREP_WM16(DP_AUX_DOUT_SEL, udphy->dp_aux_dout_sel);
- regmap_write(udphy->vogrf, cfg->vogrfcfg[udphy->id].dp_lane_reg,
- ((DP_AUX_DIN_SEL | DP_AUX_DOUT_SEL | DP_LANE_SEL_ALL) << 16) |
- FIELD_PREP(DP_AUX_DIN_SEL, udphy->dp_aux_din_sel) |
- FIELD_PREP(DP_AUX_DOUT_SEL, udphy->dp_aux_dout_sel) | value);
+ regmap_write(udphy->vogrf, cfg->vogrfcfg[udphy->id].dp_lane_reg, value);
}
static void rk_udphy_dp_lane_enable(struct rk_udphy *udphy, int dp_lanes)
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 15/16] phy: rockchip: usbdp: Cleanup DP lane selection function
2026-09-15 13:50 ` [PATCH v15 15/16] phy: rockchip: usbdp: Cleanup DP lane selection function Sebastian Reichel
@ 2026-09-26 4:20 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 4:20 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree
On Tue, Sep 15, 2026 at 03:50:02PM +0200, Sebastian Reichel wrote:
> Use FIELD_PREP_WM16() helpers to simplify the DP lane selection
> logic.
>
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v15 16/16] phy: rockchip: usbdp: Register DP aux bridge
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (14 preceding siblings ...)
2026-09-15 13:50 ` [PATCH v15 15/16] phy: rockchip: usbdp: Cleanup DP lane selection function Sebastian Reichel
@ 2026-09-15 13:50 ` Sebastian Reichel
2026-09-26 4:28 ` Manivannan Sadhasivam
2026-10-03 9:36 ` [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Vinod Koul
16 siblings, 1 reply; 34+ messages in thread
From: Sebastian Reichel @ 2026-09-15 13:50 UTC (permalink / raw)
To: Vinod Koul, Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner,
Frank Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Philipp Zabel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sebastian Reichel
Add support to use USB-C connectors with the DP altmode helper code on
devicetree based platforms. To get this working there must be a DRM
bridge chain from the DisplayPort controller to the USB-C connector.
E.g. on Rockchip RK3576:
root@rk3576 # cat /sys/kernel/debug/dri/0/encoder-0/bridges
bridge[0]: dw_dp_bridge_funcs
refcount: 7
type: [10] DP
OF: /soc/dp@27e40000:rockchip,rk3576-dp
ops: [0x47] detect edid hpd
bridge[1]: drm_aux_bridge_funcs
refcount: 4
type: [0] Unknown
OF: /soc/phy@2b010000:rockchip,rk3576-usbdp-phy
ops: [0x0]
bridge[2]: drm_aux_hpd_bridge_funcs
refcount: 5
type: [10] DP
OF: /soc/i2c@2ac50000/typec-portc@22/connector:usb-c-connector
ops: [0x4] hpd
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
drivers/phy/rockchip/Kconfig | 2 ++
drivers/phy/rockchip/phy-rockchip-usbdp.c | 17 +++++++++++++++++
2 files changed, 19 insertions(+)
diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig
index 14698571b607..39759bb2fa1d 100644
--- a/drivers/phy/rockchip/Kconfig
+++ b/drivers/phy/rockchip/Kconfig
@@ -136,8 +136,10 @@ config PHY_ROCKCHIP_USBDP
tristate "Rockchip USBDP COMBO PHY Driver"
depends on ARCH_ROCKCHIP && OF
depends on TYPEC
+ depends on DRM || DRM=n
select GENERIC_PHY
select USB_COMMON
+ select DRM_AUX_BRIDGE if DRM_BRIDGE
help
Enable this to support the Rockchip USB3.0/DP combo PHY with
Samsung IP block. This is required for USB3 support on RK3588.
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index 8874f8429a67..fa8324879a97 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -6,6 +6,7 @@
* Copyright (C) 2024 Collabora Ltd
*/
+#include <drm/bridge/aux-bridge.h>
#include <dt-bindings/phy/phy.h>
#include <linux/bitfield.h>
#include <linux/bits.h>
@@ -1413,6 +1414,7 @@ static int rk_udphy_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct phy_provider *phy_provider;
+ struct fwnode_handle *dp_aux_ep;
struct resource *res;
struct rk_udphy *udphy;
void __iomem *base;
@@ -1467,6 +1469,21 @@ static int rk_udphy_probe(struct platform_device *pdev)
return ret;
}
+ /*
+ * Only register the DRM bridge, if the DP aux channel is connected.
+ * Some boards use the USBDP PHY only for its USB3 capabilities. The
+ * aux bridge itself will be registered using port 0, endpoint 0, which
+ * is fine as that is the actual superspeed data connection shared by
+ * USB3 and DP based on the mux config.
+ */
+ dp_aux_ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 3, 0, 0);
+ if (dp_aux_ep) {
+ ret = drm_aux_bridge_register(dev);
+ fwnode_handle_put(dp_aux_ep);
+ if (ret)
+ return ret;
+ }
+
udphy->phy_u3 = devm_phy_create(dev, dev->of_node, &rk_udphy_usb3_phy_ops);
if (IS_ERR(udphy->phy_u3)) {
ret = PTR_ERR(udphy->phy_u3);
--
2.53.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [PATCH v15 16/16] phy: rockchip: usbdp: Register DP aux bridge
2026-09-15 13:50 ` [PATCH v15 16/16] phy: rockchip: usbdp: Register DP aux bridge Sebastian Reichel
@ 2026-09-26 4:28 ` Manivannan Sadhasivam
0 siblings, 0 replies; 34+ messages in thread
From: Manivannan Sadhasivam @ 2026-09-26 4:28 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Vinod Koul, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree
On Tue, Sep 15, 2026 at 03:50:03PM +0200, Sebastian Reichel wrote:
> Add support to use USB-C connectors with the DP altmode helper code on
> devicetree based platforms. To get this working there must be a DRM
> bridge chain from the DisplayPort controller to the USB-C connector.
> E.g. on Rockchip RK3576:
>
> root@rk3576 # cat /sys/kernel/debug/dri/0/encoder-0/bridges
> bridge[0]: dw_dp_bridge_funcs
> refcount: 7
> type: [10] DP
> OF: /soc/dp@27e40000:rockchip,rk3576-dp
> ops: [0x47] detect edid hpd
> bridge[1]: drm_aux_bridge_funcs
> refcount: 4
> type: [0] Unknown
> OF: /soc/phy@2b010000:rockchip,rk3576-usbdp-phy
> ops: [0x0]
> bridge[2]: drm_aux_hpd_bridge_funcs
> refcount: 5
> type: [10] DP
> OF: /soc/i2c@2ac50000/typec-portc@22/connector:usb-c-connector
> ops: [0x4] hpd
>
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1)
2026-09-15 13:49 [PATCH v15 00/16] phy: rockchip: usbdp: Clean up the mess (part 1) Sebastian Reichel
` (15 preceding siblings ...)
2026-09-15 13:50 ` [PATCH v15 16/16] phy: rockchip: usbdp: Register DP aux bridge Sebastian Reichel
@ 2026-10-03 9:36 ` Vinod Koul
16 siblings, 0 replies; 34+ messages in thread
From: Vinod Koul @ 2026-10-03 9:36 UTC (permalink / raw)
To: Manivannan Sadhasivam, Neil Armstrong, Heiko Stuebner, Frank Wang,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel,
Sebastian Reichel
Cc: Andy Yan, Dmitry Baryshkov, Yubing Zhang, Alexey Charkov,
Igor Paunovic, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, kernel, devicetree, Sashiko, William Wu
On Tue, 15 Sep 2026 15:49:47 +0200, Sebastian Reichel wrote:
> This series is the first part of a major overhaul of the Rockchip USBDP
> driver. The goal of the bigger series is:
>
> * USB-C DP AltMode support
> * Fixing sporadic SErrors happening when connector is hot-plugged
> * Fixing USB3 support when connector orientation changes after
> hotplug
> * Fixing USBDP PHY not starting up properly initially or after a few
> replugs
>
> [...]
Applied, thanks!
[01/16] dt-bindings: phy: rockchip-usbdp: add improved ports scheme
commit: 861e77f3314e30228e234f866c8bb1ea82560b92
[02/16] phy: rockchip: usbdp: Update mode_change after error handling
commit: 3f2181226d7708349c69cd4a4b21372a8049576b
[03/16] phy: rockchip: usbdp: Do not lose USB3 PHY status
commit: b322403c294b67fd6bcf6719b4fc9f8a9e313129
[04/16] phy: rockchip: usbdp: Fix devm_clk_bulk_get_all check
commit: a2ddfc60a7d3ba0f571f037371b261642f8ed208
[05/16] phy: rockchip: usbdp: Handle missing clock-names DT property gracefully
commit: 17cd5e026a6e806b811f915b8e02a8b9d14f6f41
[06/16] phy: rockchip: usbdp: Drop seamless DP takeover
commit: 1ab628ce8f3ab694c28dcfcd5b1eec0cf9f499b8
[07/16] phy: rockchip: usbdp: Keep clocks running on PHY re-init
commit: 31fadcc97c033daa0b663dbd6e6acdf3121f1975
[08/16] phy: rockchip: usbdp: Amend SSC modulation deviation
commit: 6bee51c8b7dcef4917ed9acd7a8903f263374d1b
[09/16] phy: rockchip: usbdp: Fix LFPS detect threshold control
commit: 6977ac261a62399c696e5543519e3074de513eab
[10/16] phy: rockchip: usbdp: Add missing mode_change update
commit: 5def5d61ea5ac6f391364f6fdcff13a27a52026e
[11/16] phy: rockchip: usbdp: Support single-lane DP
commit: ae9b60ef1d626d1a4fdf8854f66d58f6ac56e37d
[12/16] phy: rockchip: usbdp: Limit DP lane count to muxed lanes
commit: 443997ca8d797375ff35e8f3ad3828799e88f71b
[13/16] phy: rockchip: usbdp: Rename DP lane functions
commit: ebe1e8cf3d109302c749591f6bb717cd260b00cf
[14/16] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST
commit: e8e7f3d875a302032d8b47b52b7adef16082e7f9
[15/16] phy: rockchip: usbdp: Cleanup DP lane selection function
commit: 9235d03d5e520178d53f5098068f2c3926457465
[16/16] phy: rockchip: usbdp: Register DP aux bridge
commit: bcdb77332fe05d699e8351263d535ffca373e459
Best regards,
--
~Vinod
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