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From: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
To: Vinod Koul <vkoul@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Manivannan Sadhasivam <mani@kernel.org>,
	Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
	Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
	Loic Poulain <loic.poulain@oss.qualcomm.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Bryan O'Donoghue <bod@kernel.org>
Cc: Vikram Sharma <vikram.sharma@oss.qualcomm.com>,
	linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
Subject: [PATCH RFC 2/6] media: qcom: camss: Add C-PHY timing fields and get config from sensor
Date: Sat, 17 Oct 2026 22:43:09 +0530	[thread overview]
Message-ID: <20261017-cphy_support-v1-2-8b0e1237ce95@oss.qualcomm.com> (raw)
In-Reply-To: <20261017-cphy_support-v1-0-8b0e1237ce95@oss.qualcomm.com>

C-PHY settle count is derived from the T_PREPARE and T_PREAMBLE link
timing parameters reported by the transmitter. Add C-PHY prepare and
preamble timing fields to the CSI-2 media bus configuration.

The endpoint bus type already describes whether the connected CSI-2 link
uses D-PHY or C-PHY.

Accept C-PHY endpoints, store the parsed CSI-2 PHY type and query the
remote sensor media bus configuration for C-PHY links. Pass the reported
link frequency and timing to the generic PHY while keeping the existing
D-PHY fallback path.

Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
---
 drivers/media/platform/qcom/camss/camss-csiphy.c | 90 +++++++++++++++++++-----
 drivers/media/platform/qcom/camss/camss-csiphy.h |  2 +
 drivers/media/platform/qcom/camss/camss.c        |  8 +--
 include/media/v4l2-mediabus.h                    |  2 +
 4 files changed, 79 insertions(+), 23 deletions(-)

diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c
index f99eea2ef2289cbee404808348c06968350dc4ac..ed2318d76987d6a9ae7e185d00e258d49d0c79a4 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.c
@@ -313,6 +313,29 @@ static void csiphy_stream_off_legacy(struct csiphy_device *csiphy)
 	csiphy->res->hw_ops->lanes_disable(csiphy, &csiphy->cfg);
 }
 
+static int csiphy_get_remote_mbus_config(struct csiphy_device *csiphy,
+					 struct v4l2_mbus_config *cfg)
+{
+	struct media_pad *remote;
+	struct v4l2_subdev *remote_sd;
+	int ret;
+
+	remote = media_pad_remote_pad_first(&csiphy->pads[MSM_CSIPHY_PAD_SINK]);
+	if (!remote)
+		return -ENOLINK;
+
+	remote_sd = media_entity_to_v4l2_subdev(remote->entity);
+	if (!remote_sd)
+		return -EINVAL;
+
+	memset(cfg, 0, sizeof(*cfg));
+	ret = v4l2_subdev_call(remote_sd, pad, get_mbus_config,
+			      remote->index, cfg);
+	if (ret == -ENOIOCTLCMD)
+		return -EOPNOTSUPP;
+
+	return ret;
+}
 /*
  * csiphy_stream_on - Enable streaming on CSIPHY module
  * @csiphy: CSIPHY device
@@ -324,43 +347,74 @@ static void csiphy_stream_off_legacy(struct csiphy_device *csiphy)
  */
 static int csiphy_stream_on(struct csiphy_device *csiphy)
 {
+	struct v4l2_mbus_config mbus_cfg = { };
 	u8 bpp = csiphy_get_bpp(csiphy->res->formats->formats, csiphy->res->formats->nformats,
 				csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
 	struct csiphy_lanes_cfg *lncfg = &csiphy->cfg.csi2->lane_cfg;
-	struct phy_configure_opts_mipi_dphy *dphy_cfg;
-	union phy_configure_opts dphy_opts = { 0 };
+	union phy_configure_opts opts = { 0 };
+	enum phy_mode mode = PHY_MODE_INVALID;
 	struct device *dev = csiphy->camss->dev;
 	u8 num_lanes = lncfg->num_data;
 	s64 link_freq;
 	int ret;
 
-	dphy_cfg = &dphy_opts.mipi_dphy;
-
-	link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes);
+	ret = csiphy_get_remote_mbus_config(csiphy, &mbus_cfg);
+	if (ret && ret != -EOPNOTSUPP)
+		return ret;
 
-	if (link_freq <= 0) {
-		dev_err(dev,
-			"Cannot get CSI2 transmitter's link frequency\n");
-		return -EINVAL;
+	if (ret == -EOPNOTSUPP && lncfg->phy_type == V4L2_MBUS_CSI2_CPHY) {
+		dev_err(dev, "C-PHY transmitter does not report media bus configuration\n");
+		return ret;
 	}
 
-	ret = phy_mipi_dphy_get_default_config_for_hsclk(link_freq, num_lanes,
-							 dphy_cfg);
-	if (ret < 0) {
-		dev_err(dev, "Invalid config for link frequency %lld\n",
-			link_freq);
-		return ret;
+	if (!ret && mbus_cfg.type == V4L2_MBUS_CSI2_CPHY) {
+		struct phy_configure_opts_mipi_cphy *cphy = &opts.mipi_cphy;
+
+		link_freq = mbus_cfg.link_freq;
+		if (link_freq <= 0) {
+			dev_err(dev,
+				"Cannot get CSI2 transmitter's link frequency\n");
+			return -EINVAL;
+		}
+
+		cphy->symbol_rate = link_freq * 2;
+		cphy->trios = num_lanes;
+		cphy->t_prepare_ns = mbus_cfg.bus.mipi_csi2.t_prepare_ns;
+		cphy->t_preamble_ns = mbus_cfg.bus.mipi_csi2.t_preamble_ns;
+
+		mode = PHY_MODE_MIPI_CPHY;
+	} else if (ret || mbus_cfg.type == V4L2_MBUS_CSI2_DPHY) {
+		struct phy_configure_opts_mipi_dphy *dphy = &opts.mipi_dphy;
+
+		link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes);
+		if (link_freq <= 0) {
+			dev_err(dev,
+				"Cannot get CSI2 transmitter's link frequency\n");
+			return -EINVAL;
+		}
+
+		ret = phy_mipi_dphy_get_default_config_for_hsclk(link_freq, num_lanes,
+								dphy);
+		if (ret < 0) {
+			dev_err(dev, "Invalid config for link frequency %lld\n",
+				link_freq);
+			return ret;
+		}
+		mode = PHY_MODE_MIPI_DPHY;
+	} else {
+		dev_err(dev, "Unsupported mbus type %u\n", mbus_cfg.type);
+		return -EINVAL;
 	}
 
-	ret = phy_set_mode(csiphy->phy, PHY_MODE_MIPI_DPHY);
+	ret = phy_set_mode(csiphy->phy, mode);
 	if (ret) {
 		dev_err(dev, "Failed to set phy mode\n");
 		return ret;
 	}
 
-	ret = phy_configure(csiphy->phy, &dphy_opts);
+	ret = phy_configure(csiphy->phy, &opts);
 	if (ret) {
-		dev_err(dev, "failed to configure MIPI D-PHY\n");
+		dev_err(dev, "failed to configure MIPI CSI-2 PHY\n");
 		goto error;
 	}
 
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/media/platform/qcom/camss/camss-csiphy.h
index 8c3319f2ca1cfdef4c0185deed2805854ac81703..a13cfaf3796106d421c8d711308d3fb3fb9259a8 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.h
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.h
@@ -35,11 +35,13 @@ struct csiphy_lane {
  * @num_data: number of data lanes
  * @data:     data lanes configuration
  * @clk:      clock lane configuration (only for D-PHY)
+ * @phy_type: CSI-2 PHY bus type
  */
 struct csiphy_lanes_cfg {
 	int num_data;
 	struct csiphy_lane *data;
 	struct csiphy_lane clk;
+	enum v4l2_mbus_type phy_type;
 };
 
 struct csiphy_csi2_cfg {
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index c54185c93a8a98fc6a20fdb8e0f9f8e61bc41058..f61a9c242ef46f968ecc22dddd16a2e96465ca65 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -4694,11 +4694,8 @@ static int camss_parse_endpoint_node(struct device *dev,
 	if (ret)
 		return ret;
 
-	/*
-	 * Most SoCs support both D-PHY and C-PHY standards, but currently only
-	 * D-PHY is supported in the driver.
-	 */
-	if (vep.bus_type != V4L2_MBUS_CSI2_DPHY) {
+	if (vep.bus_type != V4L2_MBUS_CSI2_DPHY &&
+	    vep.bus_type != V4L2_MBUS_CSI2_CPHY) {
 		dev_err(dev, "Unsupported bus type %d\n", vep.bus_type);
 		return -EINVAL;
 	}
@@ -4706,6 +4703,7 @@ static int camss_parse_endpoint_node(struct device *dev,
 	csd->interface.csiphy_id = vep.base.port;
 
 	mipi_csi2 = &vep.bus.mipi_csi2;
+	lncfg->phy_type = vep.bus_type;
 	lncfg->clk.pos = mipi_csi2->clock_lane;
 	lncfg->clk.pol = mipi_csi2->lane_polarities[0];
 	lncfg->num_data = mipi_csi2->num_data_lanes;
diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h
index 24c738cd78940fa7f6118d78595fe221689a39e7..42543ec98a839567c21485d3e97f875b8a081100 100644
--- a/include/media/v4l2-mediabus.h
+++ b/include/media/v4l2-mediabus.h
@@ -109,6 +109,8 @@ struct v4l2_mbus_config_mipi_csi2 {
 	unsigned char num_data_lanes;
 	bool lane_polarities[1 + V4L2_MBUS_CSI2_MAX_DATA_LANES];
 	enum v4l2_mbus_csi2_cphy_line_orders_type line_orders[V4L2_MBUS_CSI2_MAX_DATA_LANES];
+	u32 t_prepare_ns;
+	u32 t_preamble_ns;
 };
 
 /**

-- 
2.34.1


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  parent reply	other threads:[~2026-10-17 17:13 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-17 17:13 [PATCH RFC 0/6] phy/media: Add generic MIPI C-PHY support to CSI-2 stack Nihal Kumar Gupta
2026-10-17 17:13 ` [PATCH RFC 1/6] phy: core: Add MIPI C-PHY configurations Nihal Kumar Gupta
2026-10-17 17:13 ` Nihal Kumar Gupta [this message]
2026-10-17 17:34   ` [PATCH RFC 2/6] media: qcom: camss: Add C-PHY timing fields and get config from sensor sashiko-bot
2026-10-17 17:13 ` [PATCH RFC 3/6] phy: qcom: mipi-csi2: Split D-PHY register settings Nihal Kumar Gupta
2026-10-17 17:13 ` [PATCH RFC 4/6] phy: qcom: mipi-csi2: Accept C-PHY mode and add register sequence Nihal Kumar Gupta
2026-10-17 17:13 ` [PATCH RFC 5/6] phy: qcom: mipi-csi2: Add C-PHY settle calculation Nihal Kumar Gupta
2026-10-17 17:13 ` [PATCH RFC 6/6] phy: qcom: mipi-csi2: Add lane mask calculation for C-PHY Nihal Kumar Gupta

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