From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: esteuwu@proton.me, Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Rob Clark <robin.clark@oss.qualcomm.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
"Joerg Roedel (AMD)" <joro@8bytes.org>,
Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH 3/8] arm64: dts: qcom: sm8450: Modify GPU operating points
Date: Tue, 23 Jun 2026 13:23:21 +0200 [thread overview]
Message-ID: <27db2e06-e3ea-4edf-a0b9-1baac1d5bb50@oss.qualcomm.com> (raw)
In-Reply-To: <20260622-sm8450-qol-v1-3-37e2ee8df9da@proton.me>
On 6/23/26 2:54 AM, Esteban Urrutia via B4 Relay wrote:
> From: Esteban Urrutia <esteuwu@proton.me>
>
> These frecuencies don't exist in downstream device trees.
> Both 220MHz and 285MHz belong to SM8475, and I'm not sure where 317MHz
> came from.
>
> Signed-off-by: Esteban Urrutia <esteuwu@proton.me>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 15 ---------------
> 1 file changed, 15 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index e34e3c05bf74..5e331a25e22a 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -2495,21 +2495,6 @@ opp-350000000 {
> opp-hz = /bits/ 64 <350000000>;
> opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
> };
> -
> - opp-317000000 {
> - opp-hz = /bits/ 64 <317000000>;
> - opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
> - };
> -
> - opp-285000000 {
> - opp-hz = /bits/ 64 <285000000>;
> - opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
> - };
> -
> - opp-220000000 {
> - opp-hz = /bits/ 64 <220000000>;
> - opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
> - };
These are valid frequency points, although downstream didn't advertize
them.
Funnily enough, the frequency plan lists them as:
LOWSVS_D2 -> 317 MHz // in downstream, at LOW_SVS
LOWSVS_D1 -> 285 MHz // in downstream as-is
LOWSVS_D0 -> 220 MHz // in downstream, LOW_SVS_D1
(the above are what it says in the doc, yes, lower voltage for
higher frequencies.. certainly seems like a bug..)
LOW_SVS -> 350 Mhz // this and the following are in downstream too
LOW_SVS_L1-> 421 MHz
SVS -> 492 MHz
SVS_L0 -> 545 MHz
SVS_L1 -> 599 MHz
SVS_L2 -> 640 MHz
NOM -> 734 MHz
NOM_L1 -> 791 MHz
TURBO -> 818 MHz
so in short, the existing map seems to be OK
Konrad
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next prev parent reply other threads:[~2026-06-23 11:23 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-23 0:54 [PATCH 0/8] SM8450 QoL changes Esteban Urrutia via B4 Relay
2026-06-23 0:54 ` [PATCH 1/8] clk: qcom: dispcc-sm8450: Fix mdss clocks Esteban Urrutia via B4 Relay
2026-06-23 15:39 ` Krzysztof Kozlowski
2026-06-23 15:50 ` Konrad Dybcio
2026-06-23 0:54 ` [PATCH 2/8] arm64: dts: qcom: sm8450: Remove unneeded reserved memory nodes Esteban Urrutia via B4 Relay
2026-06-23 11:02 ` Konrad Dybcio
2026-06-23 11:03 ` Konrad Dybcio
2026-06-23 0:54 ` [PATCH 3/8] arm64: dts: qcom: sm8450: Modify GPU operating points Esteban Urrutia via B4 Relay
2026-06-23 1:10 ` sashiko-bot
2026-06-23 11:23 ` Konrad Dybcio [this message]
2026-06-23 0:54 ` [PATCH 4/8] arm64: dts: qcom: sm8450: Add missing PCM_OUT port Esteban Urrutia via B4 Relay
2026-06-23 1:03 ` sashiko-bot
2026-06-23 0:54 ` [PATCH 5/8] iommu/arm-smmu-qcom: Add SM8450 MDSS compatible Esteban Urrutia via B4 Relay
2026-06-23 1:07 ` sashiko-bot
2026-06-23 11:23 ` Konrad Dybcio
2026-06-23 0:54 ` [PATCH 6/8] phy: qcom: qmp-combo: Drop qmp_v4_calibrate_dp_phy Esteban Urrutia via B4 Relay
2026-06-23 0:54 ` [PATCH 7/8] phy: qcom: qmp-combo: Correct pre-emphasis table for QMP v4 DP PHYs Esteban Urrutia via B4 Relay
2026-06-23 11:36 ` Konrad Dybcio
2026-06-23 0:54 ` [PATCH 8/8] arm64: defconfig: Add SM8450 camcc Esteban Urrutia via B4 Relay
2026-06-23 5:38 ` Krzysztof Kozlowski
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