* [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming
@ 2023-09-11 20:38 Dmitry Baryshkov
2023-09-11 20:38 ` [PATCH v2 1/3] phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers Dmitry Baryshkov
` (3 more replies)
0 siblings, 4 replies; 12+ messages in thread
From: Dmitry Baryshkov @ 2023-09-11 20:38 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy
Fix several small issues with the QMP USB+DP PHY programming on the
Qualcomm SM8550 platform.
Dependencies: [1]
[1] https://lore.kernel.org/all/20230829-topic-8550_usbphy-v3-0-34ec434194c5@linaro.org/
Changes since v1:
- Rebased on top of Konrad's patchet ([1])
Dmitry Baryshkov (3):
phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers
phy: qcom-qmp-usb: move PCS v6 register to the proper header
phy: qcom-qmp-combo: use v6 registers in v6 regs layout
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 50 +++++++++----------
.../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 28 +++--------
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 20 +++++++-
3 files changed, 50 insertions(+), 48 deletions(-)
--
2.39.2
--
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^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v2 1/3] phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers 2023-09-11 20:38 [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming Dmitry Baryshkov @ 2023-09-11 20:38 ` Dmitry Baryshkov 2023-09-11 20:38 ` [PATCH v2 2/3] phy: qcom-qmp-usb: move PCS v6 register to the proper header Dmitry Baryshkov ` (2 subsequent siblings) 3 siblings, 0 replies; 12+ messages in thread From: Dmitry Baryshkov @ 2023-09-11 20:38 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I Cc: Philipp Zabel, linux-arm-msm, linux-phy For all other generations, we have been using just the QPHY prefix for the PCS registers. Remove the _USB part of the QPHY_USB prefix. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 38 +++++++++--------- .../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 40 +++++++++---------- 2 files changed, 39 insertions(+), 39 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 5e6fc8103e9d..02d22595f747 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -845,28 +845,28 @@ static const struct qmp_phy_init_tbl sm8550_usb3_rx_tbl[] = { }; static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = { - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2, 0x89), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3, 0x20), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6, 0x13), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1, 0x21), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RX_SIGDET_LVL, 0x99), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_CDR_RESET_TIME, 0x0a), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG2, 0x89), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG3, 0x20), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG6, 0x13), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_REFGEN_REQ_CONFIG1, 0x21), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_RX_SIGDET_LVL, 0x99), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_CDR_RESET_TIME, 0x0a), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_PCS_TX_RX_CONFIG, 0x0c), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG1, 0x4b), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG5, 0x10), }; static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = { - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68), }; static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = { diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h index c38530d6776b..cf4464849006 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h @@ -7,26 +7,26 @@ #define QCOM_PHY_QMP_PCS_USB_V6_H_ /* Only for QMP V6 PHY - USB3 have different offsets than V5 */ -#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1 0xc4 -#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2 0xc8 -#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc -#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8 -#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc -#define QPHY_USB_V6_PCS_POWER_STATE_CONFIG1 0x90 -#define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188 -#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 -#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 -#define QPHY_USB_V6_PCS_CDR_RESET_TIME 0x1b0 -#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0 -#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4 -#define QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 -#define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc -#define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0xc4 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0xc8 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0xcc +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0xd8 +#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc +#define QPHY_V6_PCS_POWER_STATE_CONFIG1 0x90 +#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 +#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4 +#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 +#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc +#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec -#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00 -#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18 -#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c -#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40 -#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44 +#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00 +#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18 +#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c +#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40 +#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44 #endif -- 2.39.2 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/3] phy: qcom-qmp-usb: move PCS v6 register to the proper header 2023-09-11 20:38 [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming Dmitry Baryshkov 2023-09-11 20:38 ` [PATCH v2 1/3] phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers Dmitry Baryshkov @ 2023-09-11 20:38 ` Dmitry Baryshkov 2023-09-11 20:38 ` [PATCH v2 3/3] phy: qcom-qmp-combo: use v6 registers in v6 regs layout Dmitry Baryshkov 2023-11-06 6:45 ` [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming Rohit Agarwal 3 siblings, 0 replies; 12+ messages in thread From: Dmitry Baryshkov @ 2023-09-11 20:38 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I Cc: Philipp Zabel, linux-arm-msm, linux-phy The commit 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets") incorrectly added plain PCS registers to the PCS_USB header. Move them to a proper location. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 16 ---------------- drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 16 ++++++++++++++-- 2 files changed, 14 insertions(+), 18 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h index cf4464849006..7c16af0b1cc3 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h @@ -7,22 +7,6 @@ #define QCOM_PHY_QMP_PCS_USB_V6_H_ /* Only for QMP V6 PHY - USB3 have different offsets than V5 */ -#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0xc4 -#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0xc8 -#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0xcc -#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0xd8 -#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc -#define QPHY_V6_PCS_POWER_STATE_CONFIG1 0x90 -#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 -#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 -#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 -#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0 -#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0 -#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4 -#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 -#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc -#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec - #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00 #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18 #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h index 18c4a3abe590..47cedb860fef 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h @@ -7,10 +7,22 @@ #define QCOM_PHY_QMP_PCS_V6_H_ /* Only for QMP V6 PHY - USB/PCIe PCS registers */ -#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc +#define QPHY_V6_PCS_POWER_STATE_CONFIG1 0x090 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0x0d8 +#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0x0dc #define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 #define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198 -#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4 #define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 +#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc +#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec #endif -- 2.39.2 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 3/3] phy: qcom-qmp-combo: use v6 registers in v6 regs layout 2023-09-11 20:38 [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming Dmitry Baryshkov 2023-09-11 20:38 ` [PATCH v2 1/3] phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers Dmitry Baryshkov 2023-09-11 20:38 ` [PATCH v2 2/3] phy: qcom-qmp-usb: move PCS v6 register to the proper header Dmitry Baryshkov @ 2023-09-11 20:38 ` Dmitry Baryshkov 2023-09-11 20:42 ` Konrad Dybcio 2023-11-06 6:45 ` [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming Rohit Agarwal 3 siblings, 1 reply; 12+ messages in thread From: Dmitry Baryshkov @ 2023-09-11 20:38 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I Cc: Philipp Zabel, linux-arm-msm, linux-phy Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 12 ++++++------ drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 ++ drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 4 ++++ 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 02d22595f747..9c87845c78ec 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { }; static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { - [QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET, - [QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL, - [QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1, - [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL, + [QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET, + [QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL, + [QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1, + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL, /* In PCS_USB */ - [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL, - [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, + [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL, + [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL, [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS, diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h index 7c16af0b1cc3..0d0089898240 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h @@ -8,6 +8,8 @@ /* Only for QMP V6 PHY - USB3 have different offsets than V5 */ #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00 +#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08 +#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14 #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18 #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c #define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40 diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h index 47cedb860fef..08299d2b78f0 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h @@ -7,6 +7,10 @@ #define QCOM_PHY_QMP_PCS_V6_H_ /* Only for QMP V6 PHY - USB/PCIe PCS registers */ +#define QPHY_V6_PCS_SW_RESET 0x000 +#define QPHY_V6_PCS_PCS_STATUS1 0x014 +#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040 +#define QPHY_V6_PCS_START_CONTROL 0x044 #define QPHY_V6_PCS_POWER_STATE_CONFIG1 0x090 #define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4 #define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8 -- 2.39.2 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/3] phy: qcom-qmp-combo: use v6 registers in v6 regs layout 2023-09-11 20:38 ` [PATCH v2 3/3] phy: qcom-qmp-combo: use v6 registers in v6 regs layout Dmitry Baryshkov @ 2023-09-11 20:42 ` Konrad Dybcio 2023-09-11 21:17 ` Dmitry Baryshkov 0 siblings, 1 reply; 12+ messages in thread From: Konrad Dybcio @ 2023-09-11 20:42 UTC (permalink / raw) To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Vinod Koul, Kishon Vijay Abraham I Cc: Philipp Zabel, linux-arm-msm, linux-phy On 11.09.2023 22:38, Dmitry Baryshkov wrote: > Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- [...] > /* Only for QMP V6 PHY - USB3 have different offsets than V5 */ This comment becomes invalid Konrad -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/3] phy: qcom-qmp-combo: use v6 registers in v6 regs layout 2023-09-11 20:42 ` Konrad Dybcio @ 2023-09-11 21:17 ` Dmitry Baryshkov 2023-09-11 21:21 ` Konrad Dybcio 0 siblings, 1 reply; 12+ messages in thread From: Dmitry Baryshkov @ 2023-09-11 21:17 UTC (permalink / raw) To: Konrad Dybcio Cc: Andy Gross, Bjorn Andersson, Vinod Koul, Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy On Mon, 11 Sept 2023 at 23:42, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > On 11.09.2023 22:38, Dmitry Baryshkov wrote: > > Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > [...] > > > /* Only for QMP V6 PHY - USB3 have different offsets than V5 */ > This comment becomes invalid This actually rises the question, why was it called v6 in the first place? -- With best wishes Dmitry -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/3] phy: qcom-qmp-combo: use v6 registers in v6 regs layout 2023-09-11 21:17 ` Dmitry Baryshkov @ 2023-09-11 21:21 ` Konrad Dybcio 0 siblings, 0 replies; 12+ messages in thread From: Konrad Dybcio @ 2023-09-11 21:21 UTC (permalink / raw) To: Dmitry Baryshkov Cc: Andy Gross, Bjorn Andersson, Vinod Koul, Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy On 11.09.2023 23:17, Dmitry Baryshkov wrote: > On Mon, 11 Sept 2023 at 23:42, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: >> >> On 11.09.2023 22:38, Dmitry Baryshkov wrote: >>> Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout. >>> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >>> --- >> [...] >> >>> /* Only for QMP V6 PHY - USB3 have different offsets than V5 */ >> This comment becomes invalid > > This actually rises the question, why was it called v6 in the first place? if "it" == the qmpphy "v6" return "perhaps v5 was mostly ok but needed evolution"; Konrad > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming 2023-09-11 20:38 [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming Dmitry Baryshkov ` (2 preceding siblings ...) 2023-09-11 20:38 ` [PATCH v2 3/3] phy: qcom-qmp-combo: use v6 registers in v6 regs layout Dmitry Baryshkov @ 2023-11-06 6:45 ` Rohit Agarwal 2023-11-06 9:37 ` Dmitry Baryshkov 3 siblings, 1 reply; 12+ messages in thread From: Rohit Agarwal @ 2023-11-06 6:45 UTC (permalink / raw) To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I Cc: Philipp Zabel, linux-arm-msm, linux-phy On 9/12/2023 2:08 AM, Dmitry Baryshkov wrote: > Fix several small issues with the QMP USB+DP PHY programming on the > Qualcomm SM8550 platform. Hi Dmitry, Can we have a conclusion on this series? The USB support series [1] for SDX75 depends on it. [1] https://lore.kernel.org/all/1695359525-4548-1-git-send-email-quic_rohiagar@quicinc.com/ Thanks, Rohit. > > Dependencies: [1] > > [1] https://lore.kernel.org/all/20230829-topic-8550_usbphy-v3-0-34ec434194c5@linaro.org/ > > Changes since v1: > - Rebased on top of Konrad's patchet ([1]) > > Dmitry Baryshkov (3): > phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers > phy: qcom-qmp-usb: move PCS v6 register to the proper header > phy: qcom-qmp-combo: use v6 registers in v6 regs layout > > drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 50 +++++++++---------- > .../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 28 +++-------- > drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 20 +++++++- > 3 files changed, 50 insertions(+), 48 deletions(-) > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming 2023-11-06 6:45 ` [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming Rohit Agarwal @ 2023-11-06 9:37 ` Dmitry Baryshkov 2023-11-06 9:41 ` Rohit Agarwal 0 siblings, 1 reply; 12+ messages in thread From: Dmitry Baryshkov @ 2023-11-06 9:37 UTC (permalink / raw) To: Rohit Agarwal Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy Hi Rohit, On Mon, 6 Nov 2023 at 08:46, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote: > > > On 9/12/2023 2:08 AM, Dmitry Baryshkov wrote: > > Fix several small issues with the QMP USB+DP PHY programming on the > > Qualcomm SM8550 platform. > > Hi Dmitry, > > Can we have a conclusion on this series? Yes. Version 3 of this series was accepted by Vinod: https://lore.kernel.org/linux-arm-msm/169719381727.165658.9377101716537787206.b4-ty@kernel.org/ > The USB support series [1] for > SDX75 depends on it. > [1] > https://lore.kernel.org/all/1695359525-4548-1-git-send-email-quic_rohiagar@quicinc.com/ -- With best wishes Dmitry -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming 2023-11-06 9:37 ` Dmitry Baryshkov @ 2023-11-06 9:41 ` Rohit Agarwal 2023-11-16 11:36 ` Vinod Koul 0 siblings, 1 reply; 12+ messages in thread From: Rohit Agarwal @ 2023-11-06 9:41 UTC (permalink / raw) To: Dmitry Baryshkov Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy On 11/6/2023 3:07 PM, Dmitry Baryshkov wrote: > Hi Rohit, > > On Mon, 6 Nov 2023 at 08:46, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote: >> >> On 9/12/2023 2:08 AM, Dmitry Baryshkov wrote: >>> Fix several small issues with the QMP USB+DP PHY programming on the >>> Qualcomm SM8550 platform. >> Hi Dmitry, >> >> Can we have a conclusion on this series? > Yes. Version 3 of this series was accepted by Vinod: > > https://lore.kernel.org/linux-arm-msm/169719381727.165658.9377101716537787206.b4-ty@kernel.org/ Thanks for the update!!!. Thanks, Rohit. > >> The USB support series [1] for >> SDX75 depends on it. >> [1] >> https://lore.kernel.org/all/1695359525-4548-1-git-send-email-quic_rohiagar@quicinc.com/ > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming 2023-11-06 9:41 ` Rohit Agarwal @ 2023-11-16 11:36 ` Vinod Koul 2023-11-16 11:46 ` Rohit Agarwal 0 siblings, 1 reply; 12+ messages in thread From: Vinod Koul @ 2023-11-16 11:36 UTC (permalink / raw) To: Rohit Agarwal Cc: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio, Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy On 06-11-23, 15:11, Rohit Agarwal wrote: > > On 11/6/2023 3:07 PM, Dmitry Baryshkov wrote: > > Hi Rohit, > > > > On Mon, 6 Nov 2023 at 08:46, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote: > > > > > > On 9/12/2023 2:08 AM, Dmitry Baryshkov wrote: > > > > Fix several small issues with the QMP USB+DP PHY programming on the > > > > Qualcomm SM8550 platform. > > > Hi Dmitry, > > > > > > Can we have a conclusion on this series? > > Yes. Version 3 of this series was accepted by Vinod: > > > > https://lore.kernel.org/linux-arm-msm/169719381727.165658.9377101716537787206.b4-ty@kernel.org/ > Thanks for the update!!!. You need to rebase your series as send -- ~Vinod -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming 2023-11-16 11:36 ` Vinod Koul @ 2023-11-16 11:46 ` Rohit Agarwal 0 siblings, 0 replies; 12+ messages in thread From: Rohit Agarwal @ 2023-11-16 11:46 UTC (permalink / raw) To: Vinod Koul Cc: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio, Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy On 11/16/2023 5:06 PM, Vinod Koul wrote: > On 06-11-23, 15:11, Rohit Agarwal wrote: >> On 11/6/2023 3:07 PM, Dmitry Baryshkov wrote: >>> Hi Rohit, >>> >>> On Mon, 6 Nov 2023 at 08:46, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote: >>>> On 9/12/2023 2:08 AM, Dmitry Baryshkov wrote: >>>>> Fix several small issues with the QMP USB+DP PHY programming on the >>>>> Qualcomm SM8550 platform. >>>> Hi Dmitry, >>>> >>>> Can we have a conclusion on this series? >>> Yes. Version 3 of this series was accepted by Vinod: >>> >>> https://lore.kernel.org/linux-arm-msm/169719381727.165658.9377101716537787206.b4-ty@kernel.org/ >> Thanks for the update!!!. > You need to rebase your series as send Yes. Will do it. Thanks, Rohit. -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-11-16 11:46 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-09-11 20:38 [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming Dmitry Baryshkov 2023-09-11 20:38 ` [PATCH v2 1/3] phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers Dmitry Baryshkov 2023-09-11 20:38 ` [PATCH v2 2/3] phy: qcom-qmp-usb: move PCS v6 register to the proper header Dmitry Baryshkov 2023-09-11 20:38 ` [PATCH v2 3/3] phy: qcom-qmp-combo: use v6 registers in v6 regs layout Dmitry Baryshkov 2023-09-11 20:42 ` Konrad Dybcio 2023-09-11 21:17 ` Dmitry Baryshkov 2023-09-11 21:21 ` Konrad Dybcio 2023-11-06 6:45 ` [PATCH v2 0/3] phy: qcom-qmp-combo: correct sm8550 PHY programming Rohit Agarwal 2023-11-06 9:37 ` Dmitry Baryshkov 2023-11-06 9:41 ` Rohit Agarwal 2023-11-16 11:36 ` Vinod Koul 2023-11-16 11:46 ` Rohit Agarwal
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