From: Florian Fainelli <f.fainelli@gmail.com>
To: "Rafał Miłecki" <zajec5@gmail.com>,
"Kishon Vijay Abraham I" <kishon@ti.com>,
"Vinod Koul" <vkoul@kernel.org>
Cc: "Al Cooper" <alcooperx@gmail.com>,
"Florian Fainelli" <f.fainelli@gmail.com>,
linux-phy@lists.infradead.org,
bcm-kernel-feedback-list@broadcom.com,
"Rafał Miłecki" <rafal@milecki.pl>
Subject: Re: [PATCH] phy: phy-brcm-usb: fixup BCM4908 support
Date: Thu, 24 Feb 2022 16:50:56 -0800 [thread overview]
Message-ID: <7e7280be-a253-2cc9-cda9-8093f8512d9f@gmail.com> (raw)
In-Reply-To: <20220218172459.10431-1-zajec5@gmail.com>
On 2/18/2022 9:24 AM, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
>
> Just like every other family BCM4908 should get its own enum value. That
> is required to properly handle it in chipset conditional code.
>
> The real change is excluding BCM4908 from the PLL reprogramming code
> (see brcmusb_usb3_pll_54mhz()). I'm not sure what's the BCM4908
> reference clock frequency but:
> 1. BCM4908 custom driver from Broadcom's SDK doesn't reprogram PLL
> 2. Doing that in Linux driver stopped PHY handling some USB 3.0 devices
>
> This change makes USB 3.0 PHY recognize e.g.:
> 1. 04e8:6860 - Samsung Electronics Co., Ltd Galaxy series, misc. (MTP mode)
> 2. 1058:259f - Western Digital My Passport 259F
>
> Broadcom's STB SoCs come with a set of SUN_TOP_CTRL_* registers that
> allow reading chip family and product ids. Such a block & register is
> missing on BCM4908 so this commit introduces "compatible" string
> specific binding.
>
> Fixes: 4b402fa8e0b7 ("phy: phy-brcm-usb: support PHY on the BCM4908")
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
> Regarding the (STB's) SUN_TOP_CTRL_CHIP_FAMILY_ID: I tried reading 4
> extra PHY block registers:
> #define USB_CTRL_USB20_ID 0xf0
> #define USB_CTRL_USB30_ID 0xf4
> #define USB_CTRL_BDC_COREID 0xf8
> #define USB_CTRL_USB_REVID 0xfc
>
> but didn't get anything interesting:
> 0xd054298a
> 0xc2300201
> 0x00003012
> 0x00000001
>
> I also tried PERF's block RevID register (0xff800000) and actually found
> chipset number there:
> 0x490801a0
> but it uses different format and seems to contain different info than
> what we know from STB.
You could consider implementing a soc_device driver for BCM63xx/4908
SoCs and use the PERF RevID register.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2022-02-25 0:51 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-18 17:24 [PATCH] phy: phy-brcm-usb: fixup BCM4908 support Rafał Miłecki
2022-02-25 0:50 ` Florian Fainelli [this message]
2022-02-25 9:02 ` Vinod Koul
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