From: Vinod Koul <vkoul@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Kishon Vijay Abraham I <kishon@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Melody Olvera <melody.olvera@oss.qualcomm.com>,
Wesley Cheng <quic_wcheng@quicinc.com>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750
Date: Mon, 16 Jun 2025 22:30:54 +0530 [thread overview]
Message-ID: <aFBNxvggJXYKQ4d1@vaman> (raw)
In-Reply-To: <20250616062541.7167-2-krzysztof.kozlowski@linaro.org>
On 16-06-25, 08:25, Krzysztof Kozlowski wrote:
> Add missing DP PHY status and VCO clock configuration registers to fix
> configuring the VCO rate on SM8750. Without proper VCO rate setting, it
> works on after-reset half of rate which is not enough for DP over USB to
> work as seen on logs:
>
> [drm:msm_dp_ctrl_link_train_1_2] *ERROR* max v_level reached
> [drm:msm_dp_ctrl_link_train_1_2] *ERROR* link training #1 on phy 0 failed. ret=-11
Hey,
This does not apply for on phy/fixes
Can you please rebase
--
~Vinod
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next prev parent reply other threads:[~2025-06-16 18:29 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-16 6:25 [PATCH] phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750 Krzysztof Kozlowski
2025-06-16 7:30 ` neil.armstrong
2025-06-16 10:52 ` Dmitry Baryshkov
2025-06-16 17:00 ` Vinod Koul [this message]
2025-06-17 6:00 ` Krzysztof Kozlowski
2025-06-27 0:47 ` Vinod Koul
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