* [PATCH 0/4] phy: qcom: Fix possible NULL-deref and runtime PM race conditions
From: Loic Poulain @ 2026-01-08 15:49 UTC (permalink / raw)
To: vkoul, kishon
Cc: linux-arm-msm, linux-phy, dmitry.baryshkov, neil.armstrong,
Loic Poulain
Address potential NULL pointer dereferences and race conditions related
to runtime PM in several Qualcomm PHY drivers. In all cases, enabling
runtime PM before the PHY instance is fully initialized can lead to
crashes during early runtime suspend callbacks.
- Attach driver data before enabling runtime PM.
- Introduce initialization flags where needed to avoid dereferencing
uninitialized pointers.
- Reorder pm_runtime_enable() and pm_runtime_forbid() calls to prevent
unnecessary suspend/resume cycles during driver probe.
- Use devres-managed PM runtime helpers for proper cleanup.
Loic Poulain (4):
phy: qcom: qmp-combo: Prevent unnecessary PM runtime suspend at boot
phy: qcom: qmp-usbc: Fix possible NULL-deref on early runtime suspend
phy: qcom: qmp-usb-legacy: Fix possible NULL-deref on early runtime
suspend
phy: qcom: snps-femto-v2: Fix possible NULL-deref on early runtime
suspend
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 10 ++++-----
.../phy/qualcomm/phy-qcom-qmp-usb-legacy.c | 21 ++++++++++++-------
drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 14 ++++++-------
drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 15 ++++++-------
4 files changed, 34 insertions(+), 26 deletions(-)
--
2.34.1
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^ permalink raw reply
* Re: [PATCH v3] phy: fsl-imx8mq-usb: add debugfs to access control register
From: Frank Li @ 2026-01-08 15:43 UTC (permalink / raw)
To: Xu Yang
Cc: vkoul, neil.armstrong, shawnguo, kernel, festevam, jun.li,
linux-phy, imx, linux-arm-kernel, linux-kernel
In-Reply-To: <20260108083641.2119616-1-xu.yang_2@nxp.com>
On Thu, Jan 08, 2026 at 04:36:41PM +0800, Xu Yang wrote:
> The CR port is a simple 16-bit data/address parallel port that is
> provided for on-chip access to the control registers inside the
> USB 3.0 femtoPHY[1].
> While access to these registers is not required
> for normal PHY operation, this interface enables you to access
> some of the PHY’s diagnostic features during normal operation or
> to override some basic PHY control signals.
Simple said "Export these registers by debugfs to help PHY’s diagnostic."
should be enough
>
> 3 debugfs files are created to read and write control registers,
> all use hexadecimal format:
> ctrl_reg_base: the register offset to write, or the start offset
> to read.
> ctrl_reg_count: how many continuous registers to be read.
> ctrl_reg_value: read to show the continuous registers value from
> the offset in ctrl_reg_base, to ctrl_reg_base
> + ctrl_reg_count - 1, one line for one register.
> when write, override the register at ctrl_reg_base,
> one time can only change one 16bits register.
how many regs? how about create file regNNN,
cat/echo to regNNN?
or create export file
echo 100 > export, then create REG100, so can use cat/echo modify it.
>
> Link[1]: https://www.synopsys.com/dw/doc.php/phy/usb3.0/femto/phy/x652_usb3_ss14lpp_18_ns/4.07a/dwc_usb3.0_femtophy_ss14lpp_08V18V_x1_databook.pdf
> Signed-off-by: Li Jun <jun.li@nxp.com>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
>
> ---
> Changes in v3:
> - add documentation link of registers
> Changes in v2:
> - correct copyright
> - add imx8mq_phy_wait_for_cr_ack() helper and use it
> - use DEFINE_SHOW_STORE_ATTRIBUTE()
> - directly create debugfs file under imx phy debugfs
> - remove debug_remove_files() since the phy core will handle it
> ---
> drivers/phy/freescale/phy-fsl-imx8mq-usb.c | 180 ++++++++++++++++++++-
> 1 file changed, 178 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> index 95f9264bd0f7..e11054f6673c 100644
> --- a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> +++ b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> @@ -1,10 +1,11 @@
> // SPDX-License-Identifier: GPL-2.0+
> -/* Copyright (c) 2017 NXP. */
> +/* Copyright 2017-2025 NXP. */
>
> #include <linux/bitfield.h>
> #include <linux/clk.h>
> +#include <linux/debugfs.h>
> #include <linux/delay.h>
> -#include <linux/io.h>
> +#include <linux/iopoll.h>
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/phy/phy.h>
> @@ -57,6 +58,20 @@
>
> #define PHY_TUNE_DEFAULT 0xffffffff
>
> +/* PHY control register access */
> +#define PHY_CTRL_REG_OFFSET_MAX 0x201f
> +
> +#define PHY_CRCTL 0x30
> +#define PHY_CRCTL_DATA_IN_MASK GENMASK(15, 0)
> +#define PHY_CRCTL_CAP_ADDR BIT(16)
> +#define PHY_CRCTL_CAP_DATA BIT(17)
> +#define PHY_CRCTL_CR_WRITE BIT(18)
> +#define PHY_CRCTL_CR_READ BIT(19)
> +
> +#define PHY_CRSR 0x34
> +#define PHY_CRSR_DATA_OUT_MASK GENMASK(15, 0)
> +#define PHY_CRSR_CR_ACK BIT(16)
> +
> #define TCA_CLK_RST 0x00
> #define TCA_CLK_RST_SW BIT(9)
> #define TCA_CLK_RST_REF_CLK_EN BIT(1)
> @@ -118,6 +133,9 @@ struct imx8mq_usb_phy {
> void __iomem *base;
> struct regulator *vbus;
> struct tca_blk *tca;
> + struct dentry *debugfs;
> + u16 cr_access_base;
> + u16 cr_read_count;
> u32 pcs_tx_swing_full;
> u32 pcs_tx_deemph_3p5db;
> u32 tx_vref_tune;
> @@ -411,6 +429,163 @@ static u32 phy_pcs_tx_swing_full_from_property(u32 percent)
> percent = min(percent, 100U);
>
> return (percent * 127) / 100;
> +};
> +
> +static int imx8mq_phy_wait_for_cr_ack(struct imx8mq_usb_phy *imx_phy,
> + u32 stage, u32 *data)
> +{
> + void __iomem *cr_ctrl = imx_phy->base + PHY_CRCTL;
> + void __iomem *cr_sr = imx_phy->base + PHY_CRSR;
> + u32 val;
> + int ret;
> +
> + writel(readl(cr_ctrl) | stage, cr_ctrl);
> + /* Wait CRSR[16] == 1 */
> + ret = readl_poll_timeout(cr_sr, val,
> + (val & PHY_CRSR_CR_ACK) == PHY_CRSR_CR_ACK,
> + 1, 100);
> + if (ret)
> + return ret;
> +
> + if (stage == PHY_CRCTL_CR_READ)
> + *data = readl(cr_sr) & 0xffff;
> +
> + writel(readl(cr_ctrl) & (~stage), cr_ctrl);
> + /* Wait CRSR[16] == 0 */
> + return readl_poll_timeout(cr_sr, val, (val & PHY_CRSR_CR_ACK) == 0, 1, 100);
> +}
> +
> +static int imx8mq_phy_ctrl_reg_addr(struct imx8mq_usb_phy *imx_phy, u16 offset)
> +{
> + void __iomem *cr_ctrl = imx_phy->base + PHY_CRCTL;
> + struct device *dev = &imx_phy->phy->dev;
> + int ret;
> +
> + writel(offset, cr_ctrl);
> + ret = imx8mq_phy_wait_for_cr_ack(imx_phy, PHY_CRCTL_CAP_ADDR, NULL);
> + if (ret < 0) {
> + dev_err(dev, "Failed to address reg 0x%04x\n", offset);
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static int imx8mq_phy_ctrl_reg_read(struct imx8mq_usb_phy *imx_phy,
> + u16 offset, u32 *val)
> +{
> + struct device *dev = &imx_phy->phy->dev;
> + int ret;
> +
> + if (offset > PHY_CTRL_REG_OFFSET_MAX) {
> + dev_err(dev, "Invalid reg address 0x%04x\n", offset);
> + return -EINVAL;
> + }
> +
> + /* Address stage */
> + ret = imx8mq_phy_ctrl_reg_addr(imx_phy, offset);
> + if (ret)
> + return ret;
> +
> + /* Read data stage */
> + ret = imx8mq_phy_wait_for_cr_ack(imx_phy, PHY_CRCTL_CR_READ, val);
> + if (ret < 0) {
> + dev_err(dev, "Failed to read reg 0x%04x\n", offset);
> + return -EIO;
> + }
> +
> + return ret;
> +}
> +
> +static int imx8mq_phy_ctrl_reg_write(struct imx8mq_usb_phy *imx_phy,
> + u16 offset, u16 val)
> +{
> + struct device *dev = &imx_phy->phy->dev;
> + void __iomem *cr_ctrl = imx_phy->base + PHY_CRCTL;
> + int ret;
> +
> + if (offset > PHY_CTRL_REG_OFFSET_MAX) {
> + dev_err(dev, "Invalid reg address 0x%04x\n", offset);
> + return -EINVAL;
> + }
> +
> + /* Address stage */
> + ret = imx8mq_phy_ctrl_reg_addr(imx_phy, offset);
> + if (ret)
> + return ret;
> +
> + /* Capture data stage */
> + writel(val, cr_ctrl);
> + ret = imx8mq_phy_wait_for_cr_ack(imx_phy, PHY_CRCTL_CAP_DATA, NULL);
> + if (ret < 0)
> + goto cr_write_err;
> +
> + /* Write data stage */
> + ret = imx8mq_phy_wait_for_cr_ack(imx_phy, PHY_CRCTL_CR_WRITE, NULL);
> + if (ret < 0)
> + goto cr_write_err;
> +
> + return 0;
> +
> +cr_write_err:
> + dev_err(dev, "Failed to write reg 0x%04x\n", offset);
> + return -EIO;
> +}
> +
> +static int ctrl_reg_value_show(struct seq_file *s, void *unused)
> +{
> + struct imx8mq_usb_phy *imx_phy = s->private;
> + u16 base = imx_phy->cr_access_base;
> + u32 val;
> + int i, ret;
> +
> + for (i = 0; i < imx_phy->cr_read_count; i++) {
> + ret = imx8mq_phy_ctrl_reg_read(imx_phy, base + i, &val);
> + if (ret < 0)
> + return ret;
> +
> + seq_printf(s, "Control Register 0x%04x value is 0x%04x\n",
> + base + i, val);
> + }
> +
> + return 0;
> +}
> +
> +static ssize_t ctrl_reg_value_write(struct file *file, const char __user *ubuf,
> + size_t count, loff_t *ppos)
> +
> +{
> + struct seq_file *s = file->private_data;
> + struct imx8mq_usb_phy *imx_phy = s->private;
> + u16 cr_value;
> + int ret;
> +
> + ret = kstrtou16_from_user(ubuf, count, 16, &cr_value);
> + if (ret)
> + return ret;
> +
> + ret = imx8mq_phy_ctrl_reg_write(imx_phy, imx_phy->cr_access_base, cr_value);
> + if (ret)
> + return ret;
> +
> + return count;
> +}
> +
> +DEFINE_SHOW_STORE_ATTRIBUTE(ctrl_reg_value);
> +
> +static void imx8m_create_debug_files(struct imx8mq_usb_phy *imx_phy)
> +{
> + struct dentry *debugfs = imx_phy->phy->debugfs;
> +
> + debugfs_create_x16("ctrl_reg_base", 0600, debugfs,
> + &imx_phy->cr_access_base);
> + debugfs_create_x16("ctrl_reg_count", 0600, debugfs,
> + &imx_phy->cr_read_count);
> + debugfs_create_file("ctrl_reg_value", 0600, debugfs,
> + imx_phy, &ctrl_reg_value_fops);
> +
> + imx_phy->cr_access_base = 0;
> + imx_phy->cr_read_count = 1;
> }
>
> static void imx8m_get_phy_tuning_data(struct imx8mq_usb_phy *imx_phy)
> @@ -731,6 +906,7 @@ static int imx8mq_usb_phy_probe(struct platform_device *pdev)
> "failed to get tca\n");
>
> imx8m_get_phy_tuning_data(imx_phy);
> + imx8m_create_debug_files(imx_phy);
where remove debug fs?
Frank
>
> phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
>
> --
> 2.34.1
>
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^ permalink raw reply
* Re: [PATCH v2] phy: fsl-imx8mq-usb: add debugfs to access control register
From: Andrew Lunn @ 2026-01-08 14:47 UTC (permalink / raw)
To: Xu Yang
Cc: vkoul, neil.armstrong, shawnguo, kernel, festevam, jun.li,
Frank.Li, linux-phy, imx, linux-arm-kernel, linux-kernel
In-Reply-To: <7bbvfiy5wceantklz6lav5rwak53yhasfvzddtsirqorcylrf6@rbcrocqftznj>
On Thu, Jan 08, 2026 at 04:22:24PM +0800, Xu Yang wrote:
> On Wed, Dec 24, 2025 at 02:51:11PM +0100, Andrew Lunn wrote:
> > On Wed, Dec 24, 2025 at 07:17:16PM +0800, Xu Yang wrote:
> > > The CR port is a simple 16-bit data/address parallel port that is
> > > provided for on-chip access to the control registers inside the
> > > USB 3.0 femtoPHY. While access to these registers is not required
> > > for normal PHY operation, this interface enables you to access
> > > some of the PHY’s diagnostic features during normal operation or
> > > to override some basic PHY control signals.
> > >
> > > 3 debugfs files are created to read and write control registers,
> > > all use hexadecimal format:
> > > ctrl_reg_base: the register offset to write, or the start offset
> > > to read.
> > > ctrl_reg_count: how many continuous registers to be read.
> > > ctrl_reg_value: read to show the continuous registers value from
> > > the offset in ctrl_reg_base, to ctrl_reg_base
> > > + ctrl_reg_count - 1, one line for one register.
> > > when write, override the register at ctrl_reg_base,
> > > one time can only change one 16bits register.
> >
> > Are the registers openly documented somewhere? Could you include a
> > link in the commit message.
>
> We integrate a SNPS PHY in Soc. So the registers are documented
> in SNPS doc. Anyway, I can add a link for reference.
Humm, so the registers are defined by a Synopsys databook?
Shouldn't this patch be split into two? The access mechanism to the
registers is specific to the imx8mq. But the registers themselves
should be part of the generic SNPS PHY driver which should be shared
by all devices using this licensed IP?
I should say, generic PHY is not my usual subsystem. But i've seen the
mess chip vendors make with licensed Synopsys Ethernet drivers, lots
of blind copy/paste, no real thought about what is generic to the IP
and what is specific to the SoC integration, and what can be shared
between different SoC integration's, etc. I just want to make sure the
same issues are not being repeated here.
Andrew
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^ permalink raw reply
* Re: [PATCH v5 11/24] scsi: ufs: mediatek: Rework probe function
From: Krzysztof Kozlowski @ 2026-01-08 12:25 UTC (permalink / raw)
To: Nicolas Frattaroli, Alim Akhtar, Avri Altman, Bart Van Assche,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy
In-Reply-To: <20260108-mt8196-ufs-v5-11-49215157ec41@collabora.com>
On 08/01/2026 11:49, Nicolas Frattaroli wrote:
> Remove the ti,syscon-reset cruft.
Please provide here reason, e.g. undocumented ABI. Normally I would ask
about ABI impact, but considering this is was just copied from some
downstream code I would just not care.
Mediatek should really stop and rethink their upstream process.
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH v5 17/24] scsi: ufs: mediatek: Add vendor prefix to clk-scale-up-vcore-min
From: Krzysztof Kozlowski @ 2026-01-08 12:22 UTC (permalink / raw)
To: Nicolas Frattaroli, Alim Akhtar, Avri Altman, Bart Van Assche,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy
In-Reply-To: <20260108-mt8196-ufs-v5-17-49215157ec41@collabora.com>
On 08/01/2026 11:49, Nicolas Frattaroli wrote:
> Device Tree properties other than the standard properties must be
> prefixed with the vendor's name. The "clk-scale-up-vcore-min" property,
> which this driver uses, and the binding did not previously document,
> lacked a vendor prefix.
>
> Add the missing "mediatek," vendor prefix and clean up the error print.
Sorry, but no, because it is still undocumented. You cannot add new
undocumented API (at least according to git grep and first three patches
here).
Please instead drop the property completely. Mediatek is not allowed to
push downstream code here.
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH v4 11/25] scsi: ufs: mediatek: Rework probe function
From: Krzysztof Kozlowski @ 2026-01-08 12:19 UTC (permalink / raw)
To: Peter Wang (王信友), chu.stanley@gmail.com,
robh@kernel.org, Chunfeng Yun (云春峰),
kishon@kernel.org, James.Bottomley@HansenPartnership.com,
bvanassche@acm.org, AngeloGioacchino Del Regno,
neil.armstrong@linaro.org, conor+dt@kernel.org,
Chaotian Jing (井朝天), lgirdwood@gmail.com,
nicolas.frattaroli@collabora.com, vkoul@kernel.org,
krzk+dt@kernel.org, p.zabel@pengutronix.de,
alim.akhtar@samsung.com, matthias.bgg@gmail.com,
avri.altman@wdc.com, martin.petersen@oracle.com,
broonie@kernel.org
Cc: linux-scsi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-phy@lists.infradead.org, linux-mediatek@lists.infradead.org,
Louis-Alexis Eyraud, kernel@collabora.com
In-Reply-To: <213d3077835fc86d15579c0a0a91f64fd84b1059.camel@mediatek.com>
On 06/01/2026 14:23, Peter Wang (王信友) wrote:
> On Thu, 2025-12-18 at 13:55 +0100, Nicolas Frattaroli wrote:
>>
>> Remove the ti,syscon-reset cruft.
>>
>
> Hi Nicolas,
>
> Why do we need to remove the reset node? If an error occurs and the
Commit msg should be improved and provide the reason, e.g. because it is
undocumented and unused ABI.
> host
> does not perform a reset, it could lead to error recovery failure.
This is not a reason to use undocumented ABI.
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH v5 12/24] scsi: ufs: mediatek: Remove vendor kernel quirks cruft
From: Krzysztof Kozlowski @ 2026-01-08 12:16 UTC (permalink / raw)
To: Nicolas Frattaroli, Alim Akhtar, Avri Altman, Bart Van Assche,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy
In-Reply-To: <20260108-mt8196-ufs-v5-12-49215157ec41@collabora.com>
On 08/01/2026 11:49, Nicolas Frattaroli wrote:
> Both ufs_mtk_vreg_fix_vcc and ufs_mtk_vreg_fix_vccqx look like they are
> vendor kernel hacks to work around existing downstream device trees.
> Mainline does not need or want them, so remove them.
>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Just in case Mediatek again promotes their downstream vendor kernel as
justification for upstream (which is really unacceptable and was told to
Mediatek more than once):
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH v4 12/25] scsi: ufs: mediatek: Remove vendor kernel quirks cruft
From: Krzysztof Kozlowski @ 2026-01-08 12:16 UTC (permalink / raw)
To: Peter Wang (王信友), chu.stanley@gmail.com,
robh@kernel.org, Chunfeng Yun (云春峰),
kishon@kernel.org, James.Bottomley@HansenPartnership.com,
bvanassche@acm.org, AngeloGioacchino Del Regno,
neil.armstrong@linaro.org, conor+dt@kernel.org,
Chaotian Jing (井朝天), lgirdwood@gmail.com,
nicolas.frattaroli@collabora.com, vkoul@kernel.org,
krzk+dt@kernel.org, p.zabel@pengutronix.de,
alim.akhtar@samsung.com, matthias.bgg@gmail.com,
avri.altman@wdc.com, martin.petersen@oracle.com,
broonie@kernel.org
Cc: linux-scsi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-phy@lists.infradead.org, linux-mediatek@lists.infradead.org,
Louis-Alexis Eyraud, kernel@collabora.com
In-Reply-To: <1bbc263bafe14343b2d60a230ae6ce5dadffbf7c.camel@mediatek.com>
On 06/01/2026 14:25, Peter Wang (王信友) wrote:
> On Thu, 2025-12-18 at 13:55 +0100, Nicolas Frattaroli wrote:
>>
>> Both ufs_mtk_vreg_fix_vcc and ufs_mtk_vreg_fix_vccqx look like they
>> are
>> vendor kernel hacks to work around existing downstream device trees.
>> Mainline does not need or want them, so remove them.
>>
>
> Hi Nicolas,
>
> This is a flexible approach to implement one software supporting
> multiple
> hardware configurations. Because you cannot guarantee that your SOC
> will
We do not store dead code for your vendor, downstream kernel. We already
discussed it months ago where you were pushing same agenda.
Stop with this downstream approach and understand that your downstream
absolutely does not matter and does not exist for us.
> always use UFS 2.0 or UFS 3.0, or that the PMIC you use will only have
> one set.
>
> Thanks
> Peter
>
>
Best regards,
Krzysztof
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* [PATCH v5 24/24] scsi: ufs: mediatek: Add MT8196 compatible, update copyright
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
THe MT8196's UFS controller has a new compatible. Add the necessary
struct definitions to support it.
Also update the copyrights and authors, without tabs following spaces to
avoid checkpatch errors, to list myself as having contributed to this
driver after the preceding rework patches.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 0842522cda51..df712d432765 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1,9 +1,11 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 MediaTek Inc.
+ * Copyright (C) 2025 Collabora Ltd.
* Authors:
- * Stanley Chu <stanley.chu@mediatek.com>
- * Peter Wang <peter.wang@mediatek.com>
+ * Stanley Chu <stanley.chu@mediatek.com>
+ * Peter Wang <peter.wang@mediatek.com>
+ * Nicolas Frattaroli <nicolas.frattaroli@collabora.com> (Major cleanups)
*/
#include <linux/arm-smccc.h>
@@ -2219,6 +2221,10 @@ static const char *const ufs_mtk_regs_avdd12_ckbuf_avdd18[] = {
"avdd12", "avdd12-ckbuf", "avdd18"
};
+static const char *const ufs_mtk_regs_avdd12_ckbuf[] = {
+ "avdd12", "avdd12-ckbuf"
+};
+
static const struct ufs_mtk_soc_data mt8183_data = {
.has_avdd09 = true,
.reg_names = ufs_mtk_regs_avdd12_avdd18,
@@ -2231,10 +2237,17 @@ static const struct ufs_mtk_soc_data mt8192_8195_data = {
.num_reg_names = ARRAY_SIZE(ufs_mtk_regs_avdd12_ckbuf_avdd18),
};
+static const struct ufs_mtk_soc_data mt8196_data = {
+ .has_avdd09 = true,
+ .reg_names = ufs_mtk_regs_avdd12_ckbuf,
+ .num_reg_names = ARRAY_SIZE(ufs_mtk_regs_avdd12_ckbuf),
+};
+
static const struct of_device_id ufs_mtk_of_match[] = {
{ .compatible = "mediatek,mt8183-ufshci", .data = &mt8183_data },
{ .compatible = "mediatek,mt8192-ufshci", .data = &mt8192_8195_data },
{ .compatible = "mediatek,mt8195-ufshci", .data = &mt8192_8195_data },
+ { .compatible = "mediatek,mt8196-ufshci", .data = &mt8196_data },
{},
};
MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);
--
2.52.0
--
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* [PATCH v5 23/24] scsi: ufs: mediatek: Remove ret local from link_startup_notify
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
Remove the "ret" local variable from ufs_mtk_link_startup_notify, as
it's pointless; in all cases it is assigned, it is returned right after
without being read first.
Rework the code to just return directly, and get rid of the default
branch while at it.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 5cddbdb1db40..0842522cda51 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1500,21 +1500,15 @@ static void ufs_mtk_post_link(struct ufs_hba *hba)
static int ufs_mtk_link_startup_notify(struct ufs_hba *hba,
enum ufs_notify_change_status stage)
{
- int ret = 0;
-
switch (stage) {
case PRE_CHANGE:
- ret = ufs_mtk_pre_link(hba);
- break;
+ return ufs_mtk_pre_link(hba);
case POST_CHANGE:
ufs_mtk_post_link(hba);
- break;
- default:
- ret = -EINVAL;
- break;
+ return 0;
}
- return ret;
+ return -EINVAL;
}
static int ufs_mtk_device_reset(struct ufs_hba *hba)
--
2.52.0
--
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* [PATCH v5 22/24] scsi: ufs: mediatek: Back up idle timer in per-instance struct
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
The MediaTek UFS driver uses a function-scope static variable to back up
a hardware register across a power change in the
ufs_mtk_pwr_change_notify function. This is dangerous, as it's only
correct if only ever one instance of the driver is loaded, which isn't
true if there's more than one device on a SoC that needs it, or it
otherwise gets loaded a second time.
Back it up into a member of the host struct instead, as this struct is
per-instance. Rework the function to not use a pointless "ret" local as
well.
Fixes: f5ca8d0c7a63 ("scsi: ufs: host: mediatek: Disable auto-hibern8 during power mode changes")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 20 ++++++++------------
drivers/ufs/host/ufs-mediatek.h | 1 +
2 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index fbfa23abbb87..5cddbdb1db40 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1398,28 +1398,24 @@ static int ufs_mtk_pwr_change_notify(struct ufs_hba *hba,
const struct ufs_pa_layer_attr *dev_max_params,
struct ufs_pa_layer_attr *dev_req_params)
{
- int ret = 0;
- static u32 reg;
+ struct ufs_mtk_host *host = ufshcd_get_variant(hba);
switch (stage) {
case PRE_CHANGE:
if (ufshcd_is_auto_hibern8_supported(hba)) {
- reg = ufshcd_readl(hba, REG_AUTO_HIBERNATE_IDLE_TIMER);
+ host->hibernate_idle_timer = ufshcd_readl(
+ hba, REG_AUTO_HIBERNATE_IDLE_TIMER);
ufs_mtk_auto_hibern8_disable(hba);
}
- ret = ufs_mtk_pre_pwr_change(hba, dev_max_params,
- dev_req_params);
- break;
+ return ufs_mtk_pre_pwr_change(hba, dev_max_params, dev_req_params);
case POST_CHANGE:
if (ufshcd_is_auto_hibern8_supported(hba))
- ufshcd_writel(hba, reg, REG_AUTO_HIBERNATE_IDLE_TIMER);
- break;
- default:
- ret = -EINVAL;
- break;
+ ufshcd_writel(hba, host->hibernate_idle_timer,
+ REG_AUTO_HIBERNATE_IDLE_TIMER);
+ return 0;
}
- return ret;
+ return -EINVAL;
}
static int ufs_mtk_unipro_set_lpm(struct ufs_hba *hba, bool lpm)
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index fa27ab4d6d6c..e5a3f70e7024 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -187,6 +187,7 @@ struct ufs_mtk_host {
u16 ref_clk_gating_wait_us;
u32 ip_ver;
bool legacy_ip_ver;
+ u32 hibernate_idle_timer;
bool mcq_set_intr;
bool is_mcq_intr_enabled;
--
2.52.0
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* [PATCH v5 21/24] scsi: ufs: mediatek: Rework hardware version reading
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
Split assignment to the host struct out from the read function, and
utilise bitfield helpers to simplify the code. Also move the debug print
out of the legacy version helper, which means it no longer has to take a
struct ufs_hba as an input, and can be rewritten as a pure function.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 65 +++++++++++++++++++++--------------------
1 file changed, 33 insertions(+), 32 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 66bff5e623e9..fbfa23abbb87 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -797,50 +797,47 @@ static void ufs_mtk_mcq_set_irq_affinity(struct ufs_hba *hba, unsigned int cpu)
dev_dbg(hba->dev, "set irq %d affinity to CPU %d\n", irq, _cpu);
}
-static bool ufs_mtk_is_legacy_chipset(struct ufs_hba *hba, u32 hw_ip_ver)
+static bool __pure ufs_mtk_is_legacy_chipset(u32 hw_ip_ver)
{
- bool is_legacy = false;
-
switch (hw_ip_ver) {
case IP_LEGACY_VER_MT6893:
case IP_LEGACY_VER_MT6781:
/* can add other legacy chipset ID here accordingly */
- is_legacy = true;
- break;
- default:
- break;
+ return true;
}
- dev_dbg(hba->dev, "IP version 0x%x, legacy = %s", hw_ip_ver,
- str_true_false(is_legacy));
- return is_legacy;
+ return false;
}
-/*
- * HW version format has been changed from 01MMmmmm to 1MMMmmmm, since
- * project MT6878. In order to perform correct version comparison,
- * version number is changed by SW for the following projects.
- * IP_VER_MT6983 0x00360000 to 0x10360000
- * IP_VER_MT6897 0x01440000 to 0x10440000
- * IP_VER_MT6989 0x01450000 to 0x10450000
- * IP_VER_MT6991 0x01460000 to 0x10460000
+#define MTK_UFS_VER_PREFIX_M (0xFF << 24)
+
+/**
+ * ufs_mtk_get_hw_ip_version - read and return adjusted hardware version
+ * @hba: pointer to this device's &struct ufs_hba
+ *
+ * Reads, transforms and returns the hardware version.
+ *
+ * Since MT6878, the versioning scheme was changed from 01MMmmmm to 1MMMmmmm.
+ * In order to support version comparisons across these different versioning
+ * schemes, this function transforms the older style to the newer one.
+ *
+ * For example:
+ * MT6983 is transformed from 0x00360000 to 0x10360000
+ * MT6897 is transformed from 0x01440000 to 0x10440000
+ * MT6989 is transformed from 0x01450000 to 0x10450000
+ * MT6991 is transformed from 0x01460000 to 0x10460000
+ *
+ * Returns a u32 representing the hardware version.
*/
-static void ufs_mtk_get_hw_ip_version(struct ufs_hba *hba)
+static u32 ufs_mtk_get_hw_ip_version(struct ufs_hba *hba)
{
- struct ufs_mtk_host *host = ufshcd_get_variant(hba);
- u32 hw_ip_ver;
+ u32 version = ufshcd_readl(hba, REG_UFS_MTK_IP_VER);
+ u32 prefix = FIELD_GET(MTK_UFS_VER_PREFIX_M, version);
- hw_ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER);
+ if (prefix <= 1)
+ FIELD_MODIFY(MTK_UFS_VER_PREFIX_M, &version, BIT(28));
- if (((hw_ip_ver & (0xFF << 24)) == (0x1 << 24)) ||
- ((hw_ip_ver & (0xFF << 24)) == 0)) {
- hw_ip_ver &= ~(0xFF << 24);
- hw_ip_ver |= (0x1 << 28);
- }
-
- host->ip_ver = hw_ip_ver;
-
- host->legacy_ip_ver = ufs_mtk_is_legacy_chipset(hba, hw_ip_ver);
+ return version;
}
static void ufs_mtk_get_controller_version(struct ufs_hba *hba)
@@ -1191,7 +1188,11 @@ static int ufs_mtk_init(struct ufs_hba *hba)
ufs_mtk_setup_clocks(hba, true, POST_CHANGE);
- ufs_mtk_get_hw_ip_version(hba);
+ host->ip_ver = ufs_mtk_get_hw_ip_version(hba);
+ host->legacy_ip_ver = ufs_mtk_is_legacy_chipset(host->ip_ver);
+
+ dev_dbg(hba->dev, "IP version 0x%x, legacy = %s", host->ip_ver,
+ str_true_false(host->legacy_ip_ver));
return 0;
--
2.52.0
--
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* [PATCH v5 20/24] scsi: ufs: mediatek: Don't acquire dvfsrc-vcore twice
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
As part of its featureset, the ufs-mediatek driver needs to play with an
optional dvfsrc-vcore regulator for some of them.
However, it currently does this by acquiring two different references to
it in two different places, needlessly duplicating logic.
Move reg_vcore to the host struct, acquire it in the same function as
avdd09 is acquired, and rework the users of reg_vcore.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 73 +++++++++++++++++++----------------------
drivers/ufs/host/ufs-mediatek.h | 3 +-
2 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index f237070afaec..66bff5e623e9 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -519,15 +519,13 @@ static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct ufs_mtk_crypt_cfg *cfg;
- struct regulator *reg;
int volt, ret;
- if (!ufs_mtk_is_boost_crypt_enabled(hba))
+ if (!ufs_mtk_is_boost_crypt_enabled(hba) || !host->reg_vcore)
return;
cfg = host->crypt;
volt = cfg->vcore_volt;
- reg = cfg->reg_vcore;
ret = clk_prepare_enable(cfg->clk_crypt_mux);
if (ret) {
@@ -537,7 +535,7 @@ static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost)
}
if (boost) {
- ret = regulator_set_voltage(reg, volt, INT_MAX);
+ ret = regulator_set_voltage(host->reg_vcore, volt, INT_MAX);
if (ret) {
dev_err(hba->dev, "%s: Failed to set vcore to %d: %pe\n",
__func__, volt, ERR_PTR(ret));
@@ -548,7 +546,7 @@ static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost)
if (ret) {
dev_err(hba->dev, "%s: Failed to reparent clk_crypt_perf: %pe\n",
__func__, ERR_PTR(ret));
- regulator_set_voltage(reg, 0, INT_MAX);
+ regulator_set_voltage(host->reg_vcore, 0, INT_MAX);
goto out;
}
} else {
@@ -559,7 +557,7 @@ static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost)
goto out;
}
- ret = regulator_set_voltage(reg, 0, INT_MAX);
+ ret = regulator_set_voltage(host->reg_vcore, 0, INT_MAX);
if (ret) {
dev_err(hba->dev, "%s: Failed to set vcore to minimum: %pe\n",
__func__, ERR_PTR(ret));
@@ -576,15 +574,12 @@ static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
struct device *dev = hba->dev;
int ret;
- cfg = devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL);
- if (!cfg)
+ if (!host->reg_vcore)
return;
- cfg->reg_vcore = devm_regulator_get_optional(dev, "dvfsrc-vcore");
- if (IS_ERR(cfg->reg_vcore)) {
- dev_err(dev, "Failed to get dvfsrc-vcore: %pe", cfg->reg_vcore);
+ cfg = devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL);
+ if (!cfg)
return;
- }
ret = of_property_read_u32(dev->of_node, "mediatek,boost-crypt-vcore-min",
&cfg->vcore_volt);
@@ -889,7 +884,6 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
struct list_head *head = &hba->clk_list_head;
struct ufs_clk_info *clki, *clki_tmp;
struct device *dev = hba->dev;
- struct regulator *reg;
u32 volt;
/*
@@ -930,16 +924,8 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
return;
}
- /*
- * Default get vcore if dts have these settings.
- * No matter clock scaling support or not. (may disable by customer)
- */
- reg = devm_regulator_get_optional(dev, "dvfsrc-vcore");
- if (IS_ERR(reg)) {
- if (PTR_ERR(reg) != -ENODEV)
- dev_err(dev, "Failed to get dvfsrc-vcore: %pe\n", reg);
+ if (!host->reg_vcore)
return;
- }
if (of_property_read_u32(dev->of_node, "mediatek,clk-scale-up-vcore-min",
&volt)) {
@@ -947,12 +933,11 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
return;
}
- host->mclk.reg_vcore = reg;
host->mclk.vcore_volt = volt;
/* If default boot is max gear, request vcore */
- if (reg && volt && host->clk_scale_up)
- if (regulator_set_voltage(reg, volt, INT_MAX))
+ if (volt && host->clk_scale_up)
+ if (regulator_set_voltage(host->reg_vcore, volt, INT_MAX))
dev_err(hba->dev, "Failed to set vcore to %d\n", volt);
}
@@ -1064,6 +1049,17 @@ static int ufs_mtk_get_supplies(struct ufs_mtk_host *host)
const struct ufs_mtk_soc_data *data = of_device_get_match_data(dev);
int ret;
+ host->reg_vcore = devm_regulator_get_optional(dev, "dvfsrc-vcore");
+ if (IS_ERR(host->reg_vcore)) {
+ if (PTR_ERR(host->reg_vcore) != -ENODEV) {
+ dev_err(dev, "Failed to get dvfsrc-vcore supply: %pe\n",
+ host->reg_vcore);
+ return PTR_ERR(host->reg_vcore);
+ }
+
+ host->reg_vcore = NULL;
+ }
+
if (!data)
return 0;
@@ -1081,14 +1077,13 @@ static int ufs_mtk_get_supplies(struct ufs_mtk_host *host)
host->reg_avdd09 = devm_regulator_get_optional(dev, "avdd09");
if (IS_ERR(host->reg_avdd09)) {
- if (PTR_ERR(host->reg_avdd09) == -ENODEV) {
- host->reg_avdd09 = NULL;
- return 0;
+ if (PTR_ERR(host->reg_avdd09) != -ENODEV) {
+ dev_err(dev, "Failed to get avdd09 regulator: %pe\n",
+ host->reg_avdd09);
+ return PTR_ERR(host->reg_avdd09);
}
- dev_err(dev, "Failed to get avdd09 regulator: %pe\n",
- host->reg_avdd09);
- return PTR_ERR(host->reg_avdd09);
+ host->reg_avdd09 = NULL;
}
return 0;
@@ -1119,6 +1114,10 @@ static int ufs_mtk_init(struct ufs_hba *hba)
host->hba = hba;
ufshcd_set_variant(hba, host);
+ err = ufs_mtk_get_supplies(host);
+ if (err)
+ goto out_variant_clear;
+
/* Initialize host capability */
ufs_mtk_init_host_caps(hba);
@@ -1173,10 +1172,6 @@ static int ufs_mtk_init(struct ufs_hba *hba)
ufs_mtk_init_clocks(hba);
- err = ufs_mtk_get_supplies(host);
- if (err)
- goto out_phy_exit;
-
/*
* ufshcd_vops_init() is invoked after
* ufshcd_setup_clock(true) in ufshcd_hba_init() thus
@@ -1916,7 +1911,6 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up)
struct ufs_mtk_clk *mclk = &host->mclk;
struct ufs_clk_info *clki = mclk->ufs_sel_clki;
struct ufs_clk_info *fde_clki = mclk->ufs_fde_clki;
- struct regulator *reg;
int volt, ret = 0;
bool clk_bind_vcore = false;
bool clk_fde_scale = false;
@@ -1927,9 +1921,8 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up)
if (!clki || !fde_clki)
return;
- reg = host->mclk.reg_vcore;
volt = host->mclk.vcore_volt;
- if (reg && volt != 0)
+ if (host->reg_vcore && volt)
clk_bind_vcore = true;
if (mclk->ufs_fde_max_clki && mclk->ufs_fde_min_clki)
@@ -1953,7 +1946,7 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up)
if (scale_up) {
if (clk_bind_vcore) {
- ret = regulator_set_voltage(reg, volt, INT_MAX);
+ ret = regulator_set_voltage(host->reg_vcore, volt, INT_MAX);
if (ret) {
dev_err(hba->dev, "Failed to set vcore to %d\n", volt);
goto out;
@@ -1993,7 +1986,7 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up)
}
if (clk_bind_vcore) {
- ret = regulator_set_voltage(reg, 0, INT_MAX);
+ ret = regulator_set_voltage(host->reg_vcore, 0, INT_MAX);
if (ret) {
dev_err(hba->dev, "%s: Failed to set vcore to minimum: %pe\n",
__func__, ERR_PTR(ret));
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 9c377745f7a0..fa27ab4d6d6c 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -141,7 +141,6 @@ enum ufs_mtk_host_caps {
};
struct ufs_mtk_crypt_cfg {
- struct regulator *reg_vcore;
struct clk *clk_crypt_perf;
struct clk *clk_crypt_mux;
struct clk *clk_crypt_lp;
@@ -155,7 +154,6 @@ struct ufs_mtk_clk {
struct ufs_clk_info *ufs_fde_clki; /* Mux */
struct ufs_clk_info *ufs_fde_max_clki; /* Max src */
struct ufs_clk_info *ufs_fde_min_clki; /* Min src */
- struct regulator *reg_vcore;
int vcore_volt;
};
@@ -174,6 +172,7 @@ struct ufs_mtk_mcq_intr_info {
struct ufs_mtk_host {
struct phy *mphy;
struct regulator *reg_avdd09;
+ struct regulator *reg_vcore;
struct reset_control_bulk_data resets[MTK_UFS_NUM_RESETS];
struct ufs_hba *hba;
struct ufs_mtk_crypt_cfg *crypt;
--
2.52.0
--
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^ permalink raw reply related
* [PATCH v5 19/24] scsi: ufs: mediatek: Rework ufs_mtk_wait_idle_state
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
While ufs_mtk_wait_idle state has some code smells for me (the
VS_HCE_BASE early exit seems racey at best), it can still benefit from
some general cleanup to make the code flow less convoluted.
Use the iopoll helpers, for one, and specifically the one that sleeps
and does not busy delay, as it's being done for up to 5ms.
The register read is split out to a helper function that branches
between new and old style flow.
Every called uses the same 5ms timeout value, so there is no point in
making this a parameter. Just assume a 5ms timeout in the function.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 71 +++++++++++++++++------------------------
1 file changed, 30 insertions(+), 41 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 566d61ff9faf..f237070afaec 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -10,6 +10,7 @@
#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
+#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -380,51 +381,39 @@ static void ufs_mtk_dbg_sel(struct ufs_hba *hba)
}
}
-static int ufs_mtk_wait_idle_state(struct ufs_hba *hba,
- unsigned long retry_ms)
+static u32 ufs_mtk_read_state(struct ufs_hba *hba, bool old_style)
{
- u64 timeout, time_checked;
- u32 val, sm;
- bool wait_idle;
- struct ufs_mtk_host *host = ufshcd_get_variant(hba);
-
- /* cannot use plain ktime_get() in suspend */
- timeout = ktime_get_mono_fast_ns() + retry_ms * 1000000UL;
-
- /* wait a specific time after check base */
- udelay(10);
- wait_idle = false;
+ u32 val;
- do {
- time_checked = ktime_get_mono_fast_ns();
- if (host->legacy_ip_ver || host->ip_ver < IP_VER_MT6899) {
- ufs_mtk_dbg_sel(hba);
- val = ufshcd_readl(hba, REG_UFS_PROBE);
- } else {
- val = ufshcd_readl(hba, REG_UFS_UFS_MMIO_OTSD_CTRL);
- val = val >> 16;
- }
+ if (old_style) {
+ ufs_mtk_dbg_sel(hba);
+ val = ufshcd_readl(hba, REG_UFS_PROBE);
+ } else {
+ val = ufshcd_readl(hba, REG_UFS_UFS_MMIO_OTSD_CTRL) >> 16;
+ }
- sm = val & 0x1f;
+ return FIELD_GET(0x1f, val);
+}
- /*
- * if state is in H8 enter and H8 enter confirm
- * wait until return to idle state.
- */
- if ((sm >= VS_HIB_ENTER) && (sm <= VS_HIB_EXIT)) {
- wait_idle = true;
- udelay(50);
- continue;
- } else if (!wait_idle)
- break;
+static int ufs_mtk_wait_idle_state(struct ufs_hba *hba)
+{
+ struct ufs_mtk_host *host = ufshcd_get_variant(hba);
+ bool old_style = (host->legacy_ip_ver || host->ip_ver < IP_VER_MT6899);
+ u32 val;
+ int ret;
- if (wait_idle && (sm == VS_HCE_BASE))
- break;
- } while (time_checked < timeout);
+ /* If the device is already in the base state after 10us, don't wait. */
+ udelay(10);
+ if (ufs_mtk_read_state(hba, old_style) == VS_HCE_BASE)
+ return 0;
- if (wait_idle && sm != VS_HCE_BASE) {
- dev_info(hba->dev, "wait idle tmo: 0x%x\n", val);
- return -ETIMEDOUT;
+ /* Poll to wait for idle */
+ ret = read_poll_timeout(ufs_mtk_read_state, val,
+ (val < VS_HIB_ENTER || val > VS_HIB_EXIT), 50,
+ 5 * USEC_PER_MSEC, false, hba, old_style);
+ if (ret) {
+ dev_err(hba->dev, "Timed out waiting for idle state, val = 0x%x\n", val);
+ return ret;
}
return 0;
@@ -1389,7 +1378,7 @@ static int ufs_mtk_auto_hibern8_disable(struct ufs_hba *hba)
ufshcd_writel(hba, 0, REG_AUTO_HIBERNATE_IDLE_TIMER);
/* wait host return to idle state when auto-hibern8 off */
- ret = ufs_mtk_wait_idle_state(hba, 5);
+ ret = ufs_mtk_wait_idle_state(hba);
if (ret)
goto out;
@@ -1593,7 +1582,7 @@ static int ufs_mtk_link_set_hpm(struct ufs_hba *hba)
return err;
/* Check link state to make sure exit h8 success */
- err = ufs_mtk_wait_idle_state(hba, 5);
+ err = ufs_mtk_wait_idle_state(hba);
if (err) {
dev_err(hba->dev, "Failed to wait for idle: %pe\n", ERR_PTR(err));
return err;
--
2.52.0
--
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^ permalink raw reply related
* [PATCH v5 18/24] scsi: ufs: mediatek: Clean up logging prints
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
The Linux kernel's log buffer provides many levels of verbosity,
associated with different semantic meanings. Care should be taken to
only log useful information to the info level, and log errors to the
error level.
The MediaTek UFS driver does not do this. It freely logs verbose debug
information to the info level, errors to the info level, and sometimes
errors to the warning level.
Adjust all the wrapped kprintf invocations to rectify this situation.
Use user-friendly %pe format codes for printing errors where possible.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 99 ++++++++++++++++++-----------------------
1 file changed, 43 insertions(+), 56 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 2b7def2cde54..566d61ff9faf 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -192,8 +192,8 @@ static void ufs_mtk_crypto_enable(struct ufs_hba *hba)
ufs_mtk_crypto_ctrl(res, 1);
if (res.a0) {
- dev_info(hba->dev, "%s: crypto enable failed, err: %lu\n",
- __func__, res.a0);
+ dev_err(hba->dev, "%s: crypto enable failed with error %lu, disabling\n",
+ __func__, res.a0);
hba->caps &= ~UFSHCD_CAP_CRYPTO;
}
}
@@ -542,40 +542,38 @@ static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost)
ret = clk_prepare_enable(cfg->clk_crypt_mux);
if (ret) {
- dev_info(hba->dev, "clk_prepare_enable(): %d\n",
- ret);
+ dev_err(hba->dev, "%s: Failed to enable clk_crypt_mux: %pe\n",
+ __func__, ERR_PTR(ret));
return;
}
if (boost) {
ret = regulator_set_voltage(reg, volt, INT_MAX);
if (ret) {
- dev_info(hba->dev,
- "failed to set vcore to %d\n", volt);
+ dev_err(hba->dev, "%s: Failed to set vcore to %d: %pe\n",
+ __func__, volt, ERR_PTR(ret));
goto out;
}
- ret = clk_set_parent(cfg->clk_crypt_mux,
- cfg->clk_crypt_perf);
+ ret = clk_set_parent(cfg->clk_crypt_mux, cfg->clk_crypt_perf);
if (ret) {
- dev_info(hba->dev,
- "failed to set clk_crypt_perf\n");
+ dev_err(hba->dev, "%s: Failed to reparent clk_crypt_perf: %pe\n",
+ __func__, ERR_PTR(ret));
regulator_set_voltage(reg, 0, INT_MAX);
goto out;
}
} else {
- ret = clk_set_parent(cfg->clk_crypt_mux,
- cfg->clk_crypt_lp);
+ ret = clk_set_parent(cfg->clk_crypt_mux, cfg->clk_crypt_lp);
if (ret) {
- dev_info(hba->dev,
- "failed to set clk_crypt_lp\n");
+ dev_err(hba->dev, "%s: Failed to reparent clk_crypt_lp: %pe\n",
+ __func__, ERR_PTR(ret));
goto out;
}
ret = regulator_set_voltage(reg, 0, INT_MAX);
if (ret) {
- dev_info(hba->dev,
- "failed to set vcore to MIN\n");
+ dev_err(hba->dev, "%s: Failed to set vcore to minimum: %pe\n",
+ __func__, ERR_PTR(ret));
}
}
out:
@@ -763,10 +761,8 @@ static int ufs_mtk_setup_clocks(struct ufs_hba *hba, bool on,
if (clk_pwr_off) {
ufs_mtk_pwr_ctrl(hba, false);
} else {
- dev_warn(hba->dev, "Clock is not turned off, hba->ahit = 0x%x, AHIT = 0x%x\n",
- hba->ahit,
- ufshcd_readl(hba,
- REG_AUTO_HIBERNATE_IDLE_TIMER));
+ dev_warn(hba->dev, "Clock isn't off, hba->ahit = 0x%x, AHIT = 0x%x\n",
+ hba->ahit, ufshcd_readl(hba, REG_AUTO_HIBERNATE_IDLE_TIMER));
}
ufs_mtk_mcq_disable_irq(hba);
} else if (on && status == POST_CHANGE) {
@@ -810,11 +806,11 @@ static void ufs_mtk_mcq_set_irq_affinity(struct ufs_hba *hba, unsigned int cpu)
_cpu = (cpu == 0) ? 3 : cpu;
ret = irq_set_affinity(irq, cpumask_of(_cpu));
if (ret) {
- dev_err(hba->dev, "set irq %d affinity to CPU %d failed\n",
+ dev_err(hba->dev, "setting irq %d affinity to CPU %d failed\n",
irq, _cpu);
return;
}
- dev_info(hba->dev, "set irq %d affinity to CPU: %d\n", irq, _cpu);
+ dev_dbg(hba->dev, "set irq %d affinity to CPU %d\n", irq, _cpu);
}
static bool ufs_mtk_is_legacy_chipset(struct ufs_hba *hba, u32 hw_ip_ver)
@@ -830,7 +826,8 @@ static bool ufs_mtk_is_legacy_chipset(struct ufs_hba *hba, u32 hw_ip_ver)
default:
break;
}
- dev_info(hba->dev, "legacy IP version - 0x%x, is legacy : %d", hw_ip_ver, is_legacy);
+ dev_dbg(hba->dev, "IP version 0x%x, legacy = %s", hw_ip_ver,
+ str_true_false(is_legacy));
return is_legacy;
}
@@ -935,15 +932,12 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
}
}
- list_for_each_entry(clki, head, list) {
- dev_info(hba->dev, "clk \"%s\" present", clki->name);
- }
+ list_for_each_entry(clki, head, list)
+ dev_dbg(hba->dev, "clk \"%s\" present", clki->name);
if (!ufs_mtk_is_clk_scale_ready(hba)) {
hba->caps &= ~UFSHCD_CAP_CLK_SCALING;
- dev_info(hba->dev,
- "%s: Clk-scaling not ready. Feature disabled.",
- __func__);
+ dev_info(hba->dev, "%s: Clock scaling unavailable", __func__);
return;
}
@@ -953,8 +947,8 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
*/
reg = devm_regulator_get_optional(dev, "dvfsrc-vcore");
if (IS_ERR(reg)) {
- dev_info(dev, "failed to get dvfsrc-vcore: %ld",
- PTR_ERR(reg));
+ if (PTR_ERR(reg) != -ENODEV)
+ dev_err(dev, "Failed to get dvfsrc-vcore: %pe\n", reg);
return;
}
@@ -968,12 +962,9 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
host->mclk.vcore_volt = volt;
/* If default boot is max gear, request vcore */
- if (reg && volt && host->clk_scale_up) {
- if (regulator_set_voltage(reg, volt, INT_MAX)) {
- dev_info(hba->dev,
- "Failed to set vcore to %d\n", volt);
- }
- }
+ if (reg && volt && host->clk_scale_up)
+ if (regulator_set_voltage(reg, volt, INT_MAX))
+ dev_err(hba->dev, "Failed to set vcore to %d\n", volt);
}
static void ufs_mtk_setup_clk_gating(struct ufs_hba *hba)
@@ -1060,7 +1051,7 @@ static void ufs_mtk_init_mcq_irq(struct ufs_hba *hba)
}
host->mcq_intr_info[i].hba = hba;
host->mcq_intr_info[i].irq = irq;
- dev_info(hba->dev, "get platform mcq irq: %d, %d\n", i, irq);
+ dev_dbg(hba->dev, "get platform mcq irq: %d, %d\n", i, irq);
}
return;
@@ -1307,10 +1298,8 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
host_params.desired_working_mode = UFS_PWM_MODE;
ret = ufshcd_negotiate_pwr_params(&host_params, dev_max_params, dev_req_params);
- if (ret) {
- pr_info("%s: failed to determine capabilities\n",
- __func__);
- }
+ if (ret)
+ dev_warn(hba->dev, "%s: failed to determine capabilities\n", __func__);
if (ufs_mtk_pmc_via_fastauto(hba, dev_req_params)) {
ufs_mtk_adjust_sync_length(hba);
@@ -1356,10 +1345,9 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
ret = ufshcd_uic_change_pwr_mode(hba,
FASTAUTO_MODE << 4 | FASTAUTO_MODE);
- if (ret) {
- dev_err(hba->dev, "%s: HSG1B FASTAUTO failed ret=%d\n",
- __func__, ret);
- }
+ if (ret)
+ dev_err(hba->dev, "%s: HSG1B FASTAUTO failed: %pe\n",
+ __func__, ERR_PTR(ret));
}
/* if already configured to the requested pwr_mode, skip adapt */
@@ -1409,7 +1397,7 @@ static int ufs_mtk_auto_hibern8_disable(struct ufs_hba *hba)
out:
if (ret) {
- dev_warn(hba->dev, "exit h8 state fail, ret=%d\n", ret);
+ dev_err(hba->dev, "Failed to exit h8 state: %pe\n", ERR_PTR(ret));
ufshcd_force_error_recovery(hba);
@@ -1571,7 +1559,7 @@ static int ufs_mtk_device_reset(struct ufs_hba *hba)
/* Some devices may need time to respond to rst_n */
usleep_range(10000, 15000);
- dev_info(hba->dev, "device reset done\n");
+ dev_dbg(hba->dev, "device reset done\n");
return 0;
}
@@ -1607,12 +1595,12 @@ static int ufs_mtk_link_set_hpm(struct ufs_hba *hba)
/* Check link state to make sure exit h8 success */
err = ufs_mtk_wait_idle_state(hba, 5);
if (err) {
- dev_warn(hba->dev, "wait idle fail, err=%d\n", err);
+ dev_err(hba->dev, "Failed to wait for idle: %pe\n", ERR_PTR(err));
return err;
}
err = ufs_mtk_wait_link_state(hba, VS_LINK_UP, 100);
if (err) {
- dev_warn(hba->dev, "exit h8 state fail, err=%d\n", err);
+ dev_err(hba->dev, "Failed to wait for link to be up: %pe\n", ERR_PTR(err));
return err;
}
ufshcd_set_link_active(hba);
@@ -1905,20 +1893,19 @@ static void ufs_mtk_event_notify(struct ufs_hba *hba,
/* Print details of UIC Errors */
if (evt <= UFS_EVT_DME_ERR) {
- dev_info(hba->dev,
- "Host UIC Error Code (%s): %08x\n",
- ufs_uic_err_str[evt], val);
+ dev_err(hba->dev, "Host UIC Error Code (%s): %08x\n",
+ ufs_uic_err_str[evt], val);
reg = val;
}
if (evt == UFS_EVT_PA_ERR) {
for_each_set_bit(bit, ®, ARRAY_SIZE(ufs_uic_pa_err_str))
- dev_info(hba->dev, "%s\n", ufs_uic_pa_err_str[bit]);
+ dev_err(hba->dev, "%s\n", ufs_uic_pa_err_str[bit]);
}
if (evt == UFS_EVT_DL_ERR) {
for_each_set_bit(bit, ®, ARRAY_SIZE(ufs_uic_dl_err_str))
- dev_info(hba->dev, "%s\n", ufs_uic_dl_err_str[bit]);
+ dev_err(hba->dev, "%s\n", ufs_uic_dl_err_str[bit]);
}
}
@@ -2123,7 +2110,7 @@ static int ufs_mtk_mcq_config_resource(struct ufs_hba *hba)
/* fail mcq initialization if interrupt is not filled properly */
if (!host->mcq_nr_intr) {
- dev_info(hba->dev, "IRQs not ready. MCQ disabled.");
+ dev_err(hba->dev, "IRQs not ready. MCQ disabled.");
return -EINVAL;
}
--
2.52.0
--
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^ permalink raw reply related
* [PATCH v5 17/24] scsi: ufs: mediatek: Add vendor prefix to clk-scale-up-vcore-min
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
Device Tree properties other than the standard properties must be
prefixed with the vendor's name. The "clk-scale-up-vcore-min" property,
which this driver uses, and the binding did not previously document,
lacked a vendor prefix.
Add the missing "mediatek," vendor prefix and clean up the error print.
No judgements are made regarding the use the property itself, it may
turn out to be implementing something that it should do through a
different way (e.g. OPPs).
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index ecf16e82a326..2b7def2cde54 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -958,9 +958,9 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
return;
}
- if (of_property_read_u32(dev->of_node, "clk-scale-up-vcore-min",
+ if (of_property_read_u32(dev->of_node, "mediatek,clk-scale-up-vcore-min",
&volt)) {
- dev_info(dev, "failed to get clk-scale-up-vcore-min");
+ dev_err(dev, "Failed to get mediatek,clk-scale-up-vcore-min\n");
return;
}
--
2.52.0
--
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^ permalink raw reply related
* [PATCH v5 16/24] scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
Errors should be printed at the correct log level. Additionally, it
looks like some "goto out"'s were omitted in the scale up case, which
looks like a mistake, as the scale down branch of the code does use
them.
Rework the error messages to make them nicer and at the correct
verbosity, and add the missing gotos.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 41 +++++++++++++++++++----------------------
1 file changed, 19 insertions(+), 22 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 424533538b90..ecf16e82a326 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1961,16 +1961,16 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up)
ret = clk_prepare_enable(clki->clk);
if (ret) {
- dev_info(hba->dev,
- "clk_prepare_enable() fail, ret: %d\n", ret);
+ dev_err(hba->dev, "%s: Failed to enable clock: %pe\n", __func__, ERR_PTR(ret));
return;
}
if (clk_fde_scale) {
ret = clk_prepare_enable(fde_clki->clk);
if (ret) {
- dev_info(hba->dev,
- "fde clk_prepare_enable() fail, ret: %d\n", ret);
+ dev_err(hba->dev, "%s: Failed to enable FDE clock: %pe\n",
+ __func__, ERR_PTR(ret));
+ clk_disable_unprepare(clki->clk);
return;
}
}
@@ -1979,51 +1979,48 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up)
if (clk_bind_vcore) {
ret = regulator_set_voltage(reg, volt, INT_MAX);
if (ret) {
- dev_info(hba->dev,
- "Failed to set vcore to %d\n", volt);
+ dev_err(hba->dev, "Failed to set vcore to %d\n", volt);
goto out;
}
}
ret = clk_set_parent(clki->clk, mclk->ufs_sel_max_clki->clk);
if (ret) {
- dev_info(hba->dev, "Failed to set clk mux, ret = %d\n",
- ret);
+ dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n",
+ __func__, ERR_PTR(ret));
+ goto out;
}
if (clk_fde_scale) {
- ret = clk_set_parent(fde_clki->clk,
- mclk->ufs_fde_max_clki->clk);
+ ret = clk_set_parent(fde_clki->clk, mclk->ufs_fde_max_clki->clk);
if (ret) {
- dev_info(hba->dev,
- "Failed to set fde clk mux, ret = %d\n",
- ret);
+ dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n",
+ __func__, ERR_PTR(ret));
+ goto out;
}
}
} else {
if (clk_fde_scale) {
- ret = clk_set_parent(fde_clki->clk,
- mclk->ufs_fde_min_clki->clk);
+ ret = clk_set_parent(fde_clki->clk, mclk->ufs_fde_min_clki->clk);
if (ret) {
- dev_info(hba->dev,
- "Failed to set fde clk mux, ret = %d\n",
- ret);
+ dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n",
+ __func__, ERR_PTR(ret));
goto out;
}
}
ret = clk_set_parent(clki->clk, mclk->ufs_sel_min_clki->clk);
if (ret) {
- dev_info(hba->dev, "Failed to set clk mux, ret = %d\n",
- ret);
+ dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n",
+ __func__, ERR_PTR(ret));
goto out;
}
if (clk_bind_vcore) {
ret = regulator_set_voltage(reg, 0, INT_MAX);
if (ret) {
- dev_info(hba->dev,
- "failed to set vcore to MIN\n");
+ dev_err(hba->dev, "%s: Failed to set vcore to minimum: %pe\n",
+ __func__, ERR_PTR(ret));
}
}
}
--
2.52.0
--
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^ permalink raw reply related
* [PATCH v5 15/24] scsi: ufs: mediatek: Remove mediatek,ufs-broken-rtc property
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
This flag property was never described in the binding, and its
capability wrapper seems pointless.
If one of the MediaTek SoCs needs the ufshcd quirk applied, then this
can be done per-compatible, without needing to give the device tree
author the option to forget to set it.
Remove it and the associated capability flag wrapping code.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 5 -----
drivers/ufs/host/ufs-mediatek.h | 2 --
2 files changed, 7 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 230e11533eac..424533538b90 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -655,9 +655,6 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
if (of_property_read_bool(np, "mediatek,ufs-rtff-mtcmos"))
host->caps |= UFS_MTK_CAP_RTFF_MTCMOS;
- if (of_property_read_bool(np, "mediatek,ufs-broken-rtc"))
- host->caps |= UFS_MTK_CAP_MCQ_BROKEN_RTC;
-
dev_info(hba->dev, "caps: 0x%x", host->caps);
}
@@ -1185,8 +1182,6 @@ static int ufs_mtk_init(struct ufs_hba *hba)
hba->quirks |= UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL;
hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_INTR;
- if (host->caps & UFS_MTK_CAP_MCQ_BROKEN_RTC)
- hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_RTC;
hba->vps->wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(80);
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 4e6a34f4ac39..9c377745f7a0 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -138,8 +138,6 @@ enum ufs_mtk_host_caps {
UFS_MTK_CAP_DISABLE_MCQ = 1 << 8,
/* Control MTCMOS with RTFF */
UFS_MTK_CAP_RTFF_MTCMOS = 1 << 9,
-
- UFS_MTK_CAP_MCQ_BROKEN_RTC = 1 << 10,
};
struct ufs_mtk_crypt_cfg {
--
2.52.0
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^ permalink raw reply related
* [PATCH v5 14/24] scsi: ufs: mediatek: Switch to newer PM ops helpers
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
SET_SYSTEM_SLEEP_PM_OPS and SET_RUNTIME_PM_OPS are deprecated.
Switch to the non-deprecated variants, and pm_ptr, removing the
ifdeffery in the process. This allows the compiler visibility into those
functions.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 3250c27cb91f..230e11533eac 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -2325,7 +2325,6 @@ static void ufs_mtk_remove(struct platform_device *pdev)
ufshcd_pltfrm_remove(pdev);
}
-#ifdef CONFIG_PM_SLEEP
static int ufs_mtk_system_suspend(struct device *dev)
{
struct ufs_hba *hba = dev_get_drvdata(dev);
@@ -2372,9 +2371,7 @@ static int ufs_mtk_system_resume(struct device *dev)
return ret;
}
-#endif
-#ifdef CONFIG_PM
static int ufs_mtk_runtime_suspend(struct device *dev)
{
struct ufs_hba *hba = dev_get_drvdata(dev);
@@ -2418,13 +2415,10 @@ static int ufs_mtk_runtime_resume(struct device *dev)
return ufshcd_runtime_resume(dev);
}
-#endif
static const struct dev_pm_ops ufs_mtk_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OPS(ufs_mtk_system_suspend,
- ufs_mtk_system_resume)
- SET_RUNTIME_PM_OPS(ufs_mtk_runtime_suspend,
- ufs_mtk_runtime_resume, NULL)
+ SYSTEM_SLEEP_PM_OPS(ufs_mtk_system_suspend, ufs_mtk_system_resume)
+ RUNTIME_PM_OPS(ufs_mtk_runtime_suspend, ufs_mtk_runtime_resume, NULL)
.prepare = ufshcd_suspend_prepare,
.complete = ufshcd_resume_complete,
};
@@ -2434,7 +2428,7 @@ static struct platform_driver ufs_mtk_pltform = {
.remove = ufs_mtk_remove,
.driver = {
.name = "ufshcd-mtk",
- .pm = &ufs_mtk_pm_ops,
+ .pm = pm_ptr(&ufs_mtk_pm_ops),
.of_match_table = ufs_mtk_of_match,
},
};
--
2.52.0
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* [PATCH v5 13/24] scsi: ufs: mediatek: Use the common PHY framework
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
There is no need to reinvent the PHY framework, especially not its OF
parsing.
Change the code to simply use the PHY framework to acquire the device's
PHY in the ufshcd init, so that it's device linked to the right device.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 133 ++++++++++++----------------------------
drivers/ufs/host/ufs-mediatek.h | 1 -
2 files changed, 40 insertions(+), 94 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 45e088f6e92e..3250c27cb91f 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -293,44 +293,6 @@ static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
return 0;
}
-static int ufs_mtk_bind_mphy(struct ufs_hba *hba)
-{
- struct ufs_mtk_host *host = ufshcd_get_variant(hba);
- struct device *dev = hba->dev;
- struct device_node *np = dev->of_node;
- int err = 0;
-
- host->mphy = devm_of_phy_get_by_index(dev, np, 0);
-
- if (host->mphy == ERR_PTR(-EPROBE_DEFER)) {
- /*
- * UFS driver might be probed before the phy driver does.
- * In that case we would like to return EPROBE_DEFER code.
- */
- err = -EPROBE_DEFER;
- dev_info(dev,
- "%s: required phy hasn't probed yet. err = %d\n",
- __func__, err);
- } else if (IS_ERR(host->mphy)) {
- err = PTR_ERR(host->mphy);
- if (err != -ENODEV) {
- dev_info(dev, "%s: PHY get failed %d\n", __func__,
- err);
- }
- }
-
- if (err)
- host->mphy = NULL;
- /*
- * Allow unbound mphy because not every platform needs specific
- * mphy control.
- */
- if (err == -ENODEV)
- err = 0;
-
- return err;
-}
-
static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@@ -1185,13 +1147,21 @@ static int ufs_mtk_init(struct ufs_hba *hba)
ufs_mtk_init_mcq_irq(hba);
- err = ufs_mtk_bind_mphy(hba);
- if (err)
+ host->mphy = devm_phy_get(dev, NULL);
+ if (IS_ERR(host->mphy)) {
+ err = dev_err_probe(dev, PTR_ERR(host->mphy), "Failed to get PHY\n");
+ goto out_variant_clear;
+ }
+
+ err = phy_init(host->mphy);
+ if (err) {
+ dev_err_probe(dev, err, "Failed to initialize PHY\n");
goto out_variant_clear;
+ }
err = ufs_mtk_init_reset(hba);
if (err)
- goto out_variant_clear;
+ goto out_phy_exit;
/* Enable runtime autosuspend */
hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND;
@@ -1230,7 +1200,7 @@ static int ufs_mtk_init(struct ufs_hba *hba)
err = ufs_mtk_get_supplies(host);
if (err)
- goto out_variant_clear;
+ goto out_phy_exit;
/*
* ufshcd_vops_init() is invoked after
@@ -1255,11 +1225,22 @@ static int ufs_mtk_init(struct ufs_hba *hba)
return 0;
+out_phy_exit:
+ phy_exit(host->mphy);
out_variant_clear:
ufshcd_set_variant(hba, NULL);
return err;
}
+static void ufs_mtk_exit(struct ufs_hba *hba)
+{
+ struct ufs_mtk_host *host = ufshcd_get_variant(hba);
+
+ ufs_mtk_mphy_power_on(hba, false);
+
+ phy_exit(host->mphy);
+}
+
static bool ufs_mtk_pmc_via_fastauto(struct ufs_hba *hba,
struct ufs_pa_layer_attr *dev_req_params)
{
@@ -2255,6 +2236,7 @@ static const struct ufs_hba_variant_ops ufs_hba_mtk_vops = {
.name = "mediatek.ufshci",
.max_num_rtt = MTK_MAX_NUM_RTT,
.init = ufs_mtk_init,
+ .exit = ufs_mtk_exit,
.get_ufs_hci_version = ufs_mtk_get_ufs_hci_version,
.setup_clocks = ufs_mtk_setup_clocks,
.hce_enable_notify = ufs_mtk_hce_enable_notify,
@@ -2313,50 +2295,17 @@ MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);
*/
static int ufs_mtk_probe(struct platform_device *pdev)
{
- struct platform_device *phy_pdev;
struct device *dev = &pdev->dev;
- struct device_node *phy_node;
- struct ufs_mtk_host *host;
- struct device *phy_dev;
struct ufs_hba *hba;
- int err;
-
- /* find phy node */
- phy_node = of_parse_phandle(dev->of_node, "phys", 0);
- if (!phy_node)
- return dev_err_probe(dev, -ENOENT, "No PHY node found\n");
-
- phy_pdev = of_find_device_by_node(phy_node);
- of_node_put(phy_node);
- if (!phy_pdev)
- return dev_err_probe(dev, -ENODEV, "No PHY device found\n");
-
- phy_dev = &phy_pdev->dev;
-
- err = pm_runtime_set_active(phy_dev);
- if (err) {
- dev_err_probe(dev, err, "Failed to activate PHY RPM\n");
- goto err_put_phy;
- }
- pm_runtime_enable(phy_dev);
- err = pm_runtime_get_sync(phy_dev);
- if (err) {
- dev_err_probe(dev, err, "Failed to power on PHY\n");
- goto err_put_phy;
- }
+ int ret;
/* perform generic probe */
- err = ufshcd_pltfrm_init(pdev, &ufs_hba_mtk_vops);
- if (err) {
- dev_err_probe(dev, err, "Generic platform probe failed\n");
- goto err_put_phy;
- }
+ ret = ufshcd_pltfrm_init(pdev, &ufs_hba_mtk_vops);
+ if (ret)
+ return dev_err_probe(dev, ret, "Generic platform probe failed\n");
hba = platform_get_drvdata(pdev);
- host = ufshcd_get_variant(hba);
- host->phy_dev = phy_dev;
-
/*
* Because the default power setting of VSx (the upper layer of
* VCCQ/VCCQ2) is HWLP, we need to prevent VCCQ/VCCQ2 from
@@ -2365,18 +2314,11 @@ static int ufs_mtk_probe(struct platform_device *pdev)
ufs_mtk_dev_vreg_set_lpm(hba, false);
return 0;
-
-err_put_phy:
- put_device(phy_dev);
-
- return err;
}
/**
* ufs_mtk_remove - set driver_data of the device to NULL
* @pdev: pointer to platform device handle
- *
- * Always return 0
*/
static void ufs_mtk_remove(struct platform_device *pdev)
{
@@ -2436,9 +2378,8 @@ static int ufs_mtk_system_resume(struct device *dev)
static int ufs_mtk_runtime_suspend(struct device *dev)
{
struct ufs_hba *hba = dev_get_drvdata(dev);
- struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct arm_smccc_res res;
- int ret = 0;
+ int ret;
ret = ufshcd_runtime_suspend(dev);
if (ret)
@@ -2449,8 +2390,11 @@ static int ufs_mtk_runtime_suspend(struct device *dev)
if (ufs_mtk_is_rtff_mtcmos(hba))
ufs_mtk_mtcmos_ctrl(false, res);
- if (host->phy_dev)
- pm_runtime_put_sync(host->phy_dev);
+ ret = ufs_mtk_mphy_power_on(hba, false);
+ if (ret) {
+ dev_err(dev, "Failed to power off PHY: %pe\n", ERR_PTR(ret));
+ return ret;
+ }
return 0;
}
@@ -2458,14 +2402,17 @@ static int ufs_mtk_runtime_suspend(struct device *dev)
static int ufs_mtk_runtime_resume(struct device *dev)
{
struct ufs_hba *hba = dev_get_drvdata(dev);
- struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct arm_smccc_res res;
+ int ret;
if (ufs_mtk_is_rtff_mtcmos(hba))
ufs_mtk_mtcmos_ctrl(true, res);
- if (host->phy_dev)
- pm_runtime_get_sync(host->phy_dev);
+ ret = ufs_mtk_mphy_power_on(hba, true);
+ if (ret) {
+ dev_err(dev, "Failed to power on PHY: %pe\n", ERR_PTR(ret));
+ return ret;
+ }
ufs_mtk_dev_vreg_set_lpm(hba, false);
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 24c8941f6b86..4e6a34f4ac39 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -195,7 +195,6 @@ struct ufs_mtk_host {
bool is_mcq_intr_enabled;
int mcq_nr_intr;
struct ufs_mtk_mcq_intr_info mcq_intr_info[UFSHCD_MAX_Q_NR];
- struct device *phy_dev;
};
/* MTK delay of autosuspend: 500 ms */
--
2.52.0
--
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* [PATCH v5 12/24] scsi: ufs: mediatek: Remove vendor kernel quirks cruft
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
Both ufs_mtk_vreg_fix_vcc and ufs_mtk_vreg_fix_vccqx look like they are
vendor kernel hacks to work around existing downstream device trees.
Mainline does not need or want them, so remove them.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 69 -----------------------------------------
1 file changed, 69 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index fc72bf54ec2a..45e088f6e92e 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1017,73 +1017,6 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
}
}
-#define MAX_VCC_NAME 30
-static int ufs_mtk_vreg_fix_vcc(struct ufs_hba *hba)
-{
- struct ufs_vreg_info *info = &hba->vreg_info;
- struct device_node *np = hba->dev->of_node;
- struct device *dev = hba->dev;
- char vcc_name[MAX_VCC_NAME];
- struct arm_smccc_res res;
- int err, ver;
-
- if (info->vcc)
- return 0;
-
- if (of_property_read_bool(np, "mediatek,ufs-vcc-by-num")) {
- ufs_mtk_get_vcc_num(res);
- if (res.a1 > UFS_VCC_NONE && res.a1 < UFS_VCC_MAX)
- snprintf(vcc_name, MAX_VCC_NAME, "vcc-opt%lu", res.a1);
- else
- return -ENODEV;
- } else if (of_property_read_bool(np, "mediatek,ufs-vcc-by-ver")) {
- ver = (hba->dev_info.wspecversion & 0xF00) >> 8;
- snprintf(vcc_name, MAX_VCC_NAME, "vcc-ufs%u", ver);
- } else {
- return 0;
- }
-
- err = ufshcd_populate_vreg(dev, vcc_name, &info->vcc, false);
- if (err)
- return err;
-
- err = ufshcd_get_vreg(dev, info->vcc);
- if (err)
- return err;
-
- err = regulator_enable(info->vcc->reg);
- if (!err) {
- info->vcc->enabled = true;
- dev_info(dev, "%s: %s enabled\n", __func__, vcc_name);
- }
-
- return err;
-}
-
-static void ufs_mtk_vreg_fix_vccqx(struct ufs_hba *hba)
-{
- struct ufs_vreg_info *info = &hba->vreg_info;
- struct ufs_vreg **vreg_on, **vreg_off;
-
- if (hba->dev_info.wspecversion >= 0x0300) {
- vreg_on = &info->vccq;
- vreg_off = &info->vccq2;
- } else {
- vreg_on = &info->vccq2;
- vreg_off = &info->vccq;
- }
-
- if (*vreg_on)
- (*vreg_on)->always_on = true;
-
- if (*vreg_off) {
- regulator_disable((*vreg_off)->reg);
- devm_kfree(hba->dev, (*vreg_off)->name);
- devm_kfree(hba->dev, *vreg_off);
- *vreg_off = NULL;
- }
-}
-
static void ufs_mtk_setup_clk_gating(struct ufs_hba *hba)
{
unsigned long flags;
@@ -1981,8 +1914,6 @@ static void ufs_mtk_fixup_dev_quirks(struct ufs_hba *hba)
hba->dev_quirks &= ~UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM;
}
- ufs_mtk_vreg_fix_vcc(hba);
- ufs_mtk_vreg_fix_vccqx(hba);
ufs_mtk_fix_ahit(hba);
ufs_mtk_fix_clock_scaling(hba);
}
--
2.52.0
--
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* [PATCH v5 11/24] scsi: ufs: mediatek: Rework probe function
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
Remove the ti,syscon-reset cruft.
Make PHY mandatory. All the compatibles supported by the binding make it
mandatory.
Entertain this driver's insistence on playing with the PHY's RPM, but at
least fix the part where it doesn't increase the reference count, which
would lead to use-after-free.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 87 +++++++++++++++--------------------------
1 file changed, 32 insertions(+), 55 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 954d6768aa64..fc72bf54ec2a 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -2382,74 +2382,49 @@ MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);
*/
static int ufs_mtk_probe(struct platform_device *pdev)
{
- int err;
- struct device *dev = &pdev->dev, *phy_dev = NULL;
- struct device_node *reset_node, *phy_node = NULL;
- struct platform_device *reset_pdev, *phy_pdev = NULL;
- struct device_link *link;
- struct ufs_hba *hba;
+ struct platform_device *phy_pdev;
+ struct device *dev = &pdev->dev;
+ struct device_node *phy_node;
struct ufs_mtk_host *host;
+ struct device *phy_dev;
+ struct ufs_hba *hba;
+ int err;
- reset_node = of_find_compatible_node(NULL, NULL,
- "ti,syscon-reset");
- if (!reset_node) {
- dev_notice(dev, "find ti,syscon-reset fail\n");
- goto skip_reset;
- }
- reset_pdev = of_find_device_by_node(reset_node);
- if (!reset_pdev) {
- dev_notice(dev, "find reset_pdev fail\n");
- goto skip_reset;
- }
- link = device_link_add(dev, &reset_pdev->dev,
- DL_FLAG_AUTOPROBE_CONSUMER);
- put_device(&reset_pdev->dev);
- if (!link) {
- dev_notice(dev, "add reset device_link fail\n");
- goto skip_reset;
- }
- /* supplier is not probed */
- if (link->status == DL_STATE_DORMANT) {
- err = -EPROBE_DEFER;
- goto out;
- }
-
-skip_reset:
/* find phy node */
phy_node = of_parse_phandle(dev->of_node, "phys", 0);
+ if (!phy_node)
+ return dev_err_probe(dev, -ENOENT, "No PHY node found\n");
- if (phy_node) {
- phy_pdev = of_find_device_by_node(phy_node);
- if (!phy_pdev)
- goto skip_phy;
- phy_dev = &phy_pdev->dev;
+ phy_pdev = of_find_device_by_node(phy_node);
+ of_node_put(phy_node);
+ if (!phy_pdev)
+ return dev_err_probe(dev, -ENODEV, "No PHY device found\n");
- pm_runtime_set_active(phy_dev);
- pm_runtime_enable(phy_dev);
- pm_runtime_get_sync(phy_dev);
+ phy_dev = &phy_pdev->dev;
- put_device(phy_dev);
- dev_info(dev, "phys node found\n");
- } else {
- dev_notice(dev, "phys node not found\n");
+ err = pm_runtime_set_active(phy_dev);
+ if (err) {
+ dev_err_probe(dev, err, "Failed to activate PHY RPM\n");
+ goto err_put_phy;
+ }
+ pm_runtime_enable(phy_dev);
+ err = pm_runtime_get_sync(phy_dev);
+ if (err) {
+ dev_err_probe(dev, err, "Failed to power on PHY\n");
+ goto err_put_phy;
}
-skip_phy:
/* perform generic probe */
err = ufshcd_pltfrm_init(pdev, &ufs_hba_mtk_vops);
if (err) {
- dev_err(dev, "probe failed %d\n", err);
- goto out;
+ dev_err_probe(dev, err, "Generic platform probe failed\n");
+ goto err_put_phy;
}
hba = platform_get_drvdata(pdev);
- if (!hba)
- goto out;
- if (phy_node && phy_dev) {
- host = ufshcd_get_variant(hba);
- host->phy_dev = phy_dev;
- }
+ host = ufshcd_get_variant(hba);
+ host->phy_dev = phy_dev;
/*
* Because the default power setting of VSx (the upper layer of
@@ -2458,9 +2433,11 @@ static int ufs_mtk_probe(struct platform_device *pdev)
*/
ufs_mtk_dev_vreg_set_lpm(hba, false);
-out:
- of_node_put(phy_node);
- of_node_put(reset_node);
+ return 0;
+
+err_put_phy:
+ put_device(phy_dev);
+
return err;
}
--
2.52.0
--
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^ permalink raw reply related
* [PATCH v5 10/24] scsi: ufs: mediatek: Handle misc host voltage regulators
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
MediaTek SoCs handled by this driver contain a per-SoC specific set of
miscellaneous supplies. These feed parts of the UFS controller silicon
inside the SoC, as opposed to the UFS card.
Add the necessary driver code to acquire these supplies using the
regulator bulk API. They should be kept on during suspend, so enable
them when acquiring.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 37 ++++++++++++++++++++++++++++++++++---
1 file changed, 34 insertions(+), 3 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 0d8f4e542d47..954d6768aa64 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -40,6 +40,8 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up);
struct ufs_mtk_soc_data {
bool has_avdd09;
+ u8 num_reg_names;
+ const char *const *reg_names;
};
static const struct ufs_dev_quirk ufs_mtk_dev_fixups[] = {
@@ -1188,8 +1190,21 @@ static int ufs_mtk_get_supplies(struct ufs_mtk_host *host)
{
struct device *dev = host->hba->dev;
const struct ufs_mtk_soc_data *data = of_device_get_match_data(dev);
+ int ret;
+
+ if (!data)
+ return 0;
+
+ if (data->num_reg_names) {
+ ret = devm_regulator_bulk_get_enable(dev, data->num_reg_names,
+ data->reg_names);
+ if (ret) {
+ dev_err(dev, "Failed to get misc regulators: %pe\n", ERR_PTR(ret));
+ return ret;
+ }
+ }
- if (!data || !data->has_avdd09)
+ if (!data->has_avdd09)
return 0;
host->reg_avdd09 = devm_regulator_get_optional(dev, "avdd09");
@@ -2331,14 +2346,30 @@ static const struct ufs_hba_variant_ops ufs_hba_mtk_vops = {
.config_scsi_dev = ufs_mtk_config_scsi_dev,
};
+static const char *const ufs_mtk_regs_avdd12_avdd18[] = {
+ "avdd12", "avdd18"
+};
+
+static const char *const ufs_mtk_regs_avdd12_ckbuf_avdd18[] = {
+ "avdd12", "avdd12-ckbuf", "avdd18"
+};
+
static const struct ufs_mtk_soc_data mt8183_data = {
.has_avdd09 = true,
+ .reg_names = ufs_mtk_regs_avdd12_avdd18,
+ .num_reg_names = ARRAY_SIZE(ufs_mtk_regs_avdd12_avdd18),
+};
+
+static const struct ufs_mtk_soc_data mt8192_8195_data = {
+ .has_avdd09 = false,
+ .reg_names = ufs_mtk_regs_avdd12_ckbuf_avdd18,
+ .num_reg_names = ARRAY_SIZE(ufs_mtk_regs_avdd12_ckbuf_avdd18),
};
static const struct of_device_id ufs_mtk_of_match[] = {
{ .compatible = "mediatek,mt8183-ufshci", .data = &mt8183_data },
- { .compatible = "mediatek,mt8192-ufshci" },
- { .compatible = "mediatek,mt8195-ufshci" },
+ { .compatible = "mediatek,mt8192-ufshci", .data = &mt8192_8195_data },
+ { .compatible = "mediatek,mt8195-ufshci", .data = &mt8192_8195_data },
{},
};
MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);
--
2.52.0
--
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* [PATCH v5 09/24] scsi: ufs: mediatek: Rework the crypt-boost stuff
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
I don't know whether the crypt-boost functionality as it is currently
implemented is even appropriate for mainline. It might be better done in
some generic way. But what I do know is that I can rework the code to
make it less obtuse.
Prefix the boost stuff with the appropriate vendor prefix, remove the
pointless clock wrappers, and rework the function.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Peter Wang (王信友) <peter.wang@mediatek.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 89 ++++++++++++++---------------------------
1 file changed, 30 insertions(+), 59 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 4cb1a1b400ac..0d8f4e542d47 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -562,21 +562,6 @@ static int ufs_mtk_mphy_power_on(struct ufs_hba *hba, bool on)
return 0;
}
-static int ufs_mtk_get_host_clk(struct device *dev, const char *name,
- struct clk **clk_out)
-{
- struct clk *clk;
- int err = 0;
-
- clk = devm_clk_get(dev, name);
- if (IS_ERR(clk))
- err = PTR_ERR(clk);
- else
- *clk_out = clk;
-
- return err;
-}
-
static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@@ -633,65 +618,51 @@ static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost)
clk_disable_unprepare(cfg->clk_crypt_mux);
}
-static int ufs_mtk_init_host_clk(struct ufs_hba *hba, const char *name,
- struct clk **clk)
-{
- int ret;
-
- ret = ufs_mtk_get_host_clk(hba->dev, name, clk);
- if (ret) {
- dev_info(hba->dev, "%s: failed to get %s: %d", __func__,
- name, ret);
- }
-
- return ret;
-}
-
static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct ufs_mtk_crypt_cfg *cfg;
struct device *dev = hba->dev;
- struct regulator *reg;
- u32 volt;
+ int ret;
- host->crypt = devm_kzalloc(dev, sizeof(*(host->crypt)),
- GFP_KERNEL);
- if (!host->crypt)
- goto disable_caps;
+ cfg = devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL);
+ if (!cfg)
+ return;
- reg = devm_regulator_get_optional(dev, "dvfsrc-vcore");
- if (IS_ERR(reg)) {
- dev_info(dev, "failed to get dvfsrc-vcore: %ld",
- PTR_ERR(reg));
- goto disable_caps;
+ cfg->reg_vcore = devm_regulator_get_optional(dev, "dvfsrc-vcore");
+ if (IS_ERR(cfg->reg_vcore)) {
+ dev_err(dev, "Failed to get dvfsrc-vcore: %pe", cfg->reg_vcore);
+ return;
}
- if (of_property_read_u32(dev->of_node, "boost-crypt-vcore-min",
- &volt)) {
- dev_info(dev, "failed to get boost-crypt-vcore-min");
- goto disable_caps;
+ ret = of_property_read_u32(dev->of_node, "mediatek,boost-crypt-vcore-min",
+ &cfg->vcore_volt);
+ if (ret) {
+ dev_err(dev, "Failed to get mediatek,boost-crypt-vcore-min: %pe\n",
+ ERR_PTR(ret));
+ return;
}
- cfg = host->crypt;
- if (ufs_mtk_init_host_clk(hba, "crypt_mux",
- &cfg->clk_crypt_mux))
- goto disable_caps;
+ cfg->clk_crypt_mux = devm_clk_get(dev, "crypt_mux");
+ if (IS_ERR(cfg->clk_crypt_mux)) {
+ dev_err(dev, "Failed to get clock crypt_mux: %pe\n", cfg->clk_crypt_mux);
+ return;
+ }
- if (ufs_mtk_init_host_clk(hba, "crypt_lp",
- &cfg->clk_crypt_lp))
- goto disable_caps;
+ cfg->clk_crypt_lp = devm_clk_get(dev, "crypt_lp");
+ if (IS_ERR(cfg->clk_crypt_lp)) {
+ dev_err(dev, "Failed to get clock crypt_lp: %pe\n", cfg->clk_crypt_lp);
+ return;
+ }
- if (ufs_mtk_init_host_clk(hba, "crypt_perf",
- &cfg->clk_crypt_perf))
- goto disable_caps;
+ cfg->clk_crypt_perf = devm_clk_get(dev, "crypt_perf");
+ if (IS_ERR(cfg->clk_crypt_perf)) {
+ dev_err(dev, "Failed to get clock crypt_perf: %pe\n", cfg->clk_crypt_perf);
+ return;
+ }
- cfg->reg_vcore = reg;
- cfg->vcore_volt = volt;
+ host->crypt = cfg;
host->caps |= UFS_MTK_CAP_BOOST_CRYPT_ENGINE;
-
-disable_caps:
- return;
}
static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
--
2.52.0
--
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* [PATCH v5 08/24] scsi: ufs: mediatek: Rework init function
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>
Printing an error message on ENOMEM is pointless. The print will not
work because there is no memory.
Adding an of_match_device to the init function is pointless. Why would a
different device with a different probe function ever use the same init
function? Get rid of it.
zero-initialising an error variable just so you can then goto a bare
return statement with that error variable to signal success is also
pointless, just return directly, there's no unwind being done.
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 19 ++++---------------
1 file changed, 4 insertions(+), 15 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 7fcf4ceeb56e..4cb1a1b400ac 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1248,29 +1248,19 @@ static int ufs_mtk_get_supplies(struct ufs_mtk_host *host)
*/
static int ufs_mtk_init(struct ufs_hba *hba)
{
- const struct of_device_id *id;
struct device *dev = hba->dev;
struct ufs_mtk_host *host;
struct Scsi_Host *shost = hba->host;
- int err = 0;
+ int err;
struct arm_smccc_res res;
host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
- if (!host) {
- err = -ENOMEM;
- dev_info(dev, "%s: no memory for mtk ufs host\n", __func__);
- goto out;
- }
+ if (!host)
+ return -ENOMEM;
host->hba = hba;
ufshcd_set_variant(hba, host);
- id = of_match_device(ufs_mtk_of_match, dev);
- if (!id) {
- err = -EINVAL;
- goto out;
- }
-
/* Initialize host capability */
ufs_mtk_init_host_caps(hba);
@@ -1344,11 +1334,10 @@ static int ufs_mtk_init(struct ufs_hba *hba)
ufs_mtk_get_hw_ip_version(hba);
- goto out;
+ return 0;
out_variant_clear:
ufshcd_set_variant(hba, NULL);
-out:
return err;
}
--
2.52.0
--
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linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
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