* Re: [PATCH v8 01/10] spmi: Remove redundant dev_name() print in spmi_device_add()
From: Stephen Boyd @ 2026-01-16 2:03 UTC (permalink / raw)
To: AngeloGioacchino Del Regno, jic23
Cc: dlechner, nuno.sa, andy, arnd, gregkh, srini, vkoul,
neil.armstrong, sre, angelogioacchino.delregno, krzk,
dmitry.baryshkov, quic_wcheng, melody.olvera, quic_nsekar,
ivo.ivanov.ivanov1, abelvesa, luca.weiss, konrad.dybcio,
mitltlatltl, krishna.kurapati, linux-arm-msm, linux-iio,
linux-kernel, linux-phy, linux-pm, kernel
In-Reply-To: <20260114092742.13231-2-angelogioacchino.delregno@collabora.com>
Quoting AngeloGioacchino Del Regno (2026-01-14 03:27:33)
> Function spmi_device_add() uses dev_{dbg,err}() for respectively
> debug and error prints, and passes the same device pointer as both
> the dev_{dbg,err}() parameters and to a dev_name() that is part of
> the actual message.
> This means that the device name gets printed twice!
>
> Remove the redundant dev_name() from the messages.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
Acked-by: Stephen Boyd <sboyd@kernel.org>
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* Re: [PATCH 2/4] phy: axiado: add Axiado eMMC PHY driver
From: kernel test robot @ 2026-01-15 22:22 UTC (permalink / raw)
To: Tzu-Hao Wei, SriNavmani A, Prasad Bolisetty, Vinod Koul,
Neil Armstrong, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: oe-kbuild-all, linux-phy, devicetree, linux-arm-kernel,
linux-kernel, openbmc, Tzu-Hao Wei
In-Reply-To: <20260109-axiado-ax3000-add-emmc-phy-driver-support-v1-2-dd43459dbfea@axiado.com>
Hi Tzu-Hao,
kernel test robot noticed the following build errors:
[auto build test ERROR on f0b9d8eb98dfee8d00419aa07543bdc2c1a44fb1]
url: https://github.com/intel-lab-lkp/linux/commits/Tzu-Hao-Wei/dt-bindings-phy-axiado-ax3000-emmc-phy-add-Axiado-eMMC-PHY/20260109-174938
base: f0b9d8eb98dfee8d00419aa07543bdc2c1a44fb1
patch link: https://lore.kernel.org/r/20260109-axiado-ax3000-add-emmc-phy-driver-support-v1-2-dd43459dbfea%40axiado.com
patch subject: [PATCH 2/4] phy: axiado: add Axiado eMMC PHY driver
config: m68k-allmodconfig (https://download.01.org/0day-ci/archive/20260116/202601160610.y8FbB5x1-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 15.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260116/202601160610.y8FbB5x1-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601160610.y8FbB5x1-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from include/linux/swab.h:5,
from include/uapi/linux/byteorder/big_endian.h:14,
from include/linux/byteorder/big_endian.h:5,
from arch/m68k/include/uapi/asm/byteorder.h:5,
from include/asm-generic/bitops/le.h:6,
from arch/m68k/include/asm/bitops.h:569,
from include/linux/bitops.h:67,
from include/linux/thread_info.h:27,
from include/asm-generic/preempt.h:5,
from ./arch/m68k/include/generated/asm/preempt.h:1,
from include/linux/preempt.h:79,
from arch/m68k/include/asm/processor.h:11,
from include/linux/sched.h:13,
from include/linux/delay.h:13,
from drivers/phy/axiado/phy-axiado-emmc.c:11:
drivers/phy/axiado/phy-axiado-emmc.c: In function 'axiado_emmc_phy_power_on':
>> drivers/phy/axiado/phy-axiado-emmc.c:69:34: error: implicit declaration of function 'FIELD_PREP' [-Wimplicit-function-declaration]
69 | #define OTAP_SEL(x) (FIELD_PREP(OTAP_SEL_MASK, x) | OTAPDLY_EN)
| ^~~~~~~~~~
include/uapi/linux/swab.h:118:38: note: in definition of macro '__swab32'
118 | (__u32)(__builtin_constant_p(x) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro '__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
arch/m68k/include/asm/io_mm.h:373:26: note: in expansion of macro 'out_le32'
373 | #define writel(val,addr) out_le32((addr),(val))
| ^~~~~~~~
drivers/phy/axiado/phy-axiado-emmc.c:147:9: note: in expansion of macro 'writel'
147 | writel(val | OTAP_SEL(OTAP_DLY), ax_phy->reg_base + PHY_CTRL_2);
| ^~~~~~
drivers/phy/axiado/phy-axiado-emmc.c:147:22: note: in expansion of macro 'OTAP_SEL'
147 | writel(val | OTAP_SEL(OTAP_DLY), ax_phy->reg_base + PHY_CTRL_2);
| ^~~~~~~~
vim +/FIELD_PREP +69 drivers/phy/axiado/phy-axiado-emmc.c
> 11 #include <linux/delay.h>
12 #include <linux/io.h>
13 #include <linux/iopoll.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/phy/phy.h>
17 #include <linux/platform_device.h>
18
19 /* Arasan eMMC 5.1 - PHY configuration registers */
20 #define CAP_REG_IN_S1_LSB 0x00
21 #define CAP_REG_IN_S1_MSB 0x04
22 #define PHY_CTRL_1 0x38
23 #define PHY_CTRL_2 0x3C
24 #define PHY_CTRL_3 0x40
25 #define STATUS 0x50
26
27 #define DLL_ENBL BIT(26)
28 #define RTRIM_EN BIT(21)
29 #define PDB_ENBL BIT(23)
30 #define RETB_ENBL BIT(1)
31
32 #define REN_STRB BIT(27)
33 #define REN_CMD BIT(12)
34 #define REN_DAT0 BIT(13)
35 #define REN_DAT1 BIT(14)
36 #define REN_DAT2 BIT(15)
37 #define REN_DAT3 BIT(16)
38 #define REN_DAT4 BIT(17)
39 #define REN_DAT5 BIT(18)
40 #define REN_DAT6 BIT(19)
41 #define REN_DAT7 BIT(20)
42 #define REN_CMD_EN (REN_CMD | REN_DAT0 | REN_DAT1 | REN_DAT2 | \
43 REN_DAT3 | REN_DAT4 | REN_DAT5 | REN_DAT6 | REN_DAT7)
44
45 /* Pull-UP Enable on CMD Line */
46 #define PU_CMD BIT(3)
47 #define PU_DAT0 BIT(4)
48 #define PU_DAT1 BIT(5)
49 #define PU_DAT2 BIT(6)
50 #define PU_DAT3 BIT(7)
51 #define PU_DAT4 BIT(8)
52 #define PU_DAT5 BIT(9)
53 #define PU_DAT6 BIT(10)
54 #define PU_DAT7 BIT(11)
55 #define PU_CMD_EN (PU_CMD | PU_DAT0 | PU_DAT1 | PU_DAT2 | PU_DAT3 | \
56 PU_DAT4 | PU_DAT5 | PU_DAT6 | PU_DAT7)
57
58 /* Selection value for the optimum delay from 1-32 output tap lines */
59 #define OTAP_DLY 0x02
60 /* DLL charge pump current trim default [1000] */
61 #define DLL_TRM_ICP 0x08
62 /* Select the frequency range of DLL Operation */
63 #define FRQ_SEL 0x01
64
65 #define OTAP_SEL_MASK GENMASK(10, 7)
66 #define DLL_TRM_MASK GENMASK(25, 22)
67 #define DLL_FRQSEL_MASK GENMASK(27, 25)
68
> 69 #define OTAP_SEL(x) (FIELD_PREP(OTAP_SEL_MASK, x) | OTAPDLY_EN)
70 #define DLL_TRM(x) (FIELD_PREP(DLL_TRM_MASK, x) | DLL_ENBL)
71 #define DLL_FRQSEL(x) FIELD_PREP(DLL_FRQSEL_MASK, x)
72
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* Re: [PATCH 00/27] clk: remove deprecated API divider_round_rate() and friends
From: Dmitry Baryshkov @ 2026-01-15 21:05 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Brian Masney
Cc: linux-clk, linux-kernel, Chen Wang, Inochi Amaoto, sophgo,
Chen-Yu Tsai, Maxime Ripard, Jernej Skrabec, Samuel Holland,
linux-arm-kernel, linux-sunxi, Alexandre Belloni, linux-rtc,
Andreas Färber, Manivannan Sadhasivam, linux-actions,
Keguang Zhang, linux-mips, Taichi Sugaya, Takao Orito,
Jacky Huang, Shan-Chun Hung, Vladimir Zapolskiy,
Piotr Wojtaszczyk, Bjorn Andersson, linux-arm-msm, Orson Zhai,
Baolin Wang, Chunyan Zhang, Maxime Coquelin, Alexandre Torgue,
linux-stm32, Michal Simek, Rob Clark, Dmitry Baryshkov,
David Airlie, Simona Vetter, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, dri-devel, freedreno, Vinod Koul,
Neil Armstrong, linux-phy
In-Reply-To: <20260108-clk-divider-round-rate-v1-0-535a3ed73bf3@redhat.com>
On Thu, 08 Jan 2026 16:16:18 -0500, Brian Masney wrote:
> Here's a series that gets rid of the deprecated APIs
> divider_round_rate(), divider_round_rate_parent(), and
> divider_ro_round_rate_parent() since these functions are just wrappers
> for the determine_rate variant.
>
> Note that when I converted some of these drivers from round_rate to
> determine_rate, this was mistakenly converted to the following in some
> cases:
>
> [...]
Applied to msm-next, thanks!
[24/27] drm/msm/dsi_phy_14nm: convert from divider_round_rate() to divider_determine_rate()
https://gitlab.freedesktop.org/lumag/msm/-/commit/1d232f793d4d
Best regards,
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* Re: [PATCH v2 1/4] dt-bindings: phy: Add Canaan K230 USB PHY
From: Rob Herring (Arm) @ 2026-01-15 20:03 UTC (permalink / raw)
To: Jiayu Du
Cc: devicetree, vkoul, TroyMitchell988, linux-usb, conor, kingxukai,
linux-riscv, alex, pjw, linux-kernel, krzk+dt, gaohan, cyy,
gregkh, linux-phy, aou, neil.armstrong, conor+dt, palmer,
18771902331
In-Reply-To: <20260115064223.21926-2-jiayu.riscv@isrc.iscas.ac.cn>
On Thu, 15 Jan 2026 14:42:19 +0800, Jiayu Du wrote:
> K230 SoC USB PHY requires configuring registers for control and
> configuration. Add USB phy bindings for K230 SoC.
>
> Signed-off-by: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>
> ---
> .../bindings/phy/canaan,k230-usb-phy.yaml | 35 +++++++++++++++++++
> 1 file changed, 35 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/canaan,k230-usb-phy.yaml
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
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* Re: [PATCH phy 2/8] dt-bindings: phy: lynx-28g: add compatible strings per SerDes and instantiation
From: Rob Herring (Arm) @ 2026-01-15 19:52 UTC (permalink / raw)
To: Vladimir Oltean
Cc: netdev, Kishon Vijay Abraham I, Vinod Koul, Krzysztof Kozlowski,
linux-phy, Neil Armstrong, Josua Mayer, Conor Dooley,
linux-kernel, devicetree, Ioana Ciornei
In-Reply-To: <20260114152111.625350-3-vladimir.oltean@nxp.com>
On Wed, 14 Jan 2026 17:21:05 +0200, Vladimir Oltean wrote:
> The 28G Lynx SerDes is instantiated 3 times in the NXP LX2160A SoC and
> twice in the NXP LX2162A. All these instances share the same register
> map, but the number of lanes and the protocols supported by each lane
> differs in a way that isn't detectable by the programming model.
>
> Going by the generic "fsl,lynx-28g" compatible string and expecting all
> SerDes instantiations to use it was a mistake that needs to be fixed.
>
> The two major options considered are
> (a) encode the SoC and the SerDes instance in the compatible string,
> everything else is the responsibility of the driver to derive based
> on this sufficient information
> (b) add sufficient device tree properties to describe the per-lane
> differences, as well as the different lane count
>
> Another important consideration is that any decision made here should
> be consistent with the decisions taken for the yet-to-be-introduced
> 10G Lynx SerDes (older generation for older SoCs), because of how
> similar they are.
>
> I've seen option (b) at play in this unmerged patch set for the 10G Lynx
> here, and I didn't like it:
> https://lore.kernel.org/linux-phy/20230413160607.4128315-3-sean.anderson@seco.com/
>
> This is because there, we have a higher degree of variability in the
> PCCR register values that need to be written per protocol. This makes
> that approach more drawn-out and more prone to errors, compared to (a)
> which is more succinct and obviously correct.
>
> So I've chosen option (a) through elimination, and this also reflects
> how the SoC reference manual provides different tables with protocol
> combinations for each SerDes. NXP clearly documents these as not
> identical, and refers to them as such (SerDes 1, 2, etc).
>
> The per-SoC compatible string is prepended to the "fsl,lynx-28g" generic
> compatible, which is left there for compatibility with old kernels. An
> exception would be LX2160A SerDes #3, which at the time of writing is
> not described in fsl-lx2160a.dtsi, and is a non-networking SerDes, so
> the existing Linux driver is useless for it. So there is no practical
> reason to put the "fsl,lynx-28g" fallback for "fsl,lx2160a-serdes3".
>
> The specific compatible strings give us the opportunity to express more
> constraints in the schema that we weren't able to express before:
> - We allow #phy-cells in the top-level SerDes node only for
> compatibility with old kernels that don't know how to translate
> "phys = <&serdes_1_lane_a>" to a PHY. We don't need that feature for
> the not-yet-introduced LX2160A SerDes #3, so make the presence of
> #phy-cells at the top level be dependent on the presence of the
> "fsl,lynx-28g" fallback compatible.
> - The modernization of the compatible string should come together with
> per-lane OF nodes.
> - LX2162A SerDes 1 has fewer lanes than the others, and trying to use
> lanes 0-3 would be a mistake that could be caught by the schema.
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---
> part 1 -> part 2:
> - drop everything having to do with constraints (on #phy-cells,
> #address-cells, #size-cells) based on new compatible strings.
>
> Patch made its last appearance in v4 from part 1:
> https://lore.kernel.org/linux-phy/20251110092241.1306838-16-vladimir.oltean@nxp.com/
>
> v3->v4:
> - OF nodes per lane broken out as a separate "[PATCH v4 phy 01/16]
> dt-bindings: phy: lynx-28g: permit lane OF PHY providers"
> - rewritten commit message
> - s|"^phy@[0-9a-f]+$"|"^phy@[0-7]$"|g in patternProperties
> - define "#address-cells" and "#size-cells" as part of common
> properties, only leave the part which marks them required in the allOf
> constraints area
> v2->v3:
> - re-add "fsl,lynx-28g" as fallback compatible, and #phy-cells = <1> in
> top-level "serdes" node
> - drop useless description texts
> - fix text formatting
> - schema is more lax to allow overlaying old and new required properties
> v1->v2:
> - drop the usage of "fsl,lynx-28g" as a fallback compatible
> - mark "fsl,lynx-28g" as deprecated
> - implement Josua's request for per-lane OF nodes for the new compatible
> strings
>
> .../devicetree/bindings/phy/fsl,lynx-28g.yaml | 33 +++++++++++++++++--
> 1 file changed, 30 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
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* Re: [PATCH net-next 05/14] net: stmmac: add stmmac core serdes support
From: Russell King (Oracle) @ 2026-01-15 15:15 UTC (permalink / raw)
To: Maxime Chevallier
Cc: Andrew Lunn, Heiner Kallweit, Alexandre Torgue, Andrew Lunn,
David S. Miller, Eric Dumazet, Jakub Kicinski, Konrad Dybcio,
linux-arm-kernel, linux-arm-msm, linux-phy, linux-stm32,
Maxime Coquelin, Mohd Ayaan Anwar, Neil Armstrong, netdev,
Paolo Abeni, Vinod Koul
In-Reply-To: <a91a0937-93cd-40f2-9759-8823fb08f48c@bootlin.com>
On Thu, Jan 15, 2026 at 03:48:40PM +0100, Maxime Chevallier wrote:
> Hi Russell,
>
> On 14/01/2026 18:45, Russell King (Oracle) wrote:
> > Rather than having platform glue implement SerDes PHY support, add it
> > to the core driver, specifically to the stmmac integrated PCS driver
> > as the SerDes is connected to the integrated PCS.
> >
> > Platforms using external PCS can also populate plat->serdes, and the
> > core driver will call phy_init() and phy_exit() when the administrative
> > state of the interface changes, but the other phy methods will not be
> > called.
> >
> > Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
>
> Unfortunately I have no way to test. But still,
I am hoping Mohd Ayaan Anwar will be able to do at least some testing
on the qcom-ethqos hardware.
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* Re: [PATCH v2 2/2] dt-bindings: phy: ti,control-phy-otghs: convert to DT schema
From: Rob Herring @ 2026-01-15 14:51 UTC (permalink / raw)
To: Charan Pedumuru
Cc: Vinod Koul, Neil Armstrong, Krzysztof Kozlowski, Conor Dooley,
Kishon Vijay Abraham I, linux-phy, devicetree, linux-kernel
In-Reply-To: <20260107-ti-phy-v2-2-a1ec27401fff@gmail.com>
On Wed, Jan 07, 2026 at 04:11:16PM +0000, Charan Pedumuru wrote:
> Convert TI OMAP Control PHY binding to DT schema.
> Changes during conversion:
> - Define a new pattern 'control-phy' to match nodes defined in DT.
>
> Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com>
> ---
> .../bindings/phy/ti,control-phy-otghs.yaml | 94 +++++++++++++++++++++
> Documentation/devicetree/bindings/phy/ti-phy.txt | 98 ----------------------
> 2 files changed, 94 insertions(+), 98 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/ti,control-phy-otghs.yaml b/Documentation/devicetree/bindings/phy/ti,control-phy-otghs.yaml
> new file mode 100644
> index 000000000000..2c91609cac35
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/ti,control-phy-otghs.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/ti,control-phy-otghs.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI OMAP Control PHY Module
> +
> +maintainers:
> + - Kishon Vijay Abraham I <kishon@ti.com>
> +
> +description:
> + The TI OMAP Control PHY module is a hardware block within the system
> + control module (SCM) of Texas Instruments OMAP SoCs. It provides
> + centralized control over power, configuration, and auxiliary features
> + for multiple on-chip PHYs. This module is essential for proper PHY
> + operation in power-constrained embedded systems.
> +
> +properties:
> + $nodename:
> + pattern: "^control-phy(@[0-9a-f]+)?$"
Drop. Non-standard.
> +
> + compatible:
> + enum:
> + - ti,control-phy-otghs
> + - ti,control-phy-usb2
> + - ti,control-phy-pipe3
> + - ti,control-phy-pcie
> + - ti,control-phy-usb2-dra7
> + - ti,control-phy-usb2-am437
Alphabetical order
> +
> + reg:
> + minItems: 1
> + maxItems: 4
With the constraints below, there is no case that allows 4 entries.
> +
> + reg-names:
> + minItems: 1
> + maxItems: 4
> + items:
> + enum: [otghs_control, power, pcie_pcs, control_sma]
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - ti,control-phy-otghs
> + then:
> + properties:
> + reg-names:
> + const: otghs_control
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - ti,control-phy-pcie
There's no .dts with this compatible. Do you really need this
compatible or can drop it?
> + then:
> + properties:
> + reg-names:
> + items:
> + - enum: [power, pcie_pcs, control_sma]
It's really 1 entry of 3 possible names?
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - ti,control-phy-usb2
> + - ti,control-phy-usb2-dra7
> + - ti,control-phy-usb2-am437
> + - ti,control-phy-pipe3
> + then:
> + properties:
> + reg-names:
> + const: power
> +
> +required:
> + - reg
> + - compatible
> + - reg-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + control-phy@4a00233c {
phy@...
> + compatible = "ti,control-phy-otghs";
> + reg = <0x4a00233c 0x4>;
> + reg-names = "otghs_control";
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt
> deleted file mode 100644
> index 7c7936b89f2c..000000000000
> --- a/Documentation/devicetree/bindings/phy/ti-phy.txt
> +++ /dev/null
> @@ -1,98 +0,0 @@
> -TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs
> -
> -OMAP CONTROL PHY
> -
> -Required properties:
> - - compatible: Should be one of
> - "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
> - "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
> - e.g. USB2_PHY on OMAP5.
> - "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
> - e.g. USB3 PHY and SATA PHY on OMAP5.
> - "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
> - set PCS delay value.
> - e.g. PCIE PHY in DRA7x
> - "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
> - DRA7 platform.
> - "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
> - AM437 platform.
> - - reg : register ranges as listed in the reg-names property
> - - reg-names: "otghs_control" for control-phy-otghs
> - "power", "pcie_pcs" and "control_sma" for control-phy-pcie
> - "power" for all other types
> -
> -omap_control_usb: omap-control-usb@4a002300 {
> - compatible = "ti,control-phy-otghs";
> - reg = <0x4a00233c 0x4>;
> - reg-names = "otghs_control";
> -};
> -
> -TI PIPE3 PHY
> -
> -Required properties:
> - - compatible: Should be "ti,phy-usb3", "ti,phy-pipe3-sata" or
> - "ti,phy-pipe3-pcie. "ti,omap-usb3" is deprecated.
> - - reg : Address and length of the register set for the device.
> - - reg-names: The names of the register addresses corresponding to the registers
> - filled in "reg".
> - - #phy-cells: determine the number of cells that should be given in the
> - phandle while referencing this phy.
> - - clocks: a list of phandles and clock-specifier pairs, one for each entry in
> - clock-names.
> - - clock-names: should include:
> - * "wkupclk" - wakeup clock.
> - * "sysclk" - system clock.
> - * "refclk" - reference clock.
> - * "dpll_ref" - external dpll ref clk
> - * "dpll_ref_m2" - external dpll ref clk
> - * "phy-div" - divider for apll
> - * "div-clk" - apll clock
> -
> -Optional properties:
> - - id: If there are multiple instance of the same type, in order to
> - differentiate between each instance "id" can be used (e.g., multi-lane PCIe
> - PHY). If "id" is not provided, it is set to default value of '1'.
> - - syscon-pllreset: Handle to system control region that contains the
> - CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
> - register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
> - - syscon-pcs : phandle/offset pair. Phandle to the system control module and the
> - register offset to write the PCS delay value.
> -
> -Deprecated properties:
> - - ctrl-module : phandle of the control module used by PHY driver to power on
> - the PHY.
> -
> -Recommended properties:
> - - syscon-phy-power : phandle/offset pair. Phandle to the system control
> - module and the register offset to power on/off the PHY.
> -
> -This is usually a subnode of ocp2scp to which it is connected.
> -
> -usb3phy@4a084400 {
> - compatible = "ti,phy-usb3";
> - reg = <0x4a084400 0x80>,
> - <0x4a084800 0x64>,
> - <0x4a084c00 0x40>;
> - reg-names = "phy_rx", "phy_tx", "pll_ctrl";
> - ctrl-module = <&omap_control_usb>;
> - #phy-cells = <0>;
> - clocks = <&usb_phy_cm_clk32k>,
> - <&sys_clkin>,
> - <&usb_otg_ss_refclk960m>;
> - clock-names = "wkupclk",
> - "sysclk",
> - "refclk";
> -};
> -
> -sata_phy: phy@4a096000 {
> - compatible = "ti,phy-pipe3-sata";
> - reg = <0x4A096000 0x80>, /* phy_rx */
> - <0x4A096400 0x64>, /* phy_tx */
> - <0x4A096800 0x40>; /* pll_ctrl */
> - reg-names = "phy_rx", "phy_tx", "pll_ctrl";
> - ctrl-module = <&omap_control_sata>;
> - clocks = <&sys_clkin1>, <&sata_ref_clk>;
> - clock-names = "sysclk", "refclk";
> - syscon-pllreset = <&scm_conf 0x3fc>;
> - #phy-cells = <0>;
> -};
>
> --
> 2.52.0
>
--
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^ permalink raw reply
* Re: [PATCH net-next 05/14] net: stmmac: add stmmac core serdes support
From: Maxime Chevallier @ 2026-01-15 14:48 UTC (permalink / raw)
To: Russell King (Oracle), Andrew Lunn, Heiner Kallweit
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, Konrad Dybcio, linux-arm-kernel, linux-arm-msm,
linux-phy, linux-stm32, Maxime Coquelin, Mohd Ayaan Anwar,
Neil Armstrong, netdev, Paolo Abeni, Vinod Koul
In-Reply-To: <E1vg4w2-00000003SG5-2FH5@rmk-PC.armlinux.org.uk>
Hi Russell,
On 14/01/2026 18:45, Russell King (Oracle) wrote:
> Rather than having platform glue implement SerDes PHY support, add it
> to the core driver, specifically to the stmmac integrated PCS driver
> as the SerDes is connected to the integrated PCS.
>
> Platforms using external PCS can also populate plat->serdes, and the
> core driver will call phy_init() and phy_exit() when the administrative
> state of the interface changes, but the other phy methods will not be
> called.
>
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Unfortunately I have no way to test. But still,
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Maxime
> ---
> drivers/net/ethernet/stmicro/stmmac/Makefile | 2 +-
> .../net/ethernet/stmicro/stmmac/stmmac_main.c | 14 ++-
> .../net/ethernet/stmicro/stmmac/stmmac_pcs.c | 38 +++++-
> .../net/ethernet/stmicro/stmmac/stmmac_pcs.h | 1 +
> .../ethernet/stmicro/stmmac/stmmac_serdes.c | 111 ++++++++++++++++++
> .../ethernet/stmicro/stmmac/stmmac_serdes.h | 16 +++
> include/linux/stmmac.h | 2 +
> 7 files changed, 180 insertions(+), 4 deletions(-)
> create mode 100644 drivers/net/ethernet/stmicro/stmmac/stmmac_serdes.c
> create mode 100644 drivers/net/ethernet/stmicro/stmmac/stmmac_serdes.h
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> index c9263987ef8d..a3c2cd5d0c91 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> @@ -7,7 +7,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \
> dwmac4_dma.o dwmac4_lib.o dwmac4_core.o dwmac5.o hwif.o \
> stmmac_tc.o dwxgmac2_core.o dwxgmac2_dma.o dwxgmac2_descs.o \
> stmmac_xdp.o stmmac_est.o stmmac_fpe.o stmmac_vlan.o \
> - stmmac_pcs.o $(stmmac-y)
> + stmmac_pcs.o stmmac_serdes.o $(stmmac-y)
>
> stmmac-$(CONFIG_STMMAC_SELFTESTS) += stmmac_selftests.o
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index 24a2555ca329..6c515f9efbe7 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -48,6 +48,7 @@
> #include "stmmac_fpe.h"
> #include "stmmac.h"
> #include "stmmac_pcs.h"
> +#include "stmmac_serdes.h"
> #include "stmmac_xdp.h"
> #include <linux/reset.h>
> #include <linux/of_mdio.h>
> @@ -3549,12 +3550,16 @@ static void stmmac_safety_feat_configuration(struct stmmac_priv *priv)
>
> static void stmmac_clk_rx_i_require(struct stmmac_priv *priv)
> {
> + dwmac_serdes_power_on(priv);
> + /* Only sets the SerDes mode if it wasn't already configured. */
> + dwmac_serdes_init_mode(priv, priv->plat->phy_interface);
> phylink_rx_clk_stop_block(priv->phylink);
> }
>
> static void stmmac_clk_rx_i_release(struct stmmac_priv *priv)
> {
> phylink_rx_clk_stop_unblock(priv->phylink);
> + dwmac_serdes_power_off(priv);
> }
>
> /**
> @@ -4152,10 +4157,14 @@ static int stmmac_open(struct net_device *dev)
> if (ret)
> goto err_runtime_pm;
>
> - ret = __stmmac_open(dev, dma_conf);
> + ret = dwmac_serdes_init(priv);
> if (ret)
> goto err_disconnect_phy;
>
> + ret = __stmmac_open(dev, dma_conf);
> + if (ret)
> + goto err_serdes;
> +
> kfree(dma_conf);
>
> /* We may have called phylink_speed_down before */
> @@ -4163,6 +4172,8 @@ static int stmmac_open(struct net_device *dev)
>
> return ret;
>
> +err_serdes:
> + dwmac_serdes_exit(priv);
> err_disconnect_phy:
> phylink_disconnect_phy(priv->phylink);
> err_runtime_pm:
> @@ -4226,6 +4237,7 @@ static int stmmac_release(struct net_device *dev)
>
> __stmmac_release(dev);
>
> + dwmac_serdes_exit(priv);
> phylink_disconnect_phy(priv->phylink);
> pm_runtime_put(priv->device);
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
> index 2f826fe7229b..4d1902f3a58f 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
> @@ -1,12 +1,25 @@
> // SPDX-License-Identifier: GPL-2.0-only
> #include "stmmac.h"
> #include "stmmac_pcs.h"
> +#include "stmmac_serdes.h"
>
> static int dwmac_integrated_pcs_enable(struct phylink_pcs *pcs)
> {
> struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
> + struct stmmac_priv *priv = spcs->priv;
> + int ret;
>
> - stmmac_mac_irq_modify(spcs->priv, 0, spcs->int_mask);
> + ret = dwmac_serdes_power_on(priv);
> + if (ret)
> + return ret;
> +
> + if (spcs->interface != PHY_INTERFACE_MODE_NA) {
> + ret = dwmac_serdes_set_mode(priv, spcs->interface);
> + if (ret)
> + return ret;
> + }
> +
> + stmmac_mac_irq_modify(priv, 0, spcs->int_mask);
>
> return 0;
> }
> @@ -14,8 +27,11 @@ static int dwmac_integrated_pcs_enable(struct phylink_pcs *pcs)
> static void dwmac_integrated_pcs_disable(struct phylink_pcs *pcs)
> {
> struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
> + struct stmmac_priv *priv = spcs->priv;
>
> - stmmac_mac_irq_modify(spcs->priv, spcs->int_mask, 0);
> + stmmac_mac_irq_modify(priv, spcs->int_mask, 0);
> +
> + dwmac_serdes_power_off(priv);
> }
>
> static void dwmac_integrated_pcs_get_state(struct phylink_pcs *pcs,
> @@ -32,6 +48,15 @@ static int dwmac_integrated_pcs_config(struct phylink_pcs *pcs,
> bool permit_pause_to_mac)
> {
> struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
> + int ret;
> +
> + if (spcs->interface != interface) {
> + ret = dwmac_serdes_set_mode(spcs->priv, interface);
> + if (ret)
> + return ret;
> +
> + spcs->interface = interface;
> + }
>
> dwmac_ctrl_ane(spcs->base, 0, 1, spcs->priv->hw->reverse_sgmii_enable);
>
> @@ -71,6 +96,7 @@ int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
> u32 int_mask)
> {
> struct stmmac_pcs *spcs;
> + int ret;
>
> spcs = devm_kzalloc(priv->device, sizeof(*spcs), GFP_KERNEL);
> if (!spcs)
> @@ -81,6 +107,14 @@ int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
> spcs->int_mask = int_mask;
> spcs->pcs.ops = &dwmac_integrated_pcs_ops;
>
> + if (priv->plat->serdes) {
> + ret = dwmac_serdes_validate(priv, PHY_INTERFACE_MODE_SGMII);
> + if (ret)
> + dev_warn(priv->device,
> + "serdes does not support SGMII: %pe\n",
> + ERR_PTR(ret));
> + }
> +
> __set_bit(PHY_INTERFACE_MODE_SGMII, spcs->pcs.supported_interfaces);
>
> priv->integrated_pcs = spcs;
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> index c4e6b242d390..36bf75fdf478 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> @@ -53,6 +53,7 @@ struct stmmac_pcs {
> struct stmmac_priv *priv;
> void __iomem *base;
> u32 int_mask;
> + phy_interface_t interface;
> struct phylink_pcs pcs;
> };
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_serdes.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_serdes.c
> new file mode 100644
> index 000000000000..3003e1ae38d2
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_serdes.c
> @@ -0,0 +1,111 @@
> +#include <linux/phy/phy.h>
> +
> +#include "stmmac.h"
> +#include "stmmac_serdes.h"
> +
> +static phy_interface_t dwmac_serdes_phy_modes[] = {
> + PHY_INTERFACE_MODE_SGMII,
> + PHY_INTERFACE_MODE_1000BASEX,
> + PHY_INTERFACE_MODE_2500BASEX
> +};
> +
> +int dwmac_serdes_validate(struct stmmac_priv *priv, phy_interface_t interface)
> +{
> + return phy_validate(priv->plat->serdes, PHY_MODE_ETHERNET, interface,
> + NULL);
> +}
> +
> +int dwmac_serdes_init(struct stmmac_priv *priv)
> +{
> + size_t i;
> + int ret;
> +
> + if (!priv->plat->serdes)
> + return 0;
> +
> + /* Encourage good implementation of the SerDes PHY driver, so that
> + * we can discover which Ethernet modes the SerDes supports.
> + * Unfortunately, some implementations are noisy (bad), others
> + * require phy_set_speed() to select the correct speed first
> + * (which then reprograms the SerDes, negating the whole point of
> + * phy_validate().) Weed out these incompatible implementations.
> + */
> + for (i = 0; i < ARRAY_SIZE(dwmac_serdes_phy_modes); i++) {
> + ret = phy_validate(priv->plat->serdes, PHY_MODE_ETHERNET,
> + dwmac_serdes_phy_modes[i], NULL);
> + if (ret == 0 || ret == -EOPNOTSUPP)
> + break;
> + }
> +
> + if (ret == -EOPNOTSUPP)
> + dev_warn(priv->device,
> + "SerDes driver does not implement phy_validate()\n");
> + if (ret) {
> + /* The SerDes PHY failed validation, refuse to use it. */
> + dev_warn(priv->device,
> + "SerDes driver fails to validate SGMII, 1000BASE-X nor 2500BASE-X\n");
> + return -EINVAL;
> + }
> +
> + ret = phy_init(priv->plat->serdes);
> + if (ret)
> + dev_err(priv->device, "failed to initialize SerDes: %pe\n",
> + ERR_PTR(ret));
> +
> + return ret;
> +}
> +
> +int dwmac_serdes_power_on(struct stmmac_priv *priv)
> +{
> + int ret;
> +
> + ret = phy_power_on(priv->plat->serdes);
> + if (ret)
> + dev_err(priv->device, "failed to power on SerDes: %pe\n",
> + ERR_PTR(ret));
> +
> + return ret;
> +}
> +
> +int dwmac_serdes_init_mode(struct stmmac_priv *priv, phy_interface_t interface)
> +{
> + struct phy *serdes = priv->plat->serdes;
> +
> + if (phy_get_mode(serdes) == PHY_MODE_ETHERNET)
> + return 0;
> +
> + return dwmac_serdes_set_mode(priv, interface);
> +}
> +
> +int dwmac_serdes_set_mode(struct stmmac_priv *priv, phy_interface_t interface)
> +{
> + struct phy *serdes = priv->plat->serdes;
> + int ret;
> +
> + ret = phy_set_mode_ext(serdes, PHY_MODE_ETHERNET, interface);
> + if (ret)
> + dev_err(priv->device,
> + "failed to set SerDes mode %s: %pe\n",
> + phy_modes(interface), ERR_PTR(ret));
> +
> + return ret;
> +}
> +
> +void dwmac_serdes_power_off(struct stmmac_priv *priv)
> +{
> + int ret;
> +
> + ret = phy_power_off(priv->plat->serdes);
> + if (ret)
> + dev_err(priv->device, "failed to power off SerDes: %pe\n",
> + ERR_PTR(ret));
> +}
> +
> +void dwmac_serdes_exit(struct stmmac_priv *priv)
> +{
> + int ret = phy_exit(priv->plat->serdes);
> +
> + if (ret)
> + dev_err(priv->device, "failed to shutdown SerDes: %pe\n",
> + ERR_PTR(ret));
> +}
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_serdes.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_serdes.h
> new file mode 100644
> index 000000000000..a31e6c9e0570
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_serdes.h
> @@ -0,0 +1,16 @@
> +#ifndef STMMAC_SERDES_H
> +#define STMMAC_SERDES_H
> +
> +#include <linux/phy.h>
> +
> +struct stmmac_priv;
> +
> +int dwmac_serdes_validate(struct stmmac_priv *priv, phy_interface_t interface);
> +int dwmac_serdes_init(struct stmmac_priv *priv);
> +int dwmac_serdes_power_on(struct stmmac_priv *priv);
> +int dwmac_serdes_init_mode(struct stmmac_priv *priv, phy_interface_t interface);
> +int dwmac_serdes_set_mode(struct stmmac_priv *priv, phy_interface_t interface);
> +void dwmac_serdes_power_off(struct stmmac_priv *priv);
> +void dwmac_serdes_exit(struct stmmac_priv *priv);
> +
> +#endif
> diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
> index f1054b9c2d8a..4db506e5cf13 100644
> --- a/include/linux/stmmac.h
> +++ b/include/linux/stmmac.h
> @@ -193,6 +193,7 @@ enum dwmac_core_type {
> #define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY BIT(13)
>
> struct mac_device_info;
> +struct phy;
>
> struct plat_stmmacenet_data {
> enum dwmac_core_type core_type;
> @@ -222,6 +223,7 @@ struct plat_stmmacenet_data {
> * that phylink uses.
> */
> phy_interface_t phy_interface;
> + struct phy *serdes;
> struct stmmac_mdio_bus_data *mdio_bus_data;
> struct device_node *phy_node;
> struct fwnode_handle *port_node;
--
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^ permalink raw reply
* Re: [PATCH net-next 04/14] net: stmmac: wrap phylink's rx_clk_stop functions
From: Maxime Chevallier @ 2026-01-15 14:47 UTC (permalink / raw)
To: Russell King (Oracle), Andrew Lunn, Heiner Kallweit
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, Konrad Dybcio, linux-arm-kernel, linux-arm-msm,
linux-phy, linux-stm32, Maxime Coquelin, Mohd Ayaan Anwar,
Neil Armstrong, netdev, Paolo Abeni, Vinod Koul
In-Reply-To: <E1vg4vx-00000003SFz-1ldy@rmk-PC.armlinux.org.uk>
Hi Russell,
On 14/01/2026 18:45, Russell King (Oracle) wrote:
> With generic SerDes support, stmmac will need to do more work to ensure
> that clk_rx_i is running in all configurations. Rather than turn each
> site that calls phylink_rx_clk_stop_xxx() into a list of functions,
> move these to their own pair of functions so that they can be
> augmented at a single location.
>
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Maxime
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^ permalink raw reply
* Re: [PATCH v2 1/2] dt-bindings: phy: ti,phy-usb3: convert to DT schema
From: Rob Herring @ 2026-01-15 14:45 UTC (permalink / raw)
To: Charan Pedumuru
Cc: Vinod Koul, Neil Armstrong, Krzysztof Kozlowski, Conor Dooley,
Kishon Vijay Abraham I, linux-phy, devicetree, linux-kernel
In-Reply-To: <20260107-ti-phy-v2-1-a1ec27401fff@gmail.com>
On Wed, Jan 07, 2026 at 04:11:15PM +0000, Charan Pedumuru wrote:
> Convert TI PIPE3 PHY binding to DT schema.
> Changes during conversion:
> - Define a new pattern 'pciephy' to match nodes defined in DT.
> - Drop obsolete "id" property from the schema.
>
> Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com>
> ---
> .../devicetree/bindings/phy/ti,phy-usb3.yaml | 127 +++++++++++++++++++++
> 1 file changed, 127 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml b/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml
> new file mode 100644
> index 000000000000..41b3828723ae
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml
> @@ -0,0 +1,127 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/ti,phy-usb3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI PIPE3 PHY Module
> +
> +maintainers:
> + - Kishon Vijay Abraham I <kishon@ti.com>
> +
> +description:
> + The TI PIPE3 PHY is a high-speed SerDes (Serializer/Deserializer)
> + transceiver integrated in OMAP5, DRA7xx/AM57xx, and similar SoCs.
> + It supports multiple protocols (USB3, SATA, PCIe) using the PIPE3
> + interface standard, which defines a common physical layer for
> + high-speed serial interfaces.
> +
> +properties:
> + $nodename:
> + pattern: "^(pciephy|usb3phy|phy)(@[0-9a-f]+)?$"
Again, don't define your own patterns. Either update the .dts files to
use the established patterns (pcie-phy, usb3-phy, phy) or leave it
undefined here.
Plus the unit-address is not optional as 'reg' is not optional...
> +
> + compatible:
> + enum:
> + - ti,phy-usb3
> + - ti,phy-pipe3-sata
> + - ti,phy-pipe3-pcie
> + - ti,omap-usb3
Alphabetical order please.
> +
> + reg:
> + minItems: 2
> + maxItems: 3
> +
> + reg-names:
> + minItems: 2
> + maxItems: 3
> + items:
> + enum:
> + - phy_rx
> + - phy_tx
> + - pll_ctrl
Do this really need to be any order? Looks to me like this works for all
users in tree:
minItems: 2
items:
- const: phy_rx
- const: phy_tx
- const: pll_ctrl
> +
> + "#phy-cells":
> + const: 0
> +
> + clocks:
> + minItems: 2
> + maxItems: 7
> +
> + clock-names:
> + minItems: 2
> + maxItems: 7
> + items:
> + enum: [wkupclk, sysclk, refclk, dpll_ref,
> + dpll_ref_m2, phy-div, div-clk]
> +
> + syscon-phy-power:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Phandle/offset pair to system control module register for PHY
> + power on/off.
Needs constrants on the size:
items:
- items:
- description: phandle to ...
- description: offset of ...
> +
> + syscon-pllreset:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Phandle/offset pair to CTRL_CORE_SMA_SW_0 register containing
> + SATA_PLL_SOFT_RESET bit (SATA PHY only).
Same here.
> +
> + syscon-pcs:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Phandle/offset pair to system control module for writing PCS delay value.
Same here.
> +
> + ctrl-module:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle of control module for PHY power on.
> + deprecated: true
> +
> +dependencies:
> + syscon-pllreset:
> + properties:
> + compatible:
> + contains:
> + const: ti,phy-pipe3-sata
Usually we express this the other way around:
if:
properties:
compatible:
contains:
const: ti,phy-pipe3-sata
then:
required:
- syscon-pllreset
else:
properties:
syscon-pllreset: false
But that's slightly different as syscon-pllreset is optional for
ti,phy-pipe3-sata in your case. Seems like it should be required if
ti,phy-pipe3-sata?
> +
> +required:
> + - reg
> + - compatible
> + - reg-names
> + - "#phy-cells"
> + - clocks
> + - clock-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + /* TI PIPE3 USB3 PHY */
> + usb3phy@4a084400 {
> + compatible = "ti,phy-usb3";
> + reg = <0x4a084400 0x80>,
> + <0x4a084800 0x64>,
> + <0x4a084c00 0x40>;
> + reg-names = "phy_rx", "phy_tx", "pll_ctrl";
> + #phy-cells = <0>;
> + clocks = <&usb_phy_cm_clk32k>,
> + <&sys_clkin>,
> + <&usb_otg_ss_refclk960m>;
> + clock-names = "wkupclk", "sysclk", "refclk";
> + ctrl-module = <&omap_control_usb>;
> + };
> +
> + - |
> + /* TI PIPE3 SATA PHY */
> + phy@4a096000 {
> + compatible = "ti,phy-pipe3-sata";
> + reg = <0x4A096000 0x80>, /* phy_rx */
> + <0x4A096400 0x64>, /* phy_tx */
> + <0x4A096800 0x40>; /* pll_ctrl */
> + reg-names = "phy_rx", "phy_tx", "pll_ctrl";
> + clocks = <&sys_clkin1>, <&sata_ref_clk>;
> + clock-names = "sysclk", "refclk";
> + syscon-pllreset = <&scm_conf 0x3fc>;
> + #phy-cells = <0>;
> + };
> +...
>
> --
> 2.52.0
>
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^ permalink raw reply
* Re: [PATCH v2 3/4] phy: usb: Add driver for Canaan K230 USB 2.0 PHY
From: Jiayu Du @ 2026-01-15 14:35 UTC (permalink / raw)
To: Vinod Koul
Cc: conor, neil.armstrong, gregkh, robh, krzk+dt, conor+dt, pjw,
palmer, aou, alex, 18771902331, cyy, TroyMitchell988, kingxukai,
linux-phy, linux-usb, devicetree, linux-kernel, linux-riscv,
gaohan
In-Reply-To: <aWjYHK1cTj8Dbz2B@vaman>
On Thu, Jan 15, 2026 at 05:35:48PM +0530, Vinod Koul wrote:
> On 15-01-26, 14:42, Jiayu Du wrote:
>
> > +static struct phy *k230_usb_phy_xlate(struct device *dev,
> > + const struct of_phandle_args *args)
> > +{
> > + struct k230_usb_phy_global *global = dev_get_drvdata(dev);
> > + struct k230_usb_phy_instance *phy_inst;
> > + struct phy *phy;
> > +
> > + if (args->args[0] >= MAX_PHYS)
> > + return ERR_PTR(-EINVAL);
> > +
> > + phy_inst = devm_kzalloc(dev, sizeof(*phy_inst), GFP_KERNEL);
> > + if (!phy_inst)
> > + return ERR_PTR(-ENOMEM);
> > +
> > + phy_inst->global = global;
> > + phy_inst->index = args->args[0];
> > +
> > + phy = devm_phy_create(dev, NULL, &k230_usb_phy_ops);
> > + if (IS_ERR(phy))
> > + return ERR_PTR(PTR_ERR(phy));
> > +
> > + phy_set_drvdata(phy, phy_inst);
>
> This seems wrong place, why is this not done in the driver probe?
You are right, creating phy instances in the xlate function is not
the right place. I will move the allocation and devm_phy_creat to
the probe phase to create both instances.
> > + global->reg_test_offset[0] = 0x70;
> > + global->reg_ctl_offset[0] = 0xb0;
> > + global->reg_test_offset[1] = 0x90;
> > + global->reg_ctl_offset[1] = 0xb8;
>
> Where are these magic values coming from?
These offsets are from K230 Technical Reference Manual section 12.6.4.2.
The TRM is here[1]. I will define them as macros with descriptive names.
Link:
https://kendryte-download.canaan-creative.com/developer/k230/HDK/K230%E7%A1%AC%E4%BB%B6%E6%96%87%E6%A1%A3/K230_Technical_Reference_Manual_V0.3.1_20241118.pdf[1]
I will send v2 with these changes soon.
Regards,
Jiayu Du
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^ permalink raw reply
* Re: [PATCH 25/27] phy: ti: phy-j721e-wiz: convert from divider_round_rate() to divider_determine_rate()
From: Brian Masney @ 2026-01-15 14:18 UTC (permalink / raw)
To: Vinod Koul
Cc: Michael Turquette, Stephen Boyd, linux-clk, linux-kernel,
Neil Armstrong, linux-phy
In-Reply-To: <aWelbtaZjS4SZGQO@vaman>
Hi Vinod,
On Wed, Jan 14, 2026 at 07:47:18PM +0530, Vinod Koul wrote:
> On 08-01-26, 16:16, Brian Masney wrote:
> > The divider_round_rate() function is now deprecated, so let's migrate
> > to divider_determine_rate() instead so that this deprecated API can be
> > removed.
> >
> > Note that when the main function itself was migrated to use
> > determine_rate, this was mistakenly converted to:
> >
> > req->rate = divider_round_rate(...)
> >
> > This is invalid in the case when an error occurs since it can set the
> > rate to a negative value.
>
> Acked-by: Vinod Koul <vkoul@kernel.org>
Thanks for the Acked-by.
However, this patch depends on this other series of mine that's merged
into your phy tree:
https://lore.kernel.org/linux-clk/176661322399.4169.14248756511703978007@lazor/
Stephen asked for an Acked-by for that series or an immutable branch.
This will allow us to remove round_rate from the clk core.
I also have a small series to post that's dependent on all of this that
lets us get rid of the noop determine_rate implementations that only
'return 0'. I haven't posted that because of the dependencies.
Brian
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^ permalink raw reply
* Re: [PATCH v2 3/4] phy: usb: Add driver for Canaan K230 USB 2.0 PHY
From: Vinod Koul @ 2026-01-15 12:05 UTC (permalink / raw)
To: Jiayu Du
Cc: conor, neil.armstrong, gregkh, robh, krzk+dt, conor+dt, pjw,
palmer, aou, alex, 18771902331, cyy, TroyMitchell988, kingxukai,
linux-phy, linux-usb, devicetree, linux-kernel, linux-riscv,
gaohan
In-Reply-To: <20260115064223.21926-4-jiayu.riscv@isrc.iscas.ac.cn>
On 15-01-26, 14:42, Jiayu Du wrote:
> +static struct phy *k230_usb_phy_xlate(struct device *dev,
> + const struct of_phandle_args *args)
> +{
> + struct k230_usb_phy_global *global = dev_get_drvdata(dev);
> + struct k230_usb_phy_instance *phy_inst;
> + struct phy *phy;
> +
> + if (args->args[0] >= MAX_PHYS)
> + return ERR_PTR(-EINVAL);
> +
> + phy_inst = devm_kzalloc(dev, sizeof(*phy_inst), GFP_KERNEL);
> + if (!phy_inst)
> + return ERR_PTR(-ENOMEM);
> +
> + phy_inst->global = global;
> + phy_inst->index = args->args[0];
> +
> + phy = devm_phy_create(dev, NULL, &k230_usb_phy_ops);
> + if (IS_ERR(phy))
> + return ERR_PTR(PTR_ERR(phy));
> +
> + phy_set_drvdata(phy, phy_inst);
This seems wrong place, why is this not done in the driver probe?
> +
> + return phy;
> +}
> +
> +static int k230_usb_phy_probe(struct platform_device *pdev)
> +{
> + struct k230_usb_phy_global *global;
> + struct device *dev = &pdev->dev;
> + struct phy_provider *provider;
> +
> + global = devm_kzalloc(dev, sizeof(*global), GFP_KERNEL);
> + if (!global)
> + return -ENOMEM;
> + dev_set_drvdata(dev, global);
> +
> + global->base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(global->base))
> + return dev_err_probe(dev, PTR_ERR(global->base),
> + "ioremap failed\n");
> +
> + global->reg_test_offset[0] = 0x70;
> + global->reg_ctl_offset[0] = 0xb0;
> + global->reg_test_offset[1] = 0x90;
> + global->reg_ctl_offset[1] = 0xb8;
Where are these magic values coming from?
--
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^ permalink raw reply
* Re: [PATCH v2 2/4] dt-bindings: usb: dwc2: Add support for Canaan K230 SoC
From: Jiayu Du @ 2026-01-15 11:39 UTC (permalink / raw)
To: Rob Herring (Arm)
Cc: vkoul, linux-usb, conor+dt, krzk+dt, linux-kernel, cyy, alex, pjw,
kingxukai, conor, aou, linux-riscv, palmer, neil.armstrong,
gaohan, linux-phy, gregkh, 18771902331, devicetree,
TroyMitchell988
In-Reply-To: <176846580373.38125.3306033410225962520.robh@kernel.org>
On Thu, Jan 15, 2026 at 02:30:03AM -0600, Rob Herring (Arm) wrote:
>
> On Thu, 15 Jan 2026 14:42:20 +0800, Jiayu Du wrote:
> > Add 'canaan,k230-usb' compatible string with 'snps,dwc2' as fallback
> > for the DWC2 IP which is used by Canaan K230.
> >
> > Signed-off-by: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>
> > ---
> > Documentation/devicetree/bindings/usb/dwc2.yaml | 3 +++
> > 1 file changed, 3 insertions(+)
> >
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/canaan,k230-usb-phy.example.dtb: usb-phy@91585000 (canaan,k230-usb-phy): reg: [[0, 2438483968], [0, 1024]] is too long
> from schema $id: http://devicetree.org/schemas/phy/canaan,k230-usb-phy.yaml
>
> doc reference errors (make refcheckdocs):
>
> See https://patchwork.kernel.org/project/devicetree/patch/20260115064223.21926-3-jiayu.riscv@isrc.iscas.ac.cn
>
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your schema.
I will run the make dt_binding_check, and then fix it in v3.
Regards,
Jiayu Du
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^ permalink raw reply
* Re: [PATCH 3/5] phy: tegra: xusb: Fix ordering issue when switching roles on USB2 ports
From: Diogo Ivo @ 2026-01-15 11:06 UTC (permalink / raw)
To: Jon Hunter, Mathias Nyman, Greg Kroah-Hartman, Thierry Reding,
JC Kuo, Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-usb, linux-tegra, linux-kernel, linux-phy, devicetree
In-Reply-To: <86cd3ff0-1609-44cb-911c-f0e97652ca1b@nvidia.com>
Hi Jonathan,
On 1/13/26 11:56, Jon Hunter wrote:
>
> On 04/12/2025 21:27, Diogo Ivo wrote:
>> The current implementation of USB2 role switching on Tegra relies on
>> whichever the previous USB controller driver was using the PHY to first
>> "yield" it back to USB_ROLE_NONE before the next controller configures
>> it for the new role. However, no mechanism to guarantee this ordering
>> was implemented, and currently, in the general case, the configuration
>> functions tegra_xhci_id_work() and tegra_xudc_usb_role_sw_work() end up
>> running in the same order regardless of the transition being HOST->DEVICE
>> or DEVICE->HOST, leading to one of these transitions ending up in a
>> non-working state due to the new configuration being clobbered by the
>> previous controller driver setting USB_ROLE_NONE after the fact.
>>
>> Fix this by introducing a helper that waits for the USB2 port’s current
>> role to become USB_ROLE_NONE and add it in the configuration functions
>> above before setting the role to either USB_ROLE_HOST or
>> USB_ROLE_DEVICE. The specific parameters of the helper function are
>> choices that seem reasonable in my testing and have no other basis.
>
> This is no information here about why 6 * 50/60us is deemed to be
> sufficient? May be it is, but a comment would be nice.
I missed this review comment and I'm not sure what you mean here. Do you
want me to comment on the commit message on how I chose these
parameters? If so it's as stated in the current message, I simply tested
with these parameters and it worked and I really have no better basis
for choosing them. If you mean adding a comment in the code I can do
that for v2.
Thanks,
Diogo
>> This was tested on a Tegra210 platform (Smaug). However, due to the
>> similar
>> approach in Tegra186 it is likely that not only this problem exists there
>> but that this patch also fixes it.
>>
>> Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
>> ---
>> drivers/phy/tegra/xusb.c | 23 +++++++++++++++++++++++
>> drivers/usb/gadget/udc/tegra-xudc.c | 4 ++++
>> drivers/usb/host/xhci-tegra.c | 15 ++++++++++-----
>> include/linux/phy/tegra/xusb.h | 1 +
>> 4 files changed, 38 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c
>> index c89df95aa6ca..e05c3f2d1421 100644
>> --- a/drivers/phy/tegra/xusb.c
>> +++ b/drivers/phy/tegra/xusb.c
>> @@ -740,6 +740,29 @@ static void
>> tegra_xusb_parse_usb_role_default_mode(struct tegra_xusb_port *port)
>> }
>> }
>> +bool tegra_xusb_usb2_port_wait_role_none(struct tegra_xusb_padctl
>> *padctl, int index)
>> +{
>> + struct tegra_xusb_usb2_port *usb2 =
>> tegra_xusb_find_usb2_port(padctl,
>> + index);
>> + int retries = 5;
>> +
>> + if (!usb2) {
>> + dev_err(&usb2->base.dev, "no port found for USB2 lane %u\n",
>> index);
>
> This appears to be a bug. If !usb2 then dereference usb2->base anyway.
>
>
>> + return false;
>> + }
>> +
>> + do {
>> + if (usb2->role == USB_ROLE_NONE)
>> + return true;
>> +
>> + usleep_range(50, 60);
>> + } while (retries--);
>> +
>> + dev_err(&usb2->base.dev, "timed out waiting for USB_ROLE_NONE");
>> +
>> + return false;
>> +}
>> +
>> static int tegra_xusb_usb2_port_parse_dt(struct tegra_xusb_usb2_port
>> *usb2)
>> {
>> struct tegra_xusb_port *port = &usb2->base;
>> diff --git a/drivers/usb/gadget/udc/tegra-xudc.c b/drivers/usb/gadget/
>> udc/tegra-xudc.c
>> index 0c38fc37b6e6..72d725659e5f 100644
>> --- a/drivers/usb/gadget/udc/tegra-xudc.c
>> +++ b/drivers/usb/gadget/udc/tegra-xudc.c
>> @@ -698,8 +698,12 @@ static void tegra_xudc_restore_port_speed(struct
>> tegra_xudc *xudc)
>> static void tegra_xudc_device_mode_on(struct tegra_xudc *xudc)
>> {
>> + int port = tegra_xusb_padctl_get_port_number(xudc->curr_utmi_phy);
>> int err;
>> + if (!tegra_xusb_usb2_port_wait_role_none(xudc->padctl, port))
>> + return;
>> +
>> pm_runtime_get_sync(xudc->dev);
>> tegra_phy_xusb_utmi_pad_power_on(xudc->curr_utmi_phy);
>> diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-
>> tegra.c
>> index 9c69fccdc6e8..9944593166a3 100644
>> --- a/drivers/usb/host/xhci-tegra.c
>> +++ b/drivers/usb/host/xhci-tegra.c
>> @@ -1352,18 +1352,23 @@ static void tegra_xhci_id_work(struct
>> work_struct *work)
>> struct tegra_xusb_mbox_msg msg;
>> struct phy *phy = tegra_xusb_get_phy(tegra, "usb2",
>> tegra->otg_usb2_port);
>> + enum usb_role role = USB_ROLE_NONE;
>> u32 status;
>> int ret;
>> dev_dbg(tegra->dev, "host mode %s\n", str_on_off(tegra-
>> >host_mode));
>> - mutex_lock(&tegra->lock);
>
> Extra blank line here.
>
>> - if (tegra->host_mode)
>> - phy_set_mode_ext(phy, PHY_MODE_USB_OTG, USB_ROLE_HOST);
>> - else
>> - phy_set_mode_ext(phy, PHY_MODE_USB_OTG, USB_ROLE_NONE);
>> + if (tegra->host_mode) {
>> + if (!tegra_xusb_usb2_port_wait_role_none(tegra->padctl,
>> + tegra->otg_usb2_port))
>> + return;
>> + role = USB_ROLE_HOST;
>> + }
>> +
>> + mutex_lock(&tegra->lock);
>> + phy_set_mode_ext(phy, PHY_MODE_USB_OTG, role);
>> mutex_unlock(&tegra->lock);
>
> I am trying to understand why you opted to implement it this way around
> and not add the wait loop after setting to the mode to USB_ROLE_NONE in
> the original code all within the context of the mutex?
>
> Thanks
> Jon
>
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^ permalink raw reply
* Re: [PATCH net-next 03/14] phy: qcom-sgmii-eth: add .set_mode() and .validate() methods
From: kernel test robot @ 2026-01-15 10:23 UTC (permalink / raw)
To: Russell King (Oracle), Andrew Lunn, Heiner Kallweit
Cc: llvm, oe-kbuild-all, Alexandre Torgue, Eric Dumazet,
Jakub Kicinski, Konrad Dybcio, linux-arm-kernel, linux-arm-msm,
linux-phy, linux-stm32, Maxime Coquelin, Mohd Ayaan Anwar,
Neil Armstrong, netdev, Paolo Abeni, Vinod Koul
In-Reply-To: <E1vg4vs-00000003SFt-1Fje@rmk-PC.armlinux.org.uk>
Hi Russell,
kernel test robot noticed the following build errors:
[auto build test ERROR on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/Russell-King-Oracle/net-stmmac-qcom-ethqos-remove-mac_base/20260115-054728
base: net-next/main
patch link: https://lore.kernel.org/r/E1vg4vs-00000003SFt-1Fje%40rmk-PC.armlinux.org.uk
patch subject: [PATCH net-next 03/14] phy: qcom-sgmii-eth: add .set_mode() and .validate() methods
config: powerpc-randconfig-002-20260115 (https://download.01.org/0day-ci/archive/20260115/202601151700.IjgxseKd-lkp@intel.com/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 9b8addffa70cee5b2acc5454712d9cf78ce45710)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260115/202601151700.IjgxseKd-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601151700.IjgxseKd-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/phy/qualcomm/phy-qcom-sgmii-eth.c:294:17: error: use of undeclared identifier 'PHY_INTERFACE_MODE_SGMII'
294 | if (submode == PHY_INTERFACE_MODE_SGMII ||
| ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/phy/qualcomm/phy-qcom-sgmii-eth.c:295:17: error: use of undeclared identifier 'PHY_INTERFACE_MODE_1000BASEX'
295 | submode == PHY_INTERFACE_MODE_1000BASEX)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/phy/qualcomm/phy-qcom-sgmii-eth.c:298:17: error: use of undeclared identifier 'PHY_INTERFACE_MODE_2500BASEX'
298 | if (submode == PHY_INTERFACE_MODE_2500BASEX)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
3 errors generated.
vim +/PHY_INTERFACE_MODE_SGMII +294 drivers/phy/qualcomm/phy-qcom-sgmii-eth.c
288
289 static int qcom_dwmac_sgmii_phy_speed(enum phy_mode mode, int submode)
290 {
291 if (mode != PHY_MODE_ETHERNET)
292 return -EINVAL;
293
> 294 if (submode == PHY_INTERFACE_MODE_SGMII ||
> 295 submode == PHY_INTERFACE_MODE_1000BASEX)
296 return SPEED_1000;
297
> 298 if (submode == PHY_INTERFACE_MODE_2500BASEX)
299 return SPEED_2500;
300
301 return -EINVAL;
302 }
303
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* Re: [PATCH net-next 03/14] phy: qcom-sgmii-eth: add .set_mode() and .validate() methods
From: kernel test robot @ 2026-01-15 10:11 UTC (permalink / raw)
To: Russell King (Oracle), Andrew Lunn, Heiner Kallweit
Cc: oe-kbuild-all, Alexandre Torgue, Eric Dumazet, Jakub Kicinski,
Konrad Dybcio, linux-arm-kernel, linux-arm-msm, linux-phy,
linux-stm32, Maxime Coquelin, Mohd Ayaan Anwar, Neil Armstrong,
netdev, Paolo Abeni, Vinod Koul
In-Reply-To: <E1vg4vs-00000003SFt-1Fje@rmk-PC.armlinux.org.uk>
Hi Russell,
kernel test robot noticed the following build errors:
[auto build test ERROR on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/Russell-King-Oracle/net-stmmac-qcom-ethqos-remove-mac_base/20260115-054728
base: net-next/main
patch link: https://lore.kernel.org/r/E1vg4vs-00000003SFt-1Fje%40rmk-PC.armlinux.org.uk
patch subject: [PATCH net-next 03/14] phy: qcom-sgmii-eth: add .set_mode() and .validate() methods
config: microblaze-randconfig-r073-20260115 (https://download.01.org/0day-ci/archive/20260115/202601151714.J1BAilHy-lkp@intel.com/config)
compiler: microblaze-linux-gcc (GCC) 14.3.0
smatch version: v0.5.0-8985-g2614ff1a
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260115/202601151714.J1BAilHy-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601151714.J1BAilHy-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/phy/qualcomm/phy-qcom-sgmii-eth.c: In function 'qcom_dwmac_sgmii_phy_speed':
>> drivers/phy/qualcomm/phy-qcom-sgmii-eth.c:294:24: error: 'PHY_INTERFACE_MODE_SGMII' undeclared (first use in this function)
294 | if (submode == PHY_INTERFACE_MODE_SGMII ||
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/phy/qualcomm/phy-qcom-sgmii-eth.c:294:24: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/phy/qualcomm/phy-qcom-sgmii-eth.c:295:24: error: 'PHY_INTERFACE_MODE_1000BASEX' undeclared (first use in this function)
295 | submode == PHY_INTERFACE_MODE_1000BASEX)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/phy/qualcomm/phy-qcom-sgmii-eth.c:298:24: error: 'PHY_INTERFACE_MODE_2500BASEX' undeclared (first use in this function)
298 | if (submode == PHY_INTERFACE_MODE_2500BASEX)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +/PHY_INTERFACE_MODE_SGMII +294 drivers/phy/qualcomm/phy-qcom-sgmii-eth.c
288
289 static int qcom_dwmac_sgmii_phy_speed(enum phy_mode mode, int submode)
290 {
291 if (mode != PHY_MODE_ETHERNET)
292 return -EINVAL;
293
> 294 if (submode == PHY_INTERFACE_MODE_SGMII ||
> 295 submode == PHY_INTERFACE_MODE_1000BASEX)
296 return SPEED_1000;
297
> 298 if (submode == PHY_INTERFACE_MODE_2500BASEX)
299 return SPEED_2500;
300
301 return -EINVAL;
302 }
303
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* RE: [PATCH 1/3] dt-bindings: phy: aspeed: Document AST2700 USB3.0 PHY
From: Ryan Chen @ 2026-01-15 10:03 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Joel Stanley, Andrew Jeffery, Philipp Zabel,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
In-Reply-To: <20260115-tricky-invaluable-snake-abec06@quoll>
> Subject: Re: [PATCH 1/3] dt-bindings: phy: aspeed: Document AST2700 USB3.0
> PHY
>
> On Wed, Jan 14, 2026 at 03:13:10PM +0800, Ryan Chen wrote:
> > Document AST2700 USB3.2 PHY. This IP is connected between
> > USB3 controller and PHY module.
> >
> > Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> > ---
> > .../bindings/phy/aspeed,ast2700-usb3-phy.yaml | 50
> ++++++++++++++++++++++
> > 1 file changed, 50 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/phy/aspeed,ast2700-usb3-phy.yaml
> > b/Documentation/devicetree/bindings/phy/aspeed,ast2700-usb3-phy.yaml
> > new file mode 100644
> > index 000000000000..83da224d99b1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/aspeed,ast2700-usb3-phy.ya
> > +++ ml
> > @@ -0,0 +1,50 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/aspeed,ast2700-usb3-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: ASPEED AST2700 USB 3.2 PHY
> > +
> > +maintainers:
> > + - Ryan Chen <ryan_chen@aspeedtech.com>
> > +
> > +properties:
> > + compatible:
> > + const: aspeed,ast2700-usb3-phy
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
> > + maxItems: 1
> > + description: USB 3.0 PHY clock
>
> Drop description, obvious, you just repeated the block name\
Will remove
>
> > +
> > + resets:
> > + maxItems: 1
> > + description: USB 3.0 PHY reset
>
> Ditto
Will remove
>
> > +
> > + '#phy-cells':
> > + const: 0
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - resets
> > + - '#phy-cells'
>
Thanks your review.
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
>
> Best regards,
> Krzysztof
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* RE: [PATCH 2/3] phy: add AST2700 usb3.2 phy driver
From: Ryan Chen @ 2026-01-15 10:02 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Joel Stanley, Andrew Jeffery, Philipp Zabel,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
In-Reply-To: <20260115-jaguarundi-of-optimal-fruition-09d32e@quoll>
> Subject: Re: [PATCH 2/3] phy: add AST2700 usb3.2 phy driver
>
> On Wed, Jan 14, 2026 at 03:13:11PM +0800, Ryan Chen wrote:
> > Add AST2700 USB3.2 PHY driver support.
> >
> > Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> > ---
> > drivers/phy/aspeed/Kconfig | 13 ++
> > drivers/phy/aspeed/Makefile | 2 +
> > drivers/phy/aspeed/phy-aspeed-usb3.c | 236
> > +++++++++++++++++++++++++++++++++++
> > 3 files changed, 251 insertions(+)
> >
> > diff --git a/drivers/phy/aspeed/Kconfig b/drivers/phy/aspeed/Kconfig
> > new file mode 100644 index 000000000000..93bb5a913633
> > --- /dev/null
> > +++ b/drivers/phy/aspeed/Kconfig
> > @@ -0,0 +1,13 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> > +
> > +#
> > +# PHY drivers for ASPEED
> > +#
> > +
> > +config PHY_ASPEED_USB3
> > + tristate "ASPEED USB3 PHY driver"
> > + select GENERIC_PHY
> > + depends on ARCH_ASPEED
>
> COMPILE_TEST
Will update
depends on (ARCH_ASPEED || COMPILE_TEST)
>
> > + default n
>
> It's the default, so maybe you meant 'ARCH_ASPEED'?
Will remove default n
Thanks your review.
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* Re: [PATCH 1/3] dt-bindings: phy: aspeed: Document AST2700 USB3.0 PHY
From: Krzysztof Kozlowski @ 2026-01-15 9:54 UTC (permalink / raw)
To: Ryan Chen
Cc: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Joel Stanley, Andrew Jeffery, Philipp Zabel,
linux-phy, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
In-Reply-To: <20260114-upstream_usb3phy-v1-1-2e59590be2d7@aspeedtech.com>
On Wed, Jan 14, 2026 at 03:13:10PM +0800, Ryan Chen wrote:
> Document AST2700 USB3.2 PHY. This IP is connected between
> USB3 controller and PHY module.
>
> Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> .../bindings/phy/aspeed,ast2700-usb3-phy.yaml | 50 ++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/phy/aspeed,ast2700-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/aspeed,ast2700-usb3-phy.yaml
> new file mode 100644
> index 000000000000..83da224d99b1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/aspeed,ast2700-usb3-phy.yaml
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/aspeed,ast2700-usb3-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ASPEED AST2700 USB 3.2 PHY
> +
> +maintainers:
> + - Ryan Chen <ryan_chen@aspeedtech.com>
> +
> +properties:
> + compatible:
> + const: aspeed,ast2700-usb3-phy
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> + description: USB 3.0 PHY clock
Drop description, obvious, you just repeated the block name
> +
> + resets:
> + maxItems: 1
> + description: USB 3.0 PHY reset
Ditto
> +
> + '#phy-cells':
> + const: 0
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - resets
> + - '#phy-cells'
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
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* Re: [PATCH 2/3] phy: add AST2700 usb3.2 phy driver
From: Krzysztof Kozlowski @ 2026-01-15 9:53 UTC (permalink / raw)
To: Ryan Chen
Cc: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Joel Stanley, Andrew Jeffery, Philipp Zabel,
linux-phy, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
In-Reply-To: <20260114-upstream_usb3phy-v1-2-2e59590be2d7@aspeedtech.com>
On Wed, Jan 14, 2026 at 03:13:11PM +0800, Ryan Chen wrote:
> Add AST2700 USB3.2 PHY driver support.
>
> Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> drivers/phy/aspeed/Kconfig | 13 ++
> drivers/phy/aspeed/Makefile | 2 +
> drivers/phy/aspeed/phy-aspeed-usb3.c | 236 +++++++++++++++++++++++++++++++++++
> 3 files changed, 251 insertions(+)
>
> diff --git a/drivers/phy/aspeed/Kconfig b/drivers/phy/aspeed/Kconfig
> new file mode 100644
> index 000000000000..93bb5a913633
> --- /dev/null
> +++ b/drivers/phy/aspeed/Kconfig
> @@ -0,0 +1,13 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +
> +#
> +# PHY drivers for ASPEED
> +#
> +
> +config PHY_ASPEED_USB3
> + tristate "ASPEED USB3 PHY driver"
> + select GENERIC_PHY
> + depends on ARCH_ASPEED
COMPILE_TEST
> + default n
It's the default, so maybe you meant 'ARCH_ASPEED'?
Best regards,
Krzysztof
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* Re: [PATCH v3 net-next 05/10] phy: add phy_get_rx_polarity() and phy_get_tx_polarity()
From: Vladimir Oltean @ 2026-01-15 9:39 UTC (permalink / raw)
To: Paolo Abeni
Cc: Bjørn Mork, netdev, devicetree, linux-phy, linux-kernel,
linux-arm-kernel, linux-mediatek, Daniel Golle, Horatiu Vultur,
Andrew Lunn, Heiner Kallweit, Russell King, David S. Miller,
Eric Dumazet, Jakub Kicinski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Neil Armstrong, Matthias Brugger,
AngeloGioacchino Del Regno, Eric Woudstra, Marek Behún,
Lee Jones, Patrice Chotard, Vinod Koul
In-Reply-To: <173d1032-386c-4188-933c-ca91ce36468f@redhat.com>
Hi Paolo,
On Thu, Jan 15, 2026 at 10:37:33AM +0100, Paolo Abeni wrote:
> On 1/15/26 10:34 AM, Paolo Abeni wrote:
> > On 1/14/26 2:10 PM, Vinod Koul wrote:
> >> On 11-01-26, 16:15, Vladimir Oltean wrote:
> >>> On Sun, Jan 11, 2026 at 12:53:15PM +0100, Bjørn Mork wrote:
> >>>> Vladimir Oltean <vladimir.oltean@nxp.com> writes:
> >>>>
> >>>>> Add helpers in the generic PHY folder which can be used using 'select
> >>>>> GENERIC_PHY_COMMON_PROPS' from Kconfig
> >>>>
> >>>> The code looks good to me now.
> >>>>
> >>>> But renaming stuff is hard. Leftover old config symbol in the commit
> >>>> description here. Could be fixed up on merge, maybe?
> >>>>
> >>>>
> >>>> Bjørn
> >>>
> >>> This is unfortunate. I'll let Vinot comment on the preferred approach,
> >>> although I also wouldn't prefer resending to fix a minor commit message
> >>> mistake. Thanks for spotting and for the review in general.
> >>
> >> Yes fixed that while applying
> >
> > Could you please share a stable branch/tag, so that we can pull patches
> > 1-5 into the net-next tree from there?
>
> Vladimir, could you please re-post patches 1-5 after that Vinod shares
> the above? So that we don't keep in PW the dangling (current) series.
>
> Thanks,
>
> Paolo
>
Vinod did share the PR:
https://lore.kernel.org/netdev/aWeXvFcGNK5T6As9@vaman/
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* Re: [PATCH v3 net-next 05/10] phy: add phy_get_rx_polarity() and phy_get_tx_polarity()
From: Paolo Abeni @ 2026-01-15 9:37 UTC (permalink / raw)
To: Vladimir Oltean
Cc: Bjørn Mork, netdev, devicetree, linux-phy, linux-kernel,
linux-arm-kernel, linux-mediatek, Daniel Golle, Horatiu Vultur,
Andrew Lunn, Heiner Kallweit, Russell King, David S. Miller,
Eric Dumazet, Jakub Kicinski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Neil Armstrong, Matthias Brugger,
AngeloGioacchino Del Regno, Eric Woudstra, Marek Behún,
Lee Jones, Patrice Chotard, Vinod Koul
In-Reply-To: <33ff22b4-ead6-4703-8ded-1be5b5d0ead0@redhat.com>
On 1/15/26 10:34 AM, Paolo Abeni wrote:
> On 1/14/26 2:10 PM, Vinod Koul wrote:
>> On 11-01-26, 16:15, Vladimir Oltean wrote:
>>> On Sun, Jan 11, 2026 at 12:53:15PM +0100, Bjørn Mork wrote:
>>>> Vladimir Oltean <vladimir.oltean@nxp.com> writes:
>>>>
>>>>> Add helpers in the generic PHY folder which can be used using 'select
>>>>> GENERIC_PHY_COMMON_PROPS' from Kconfig
>>>>
>>>> The code looks good to me now.
>>>>
>>>> But renaming stuff is hard. Leftover old config symbol in the commit
>>>> description here. Could be fixed up on merge, maybe?
>>>>
>>>>
>>>> Bjørn
>>>
>>> This is unfortunate. I'll let Vinot comment on the preferred approach,
>>> although I also wouldn't prefer resending to fix a minor commit message
>>> mistake. Thanks for spotting and for the review in general.
>>
>> Yes fixed that while applying
>
> Could you please share a stable branch/tag, so that we can pull patches
> 1-5 into the net-next tree from there?
Vladimir, could you please re-post patches 1-5 after that Vinod shares
the above? So that we don't keep in PW the dangling (current) series.
Thanks,
Paolo
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* Re: [PATCH v3 net-next 05/10] phy: add phy_get_rx_polarity() and phy_get_tx_polarity()
From: Paolo Abeni @ 2026-01-15 9:34 UTC (permalink / raw)
To: Vinod Koul, Vladimir Oltean
Cc: Bjørn Mork, netdev, devicetree, linux-phy, linux-kernel,
linux-arm-kernel, linux-mediatek, Daniel Golle, Horatiu Vultur,
Andrew Lunn, Heiner Kallweit, Russell King, David S. Miller,
Eric Dumazet, Jakub Kicinski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Neil Armstrong, Matthias Brugger,
AngeloGioacchino Del Regno, Eric Woudstra, Marek Behún,
Lee Jones, Patrice Chotard
In-Reply-To: <aWeV1CEaEMvImS-9@vaman>
On 1/14/26 2:10 PM, Vinod Koul wrote:
> On 11-01-26, 16:15, Vladimir Oltean wrote:
>> On Sun, Jan 11, 2026 at 12:53:15PM +0100, Bjørn Mork wrote:
>>> Vladimir Oltean <vladimir.oltean@nxp.com> writes:
>>>
>>>> Add helpers in the generic PHY folder which can be used using 'select
>>>> GENERIC_PHY_COMMON_PROPS' from Kconfig
>>>
>>> The code looks good to me now.
>>>
>>> But renaming stuff is hard. Leftover old config symbol in the commit
>>> description here. Could be fixed up on merge, maybe?
>>>
>>>
>>> Bjørn
>>
>> This is unfortunate. I'll let Vinot comment on the preferred approach,
>> although I also wouldn't prefer resending to fix a minor commit message
>> mistake. Thanks for spotting and for the review in general.
>
> Yes fixed that while applying
Could you please share a stable branch/tag, so that we can pull patches
1-5 into the net-next tree from there?
Thanks!
Paolo
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* Re: [PATCH v2 2/4] dt-bindings: usb: dwc2: Add support for Canaan K230 SoC
From: Rob Herring (Arm) @ 2026-01-15 8:30 UTC (permalink / raw)
To: Jiayu Du
Cc: vkoul, linux-usb, conor+dt, krzk+dt, linux-kernel, cyy, alex, pjw,
kingxukai, conor, aou, linux-riscv, palmer, neil.armstrong,
gaohan, linux-phy, gregkh, 18771902331, devicetree,
TroyMitchell988
In-Reply-To: <20260115064223.21926-3-jiayu.riscv@isrc.iscas.ac.cn>
On Thu, 15 Jan 2026 14:42:20 +0800, Jiayu Du wrote:
> Add 'canaan,k230-usb' compatible string with 'snps,dwc2' as fallback
> for the DWC2 IP which is used by Canaan K230.
>
> Signed-off-by: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>
> ---
> Documentation/devicetree/bindings/usb/dwc2.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/canaan,k230-usb-phy.example.dtb: usb-phy@91585000 (canaan,k230-usb-phy): reg: [[0, 2438483968], [0, 1024]] is too long
from schema $id: http://devicetree.org/schemas/phy/canaan,k230-usb-phy.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.kernel.org/project/devicetree/patch/20260115064223.21926-3-jiayu.riscv@isrc.iscas.ac.cn
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
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