* Re: [PATCH net-next] doc: generic phy: update generic PHY documentation
From: Russell King (Oracle) @ 2026-02-12 10:05 UTC (permalink / raw)
To: Vladimir Oltean
Cc: Vinod Koul, Neil Armstrong, Jonathan Corbet, linux-doc, linux-phy
In-Reply-To: <aY2lFTIALH7qEJmM@shell.armlinux.org.uk>
On Thu, Feb 12, 2026 at 10:01:57AM +0000, Russell King (Oracle) wrote:
> On Thu, Feb 12, 2026 at 11:13:32AM +0200, Vladimir Oltean wrote:
> > Also thinking out loud, we could do something else - introduce something
> > similar in spirit to CONFIG_DEBUG_TEST_DRIVER_REMOVE, which would be a
> > debug option that sees what power state the PHY is in during the
> > phy_set_mode_ext() call, flips it before calling ->set_mode() (calling
> > either ->power_on() or ->power_off()), and restores it after the call.
> >
> > Having this option should also give PHY provider developers a quick way
> > of testing both calling orders without modifying the consumers.
>
> I don't think anyone would enable that option, beause clearly what
> happens is they develop their generic PHY driver, and also develop
> the consumer of that generic PHY driver. Once it works, they say
> "job done" and submit it.
>
> I was thinking that maybe some automated testing is needed, but
> that runs into other problems:
>
> 1. any test code doesn't have any way to determine what a PHY
> driver supports, because phy_validate() is optional. So it has
> no way to know whether e.g. PHY_MODE_ETHERNET is supported or
> not. Calling phy_set_mode() isn't sufficient, if ->set_mode()
> isn't implemented, this is effectively a no-op.
>
> 2. drivers that just return success for ->set_mode() irrespective
> of the PHY power state but don't program the hardware would be
> undetectable.
>
> I'm also going to point out that phy-core allows ->set_mode() to be
> unimplemented, yet the phy_mode is stored. It looks to me like this is
> intentional part of the API, which means that phy_set_mode*() is not
> expected to always result in the hardware being programmed. That
> brings up the obvious question: if phy_set_mode() is not expected to
> always reprogram the hardware, then what phy API call should follow
> this to ensure the hardware is reprogrammed.
>
> On the other hand, if the API intention was that ->set_mode() must be
> implemented if phy_set_mode*() is to be accepted, then surely
> phy_set_mode_ext() should be checking that phy->ops->set_mode exists,
> and returning -EOPNOTSUPP if it doesn't.
I'll also point out that other parts of the API don't even give the
driver the opportunity to program hardware. E.g.:
static inline void phy_set_bus_width(struct phy *phy, int bus_width)
{
phy->attrs.bus_width = bus_width;
}
So, in order for this hardware configuration to take effect, some other
PHY API call is necessary after calling this function.
(While not relevant for ethernet, I think this needs to be considered
in this discussion, since it's all related to how the generic PHY API
should be used.)
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* Re: [PATCH 1/4 v2] dt-bindings: serdes: s32g: Add NXP serdes subsystem
From: Russell King (Oracle) @ 2026-02-12 10:28 UTC (permalink / raw)
To: Vincent Guittot, Rob Herring
Cc: vkoul, neil.armstrong, krzk+dt, conor+dt, ciprianmarian.costea,
s32, p.zabel, ghennadi.procopciuc, Ionut.Vicovan, linux-phy,
devicetree, linux-kernel, linux-arm-kernel, netdev, horms,
Frank.li
In-Reply-To: <20260210004011.GA2188625-robh@kernel.org>
On Mon, Feb 09, 2026 at 06:40:11PM -0600, Rob Herring wrote:
> On Tue, Feb 03, 2026 at 05:19:14PM +0100, Vincent Guittot wrote:
> > +description: |
> > + The SerDes subsystem on S32G SoC Family includes two types of PHYs:
> > + - One PCIe PHY: Supports various PCIe operation modes
> > + - Two Ethernet Physical Coding Sublayer (XPCS) controllers
> > +
> > + SerDes operation mode selects the enabled PHYs and speeds. Clock frequency
> > + must be adapted accordingly. Below table describes all possible operation
> > + modes.
> > +
> > + Mode PCIe XPCS0 XPCS1 PHY clock Description
> > + SGMII SGMII (MHz)
> > + -------------------------------------------------------------------------
> > + 0 Gen3 N/A N/A 100 Single PCIe
> > + 1 Gen2 1.25Gbps N/A 100 PCIe/SGMII
> > + 2 Gen2 N/A 1.25Gbps 100 PCIe/SGMII
> > + 3 N/A 1.25Gbps 1.25Gbps 100,125 SGMII
> > + 4 N/A 3.125/1.25Gbps 3.125/1.25Gbps 125 SGMII
> > + 5 Gen2 N/A 3.125Gbps 100 PCIe/SGMII
>
> Mixed tabs and spaces. Drop the tabs.
>
> What's not clear to me is do you have 2 or 4 lanes?
>
...
> > + nxp,sys-mode:
> > + $ref: /schemas/types.yaml#/definitions/uint32
>
> maximum: 5
>
> Though isn't this redundant with the child nodes? You could use the
> standard 'phy-mode' property in each child.
phy-mode is ethernet, but the above is more than just ethernet.
I've been wondering why a generic PHY driver needs to know this via DT
when the generic PHY API has:
phy_set_mode() / phy_set_mode_ext()
- sets the type of the PHY and its submode (e.g. ethernet interface
mode)
phy_set_speed()
phy_set_bus_width()
Surely these are sufficient to describe what mode is required from the
generic PHY, and the generic PHY driver can figure out whether the
mode is permitted from the above table, programming the PHY as
desired.
For Ethernet, we don't call the 3.125Gbps "SGMII" using that term. We
use SGMII strictly for Cisco SGMII, which runs at 1.25Gbps. 3.125Gbps
single-lane serdes ethernet is not able to use Cisco SGMII inband
signalling because running the underlying data rate with 10 or 100
symbol replications makes no sense. So we have decided to all this
2500BASE-X. If such a SerDes is connected to a SFP cage, then we
support switching between 1.25Gbps and 3.125Gbps mode depending on
the module inserted, which requires dynamic reconfiguration of the
SerDes.
What I'm saying is that describing a single mode covering several ports
could make things difficult in the future, so make sure you think
carefully.
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* Re: [PATCH net-next] doc: generic phy: update generic PHY documentation
From: Vladimir Oltean @ 2026-02-12 10:38 UTC (permalink / raw)
To: Russell King (Oracle)
Cc: Vinod Koul, Neil Armstrong, Jonathan Corbet, linux-doc, linux-phy
In-Reply-To: <aY2lFTIALH7qEJmM@shell.armlinux.org.uk>
On Thu, Feb 12, 2026 at 10:01:57AM +0000, Russell King (Oracle) wrote:
> I'm also going to point out that phy-core allows ->set_mode() to be
> unimplemented, yet the phy_mode is stored. It looks to me like this is
> intentional part of the API, which means that phy_set_mode*() is not
> expected to always result in the hardware being programmed. That
> brings up the obvious question: if phy_set_mode() is not expected to
> always reprogram the hardware, then what phy API call should follow
> this to ensure the hardware is reprogrammed.
>
> On the other hand, if the API intention was that ->set_mode() must be
> implemented if phy_set_mode*() is to be accepted, then surely
> phy_set_mode_ext() should be checking that phy->ops->set_mode exists,
> and returning -EOPNOTSUPP if it doesn't.
This is a relatively new development.
commit d58c04e305afbaa9dda7969151f06c4efe2c98b0
Author: Dmitry Baryshkov <lumag@kernel.org>
Date: Sun Feb 9 14:31:45 2025 +0200
phy: core: don't require set_mode() callback for phy_get_mode() to work
As reported by Damon Ding, the phy_get_mode() call doesn't work as
expected unless the PHY driver has a .set_mode() call. This prompts PHY
drivers to have empty stubs for .set_mode() for the sake of being able
to get the mode.
Make .set_mode() callback truly optional and update PHY's mode even if
it there is none.
Cc: Damon Ding <damon.ding@rock-chips.com>
Link: https://lore.kernel.org/r/96f8310f-93f1-4bcb-8637-137e1159ff83@rock-chips.com
Tested-by: Damon Ding <damon.ding@rock-chips.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250209-phy-fix-set-moe-v2-1-76e248503856@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
If only lore.kernel.org wasn't down, so I could see the back story in
the link...
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* [PATCH v2] phy: ti: j721e-wiz: Fix device node reference leak in wiz_get_lane_phy_types()
From: Felix Gu @ 2026-02-12 10:39 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Kishon Vijay Abraham I, Jyri Sarha,
Vladimir Oltean
Cc: linux-phy, linux-kernel, Felix Gu
The serdes device_node is obtained using of_get_child_by_name(),
which increments the reference count. However, it is never put,
leading to a reference leak.
Add the missing of_node_put() calls to ensure the reference count is
properly balanced.
Fixes: 7ae14cf581f2 ("phy: ti: j721e-wiz: Implement DisplayPort mode to the wiz driver")
Suggested-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Felix Gu <ustc.gu@gmail.com>
---
Changes in v2:
- Use of_node_put() suggested by Vladimir Oltean.
- Link to v1: https://lore.kernel.org/r/20260211-wiz-v1-1-fdd018d02f33@gmail.com
---
drivers/phy/ti/phy-j721e-wiz.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 12a19bf2875c..10110cc2115b 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -1428,6 +1428,7 @@ static int wiz_get_lane_phy_types(struct device *dev, struct wiz *wiz)
dev_err(dev,
"%s: Reading \"reg\" from \"%s\" failed: %d\n",
__func__, subnode->name, ret);
+ of_node_put(serdes);
return ret;
}
of_property_read_u32(subnode, "cdns,num-lanes", &num_lanes);
@@ -1442,6 +1443,7 @@ static int wiz_get_lane_phy_types(struct device *dev, struct wiz *wiz)
}
}
+ of_node_put(serdes);
return 0;
}
---
base-commit: 193579fe01389bc21aff0051d13f24e8ea95b47d
change-id: 20260204-wiz-9a67604a034f
Best regards,
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* Re: [PATCH next] phy: renesas: rcar-gen3-usb2: Drop local devm_mux_state_get_optional()
From: Ulf Hansson @ 2026-02-12 10:39 UTC (permalink / raw)
To: Vinod Koul
Cc: Geert Uytterhoeven, Vladimir Oltean, Yoshihiro Shimoda,
Neil Armstrong, Josua Mayer, Wolfram Sang, Tommaso Merciai,
linux-phy, linux-mmc, linux-renesas-soc, linux-next, linux-kernel
In-Reply-To: <aYyrsPTH1923jV7y@vaman>
On Wed, 11 Feb 2026 at 17:17, Vinod Koul <vkoul@kernel.org> wrote:
>
> On 10-02-26, 14:34, Ulf Hansson wrote:
> > On Tue, 10 Feb 2026 at 11:53, Geert Uytterhoeven
> > <geert+renesas@glider.be> wrote:
> > >
> > > Now the mux core provides devm_mux_state_get_optional():
> > >
> > > drivers/phy/renesas/phy-rcar-gen3-usb2.c:944:1: error: static declaration of ‘devm_mux_state_get_optional’ follows non-static
> > > declaration
> > > 944 | devm_mux_state_get_optional(struct device *dev, const char *mux_name)
> > > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> > > In file included from drivers/phy/renesas/phy-rcar-gen3-usb2.c:20:
> > > include/linux/mux/consumer.h:64:19: note: previous declaration of ‘devm_mux_state_get_optional’ with type ‘struct mux_state *(struct device *, const char *)’
> > > 64 | struct mux_state *devm_mux_state_get_optional(struct device *dev, const char *mux_name);
> > > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> > >
> > > Fix this by dropping the temporary local wrapper.
> > >
> > > Fixes: ad314348ceb4fe1f ("mux: Add helper functions for getting optional and selected mux-state")
> > > Fixes: 8bb92fd7a0407792 ("phy: renesas: rcar-gen3-usb2: Use mux-state for phyrst management")
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > Thanks Geert for helping out!
> >
> > > ---
> > > - ad314348ceb4fe1f is in mmc/next, and a PR has already been sent
> > > https://lore.kernel.org/20260209133441.556464-1-ulf.hansson@linaro.org
> > > - 8bb92fd7a0407792 is in phy/next
> >
> > Vinod, do you want to pick up the $subject patch as a fix for 7.0-rc1
> > or do you prefer me to handle it?
>
> Should I drop the 8bb92fd7a0407792 and it makes things easier for
> everyone and then we can pick fixed commit for 7.1 cycle..
Well, my pull request for MMC was broken (the mux patches didn't get
properly tested in linux-next, until it was too late), so Linus will
not take it.
At this point I would say that 8bb92fd7a0407792 is still a bit
problematic as it uses the same name of the helper that the mux core
intends to use. It would be better with a phy specific name for it, so
it becomes easier to convert to the common mux helper, later on.
Although, at this point it's still okay as is, as we will need to
defer the mux core changes to v7.1 anyway.
So up to you!
Kind regards
Uffe
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* Re: [PATCH next] phy: renesas: rcar-gen3-usb2: Drop local devm_mux_state_get_optional()
From: Vladimir Oltean @ 2026-02-12 9:31 UTC (permalink / raw)
To: Vinod Koul, Geert Uytterhoeven
Cc: Ulf Hansson, Yoshihiro Shimoda, Neil Armstrong, Josua Mayer,
Wolfram Sang, Tommaso Merciai, linux-phy, linux-mmc,
linux-renesas-soc, linux-next, linux-kernel
In-Reply-To: <aY1eIG_U_GBOFQGt@vaman>
On Thu, Feb 12, 2026 at 10:29:12AM +0530, Vinod Koul wrote:
> Hi Geert,
>
> On 11-02-26, 17:30, Geert Uytterhoeven wrote:
> > Hi Vinod,
> >
> > On Wed, 11 Feb 2026 at 17:17, Vinod Koul <vkoul@kernel.org> wrote:
> > > On 10-02-26, 14:34, Ulf Hansson wrote:
> > > > On Tue, 10 Feb 2026 at 11:53, Geert Uytterhoeven
> > > > <geert+renesas@glider.be> wrote:
> > > > > Now the mux core provides devm_mux_state_get_optional():
> > > > >
> > > > > drivers/phy/renesas/phy-rcar-gen3-usb2.c:944:1: error: static declaration of ‘devm_mux_state_get_optional’ follows non-static
> > > > > declaration
> > > > > 944 | devm_mux_state_get_optional(struct device *dev, const char *mux_name)
> > > > > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> > > > > In file included from drivers/phy/renesas/phy-rcar-gen3-usb2.c:20:
> > > > > include/linux/mux/consumer.h:64:19: note: previous declaration of ‘devm_mux_state_get_optional’ with type ‘struct mux_state *(struct device *, const char *)’
> > > > > 64 | struct mux_state *devm_mux_state_get_optional(struct device *dev, const char *mux_name);
> > > > > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> > > > >
> > > > > Fix this by dropping the temporary local wrapper.
> > > > >
> > > > > Fixes: ad314348ceb4fe1f ("mux: Add helper functions for getting optional and selected mux-state")
> > > > > Fixes: 8bb92fd7a0407792 ("phy: renesas: rcar-gen3-usb2: Use mux-state for phyrst management")
> > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > >
> > > > Thanks Geert for helping out!
> > > >
> > > > > ---
> > > > > - ad314348ceb4fe1f is in mmc/next, and a PR has already been sent
> > > > > https://lore.kernel.org/20260209133441.556464-1-ulf.hansson@linaro.org
> > > > > - 8bb92fd7a0407792 is in phy/next
> > > >
> > > > Vinod, do you want to pick up the $subject patch as a fix for 7.0-rc1
> > > > or do you prefer me to handle it?
> > >
> > > Should I drop the 8bb92fd7a0407792 and it makes things easier for
> > > everyone and then we can pick fixed commit for 7.1 cycle..
> > >
> > > Does that work for everyone. I was about to send PR, will hold off for a
> > > bit.
> >
> > Alternatively, you can mention the semantic conflict in your PR to Linus,
> > and ask him to fold my patch into the merge commit.
>
> Hmmm, that is also a good option but might leave Linus a bit grumpy so
> bit reluctant. Dropping and getting right implementation would be
> better. I think it was a mistake to pick or this all could have gone
> thru mux tree.
>
> Thanks
> --
> ~Vinod
I think with Linus' refusal of the mmc/next PR, there is no longer any
need either for this patch or for the revert of 8bb92fd7a040 ("phy:
renesas: rcar-gen3-usb2: Use mux-state for phyrst management").
http://lore.kernel.org/lkml/CAHk-=wgnRQiKqWVrO_uF1btYM2K8r8xL95RGdKU3QLe8B58nrw@mail.gmail.com
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* Re: [PATCH next] phy: renesas: rcar-gen3-usb2: Drop local devm_mux_state_get_optional()
From: Vinod Koul @ 2026-02-12 11:17 UTC (permalink / raw)
To: Ulf Hansson
Cc: Geert Uytterhoeven, Vladimir Oltean, Yoshihiro Shimoda,
Neil Armstrong, Josua Mayer, Wolfram Sang, Tommaso Merciai,
linux-phy, linux-mmc, linux-renesas-soc, linux-next, linux-kernel
In-Reply-To: <CAPDyKFo92pOimvtGdN4yvFtFkc3vB+ex2OH10WmoKXcVSS+iAA@mail.gmail.com>
On 12-02-26, 11:39, Ulf Hansson wrote:
> On Wed, 11 Feb 2026 at 17:17, Vinod Koul <vkoul@kernel.org> wrote:
> > Should I drop the 8bb92fd7a0407792 and it makes things easier for
> > everyone and then we can pick fixed commit for 7.1 cycle..
>
> Well, my pull request for MMC was broken (the mux patches didn't get
> properly tested in linux-next, until it was too late), so Linus will
> not take it.
Yeah I saw that one, sorry for that
> At this point I would say that 8bb92fd7a0407792 is still a bit
> problematic as it uses the same name of the helper that the mux core
> intends to use. It would be better with a phy specific name for it, so
> it becomes easier to convert to the common mux helper, later on.
> Although, at this point it's still okay as is, as we will need to
> defer the mux core changes to v7.1 anyway.
>
> So up to you!
In that case, I can keep as is for now. We can rename the api as a fix
and proper changes can go in for 7.1
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* Re: [PATCH 2/3] phy: k1-usb: add disconnect function support
From: Yao Zi @ 2026-02-12 11:24 UTC (permalink / raw)
To: Yixun Lan, Vinod Koul, Neil Armstrong, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Ze Huang
Cc: Junzhong Pan, linux-phy, devicetree, linux-riscv, spacemit,
linux-kernel
In-Reply-To: <20260212-11-k3-usb2-phy-v1-2-43578592405d@kernel.org>
On Thu, Feb 12, 2026 at 09:38:55AM +0800, Yixun Lan wrote:
> A disconnect status BIT of USB2 PHY need to be cleared, otherwise
> it will fail to work properly during next connection when devices
> connect to roothub directly.
This sounds like a bug. Does it affect K1 SoC as well? If so, I think
it deserves a Fixes tag and backporting.
> Signed-off-by: Yixun Lan <dlan@kernel.org>
Best regards,
Yao Zi
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* Re: [PATCH 3/3] phy: k1-usb: k3: add USB2 PHY support
From: Yao Zi @ 2026-02-12 11:30 UTC (permalink / raw)
To: Yixun Lan, Vinod Koul, Neil Armstrong, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Ze Huang
Cc: Junzhong Pan, linux-phy, devicetree, linux-riscv, spacemit,
linux-kernel
In-Reply-To: <20260212-11-k3-usb2-phy-v1-3-43578592405d@kernel.org>
On Thu, Feb 12, 2026 at 09:38:56AM +0800, Yixun Lan wrote:
> Add USB2 PHY support for SpacemiT K3 SoC.
>
> Register layout of handling USB disconnect operation has been changed,
> So introducing a platform data to distinguish the different SoCs.
Would it be clearer and simpler if you define separate phy_ops for
k1 and k3, and point of_device_id.data directly to the corresponding
phy_ops? Then there's no need to introduce either spacemit_usb2phy_data
structure, or spacemit_usb2phy_disconnect wrapper.
Best regards,
Yao Zi
> Signed-off-by: Yixun Lan <dlan@kernel.org>
> ---
> drivers/phy/spacemit/phy-k1-usb2.c | 40 ++++++++++++++++++++++++++++++++++++--
> 1 file changed, 38 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/spacemit/phy-k1-usb2.c b/drivers/phy/spacemit/phy-k1-usb2.c
> index 959bf79c7a72..b0ce0a92861e 100644
> --- a/drivers/phy/spacemit/phy-k1-usb2.c
> +++ b/drivers/phy/spacemit/phy-k1-usb2.c
> @@ -51,6 +51,9 @@
> #define PHY_K1_HS_HOST_DISC 0x40
> #define PHY_K1_HS_HOST_DISC_CLR BIT(0)
>
> +#define PHY_K3_HS_HOST_DISC 0x20
> +#define PHY_K3_HS_HOST_DISC_CLR BIT(8)
> +
> #define PHY_PLL_DIV_CFG 0x98
> #define PHY_FDIV_FRACT_8_15 GENMASK(7, 0)
> #define PHY_FDIV_FRACT_16_19 GENMASK(11, 8)
> @@ -74,10 +77,15 @@
>
> #define K1_USB2PHY_RESET_TIME_MS 50
>
> +struct spacemit_usb2phy_data {
> + int (*disconnect)(struct phy *phy, int port);
> +};
> +
> struct spacemit_usb2phy {
> struct phy *phy;
> struct clk *clk;
> struct regmap *regmap_base;
> + const struct spacemit_usb2phy_data *data;
> };
>
> static const struct regmap_config phy_regmap_config = {
> @@ -145,7 +153,7 @@ static int spacemit_usb2phy_exit(struct phy *phy)
> return 0;
> }
>
> -static int spacemit_usb2phy_disconnect(struct phy *phy, int port)
> +static int spacemit_k1_usb2phy_disconnect(struct phy *phy, int port)
> {
> struct spacemit_usb2phy *sphy = phy_get_drvdata(phy);
>
> @@ -155,6 +163,23 @@ static int spacemit_usb2phy_disconnect(struct phy *phy, int port)
> return 0;
> }
>
> +static int spacemit_k3_usb2phy_disconnect(struct phy *phy, int port)
> +{
> + struct spacemit_usb2phy *sphy = phy_get_drvdata(phy);
> +
> + regmap_update_bits(sphy->regmap_base, PHY_K3_HS_HOST_DISC,
> + PHY_K3_HS_HOST_DISC_CLR, PHY_K3_HS_HOST_DISC_CLR);
> +
> + return 0;
> +}
> +
> +static int spacemit_usb2phy_disconnect(struct phy *phy, int port)
> +{
> + struct spacemit_usb2phy *sphy = phy_get_drvdata(phy);
> +
> + return sphy->data->disconnect(phy, port);
> +}
> +
> static const struct phy_ops spacemit_usb2phy_ops = {
> .init = spacemit_usb2phy_init,
> .exit = spacemit_usb2phy_exit,
> @@ -173,6 +198,8 @@ static int spacemit_usb2phy_probe(struct platform_device *pdev)
> if (!sphy)
> return -ENOMEM;
>
> + sphy->data = device_get_match_data(dev);
> +
> sphy->clk = devm_clk_get_prepared(&pdev->dev, NULL);
> if (IS_ERR(sphy->clk))
> return dev_err_probe(dev, PTR_ERR(sphy->clk), "Failed to get clock\n");
> @@ -195,8 +222,17 @@ static int spacemit_usb2phy_probe(struct platform_device *pdev)
> return PTR_ERR_OR_ZERO(phy_provider);
> }
>
> +static const struct spacemit_usb2phy_data k1_usb2phy_data = {
> + .disconnect = spacemit_k1_usb2phy_disconnect,
> +};
> +
> +static const struct spacemit_usb2phy_data k3_usb2phy_data = {
> + .disconnect = spacemit_k3_usb2phy_disconnect,
> +};
> +
> static const struct of_device_id spacemit_usb2phy_dt_match[] = {
> - { .compatible = "spacemit,k1-usb2-phy", },
> + { .compatible = "spacemit,k1-usb2-phy", .data = &k1_usb2phy_data },
> + { .compatible = "spacemit,k3-usb2-phy", .data = &k3_usb2phy_data },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, spacemit_usb2phy_dt_match);
>
> --
> 2.52.0
>
>
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^ permalink raw reply
* Re: [PATCH net-next] doc: generic phy: update generic PHY documentation
From: Russell King (Oracle) @ 2026-02-12 11:55 UTC (permalink / raw)
To: Vladimir Oltean
Cc: Vinod Koul, Neil Armstrong, Jonathan Corbet, linux-doc, linux-phy
In-Reply-To: <20260212103803.xut4sjbypgb26mo4@skbuf>
On Thu, Feb 12, 2026 at 12:38:03PM +0200, Vladimir Oltean wrote:
> On Thu, Feb 12, 2026 at 10:01:57AM +0000, Russell King (Oracle) wrote:
> > I'm also going to point out that phy-core allows ->set_mode() to be
> > unimplemented, yet the phy_mode is stored. It looks to me like this is
> > intentional part of the API, which means that phy_set_mode*() is not
> > expected to always result in the hardware being programmed. That
> > brings up the obvious question: if phy_set_mode() is not expected to
> > always reprogram the hardware, then what phy API call should follow
> > this to ensure the hardware is reprogrammed.
> >
> > On the other hand, if the API intention was that ->set_mode() must be
> > implemented if phy_set_mode*() is to be accepted, then surely
> > phy_set_mode_ext() should be checking that phy->ops->set_mode exists,
> > and returning -EOPNOTSUPP if it doesn't.
>
> This is a relatively new development.
>
> commit d58c04e305afbaa9dda7969151f06c4efe2c98b0
> Author: Dmitry Baryshkov <lumag@kernel.org>
> Date: Sun Feb 9 14:31:45 2025 +0200
>
> phy: core: don't require set_mode() callback for phy_get_mode() to work
>
> As reported by Damon Ding, the phy_get_mode() call doesn't work as
> expected unless the PHY driver has a .set_mode() call. This prompts PHY
> drivers to have empty stubs for .set_mode() for the sake of being able
> to get the mode.
>
> Make .set_mode() callback truly optional and update PHY's mode even if
> it there is none.
>
> Cc: Damon Ding <damon.ding@rock-chips.com>
> Link: https://lore.kernel.org/r/96f8310f-93f1-4bcb-8637-137e1159ff83@rock-chips.com
> Tested-by: Damon Ding <damon.ding@rock-chips.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Link: https://lore.kernel.org/r/20250209-phy-fix-set-moe-v2-1-76e248503856@linaro.org
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
>
> If only lore.kernel.org wasn't down, so I could see the back story in
> the link...
Looking at the first link:
> On 2024/12/30 20:45, Dmitry Baryshkov wrote:
> > On Thu, Dec 26, 2024 at 02:33:03PM +0800, Damon Ding wrote:
> > No need for the stub, please drop it. The host controller driver can
> > still call phy_set_mode() / _ext(), the call will return 0.
>
> Without the &phy_ops.set_mode(), the phy driver can not get phy_mode to
> distinguish between HDMI and DP mode via the phy_get_mode(), even if the
> host driver calls phy_set_mode() / _ext(). Additionally, the previous
> discussion [0] also mentioned future considerations for dynamic
> switching. Indeed, I should add a related comment before the 'return 0;'
> to enhance understandability.
The first sentence makes me question the reasoning here - why would
a phy _driver_ call phy _consumer_ functions such as phy_get_mode().
We have drivers that directly access phy->attrs.mode.
It also adds to the question about the intended correct ordering of
PHY consumer calls, because it seems that the intention behind this
is to _not_ implement the ->set_mode() method, but to reconfigure the
PHY in some other generic PHY API call.
By "fixing" phy_set_mode*() in the above commit to allow this, that
action goes against the idea that generic PHY API calls can be made in
any order.
So my conclusion is that there is disagreement between generic PHY
reviewers about how the generic PHY API should be used and implemented,
leading to the mess I've highlighted where consumers need to know the
implementation details of the generic PHY driver to make the calls in
the correct order for that specific driver.
--
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^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: phy: spacemit: k3: add USB2 PHY support
From: Krzysztof Kozlowski @ 2026-02-12 12:03 UTC (permalink / raw)
To: Yixun Lan
Cc: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ze Huang, Junzhong Pan, linux-phy, devicetree,
linux-riscv, spacemit, linux-kernel
In-Reply-To: <20260212-11-k3-usb2-phy-v1-1-43578592405d@kernel.org>
On Thu, Feb 12, 2026 at 09:38:54AM +0800, Yixun Lan wrote:
> Introduce a compatible string for the USB2 PHY in SpacemiT K3 SoC. The IP
> of USB2 PHY mostly shares the same functionalities with K1 SoC, while has
> some register layout changes.
>
> Signed-off-by: Yixun Lan <dlan@kernel.org>
> ---
> Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH 3/3] phy: k1-usb: k3: add USB2 PHY support
From: Yixun Lan @ 2026-02-12 14:35 UTC (permalink / raw)
To: Yao Zi
Cc: Yixun Lan, Vinod Koul, Neil Armstrong, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Ze Huang, Junzhong Pan,
linux-phy, devicetree, linux-riscv, spacemit, linux-kernel
In-Reply-To: <aY253_fOkoQKbi8g@pie>
Hi Yao,
On 11:30 Thu 12 Feb , Yao Zi wrote:
> On Thu, Feb 12, 2026 at 09:38:56AM +0800, Yixun Lan wrote:
> > Add USB2 PHY support for SpacemiT K3 SoC.
> >
> > Register layout of handling USB disconnect operation has been changed,
> > So introducing a platform data to distinguish the different SoCs.
>
> Would it be clearer and simpler if you define separate phy_ops for
> k1 and k3, and point of_device_id.data directly to the corresponding
> phy_ops? Then there's no need to introduce either spacemit_usb2phy_data
> structure, or spacemit_usb2phy_disconnect wrapper.
>
Yes, I agree, thanks for the suggestion
--
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^ permalink raw reply
* Re: [PATCH 2/3] phy: k1-usb: add disconnect function support
From: Yixun Lan @ 2026-02-12 14:43 UTC (permalink / raw)
To: Yao Zi
Cc: Yixun Lan, Vinod Koul, Neil Armstrong, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Ze Huang, Junzhong Pan,
linux-phy, devicetree, linux-riscv, spacemit, linux-kernel
In-Reply-To: <aY24UOvYsnh_7ZCO@pie>
Hi Yao,
On 11:24 Thu 12 Feb , Yao Zi wrote:
> On Thu, Feb 12, 2026 at 09:38:55AM +0800, Yixun Lan wrote:
> > A disconnect status BIT of USB2 PHY need to be cleared, otherwise
> > it will fail to work properly during next connection when devices
> > connect to roothub directly.
>
> This sounds like a bug. Does it affect K1 SoC as well? If so, I think
> it deserves a Fixes tag and backporting.
>
yes, but I haven't checked if it will affect real case since the problem
exist with devices connected to roothub directly only..
anyway, I think it deserves to add a Fixes tag, so will do in next version
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^ permalink raw reply
* Re: [PATCH v9 1/7] phy: can-transceiver: rename temporary helper function to avoid conflict
From: Vladimir Oltean @ 2026-02-12 16:48 UTC (permalink / raw)
To: Josua Mayer
Cc: Marc Kleine-Budde, Vincent Mailhol, Vinod Koul, Neil Armstrong,
Peter Rosin, Aaro Koskinen, Andreas Kemnade, Kevin Hilman,
Roger Quadros, Tony Lindgren, Janusz Krzysztofik, Vignesh R,
Andi Shyti, Ulf Hansson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Geert Uytterhoeven, Magnus Damm, Wolfram Sang,
Yazan Shhady, Jon Nettleton, Mikhail Anikin, linux-can, linux-phy,
linux-kernel, linux-omap, linux-i2c, linux-mmc, devicetree,
linux-renesas-soc
In-Reply-To: <20260208-rz-sdio-mux-v9-1-9a3be13c1280@solid-run.com>
Hi Josua,
On Sun, Feb 08, 2026 at 05:38:56PM +0200, Josua Mayer wrote:
> Rename the temporary devm_mux_state_get_optional function to avoid
> conflict with upcoming implementation in multiplexer subsystem.
>
> Acked-by: Vinod Koul <vkoul@kernel.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
In the future, when you have a series with cross-tree dependencies,
please try to think of it as individual mini-series for each tree's
'next' branch, and specify clearly that you need stable tags (to be
pulled into other trees). Telling maintainers what is your expected
merge strategy helps avoid making mistakes.
For example, if you did that in this set, you wouldn't have missed the
fact that in linux-phy/next, phy-can-transceiver is _not_ the only
occurrence of devm_mux_state_get_optional(). There's another one in
drivers/phy/renesas/phy-rcar-gen3-usb2.c, and that should be also
handled in order for trees to not enter inconsistent states.
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* Re: [PATCH v9 1/7] phy: can-transceiver: rename temporary helper function to avoid conflict
From: Geert Uytterhoeven @ 2026-02-12 16:53 UTC (permalink / raw)
To: Vladimir Oltean
Cc: Josua Mayer, Marc Kleine-Budde, Vincent Mailhol, Vinod Koul,
Neil Armstrong, Peter Rosin, Aaro Koskinen, Andreas Kemnade,
Kevin Hilman, Roger Quadros, Tony Lindgren, Janusz Krzysztofik,
Vignesh R, Andi Shyti, Ulf Hansson, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Magnus Damm, Wolfram Sang, Yazan Shhady, Jon Nettleton,
Mikhail Anikin, linux-can, linux-phy, linux-kernel, linux-omap,
linux-i2c, linux-mmc, devicetree, linux-renesas-soc
In-Reply-To: <20260212164823.mbeycqwzsy2dfq6e@skbuf>
Hi Vladimir,
On Thu, 12 Feb 2026 at 17:48, Vladimir Oltean <olteanv@gmail.com> wrote:
> On Sun, Feb 08, 2026 at 05:38:56PM +0200, Josua Mayer wrote:
> > Rename the temporary devm_mux_state_get_optional function to avoid
> > conflict with upcoming implementation in multiplexer subsystem.
> >
> > Acked-by: Vinod Koul <vkoul@kernel.org>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> > Signed-off-by: Josua Mayer <josua@solid-run.com>
>
> In the future, when you have a series with cross-tree dependencies,
> please try to think of it as individual mini-series for each tree's
> 'next' branch, and specify clearly that you need stable tags (to be
> pulled into other trees). Telling maintainers what is your expected
> merge strategy helps avoid making mistakes.
>
> For example, if you did that in this set, you wouldn't have missed the
> fact that in linux-phy/next, phy-can-transceiver is _not_ the only
> occurrence of devm_mux_state_get_optional(). There's another one in
> drivers/phy/renesas/phy-rcar-gen3-usb2.c, and that should be also
> handled in order for trees to not enter inconsistent states.
To his defense, the one in drivers/phy/renesas/phy-rcar-gen3-usb2.c
is a recent addition.
So this is yet another case of "convert all current users" (i.e. those
present in the typical subsystem base, typically *-rc1), with new
users popping up in -next in parallel, which happens all the time...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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* Re: [PATCH v2 2/4] arm64: dts: rockchip: Add USB2.0 PHY for RK3368
From: Vladimir Oltean @ 2026-02-12 16:55 UTC (permalink / raw)
To: WeiHao Li
Cc: heiko, robh, krzk+dt, conor+dt, linux-phy, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel
In-Reply-To: <20250909132958.26423-3-cn.liweihao@gmail.com>
On Tue, Sep 09, 2025 at 09:29:56PM +0800, WeiHao Li wrote:
> RK3368 has one USB2.0 PHY with two ports, This adds device tree node for
> it.
>
> Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3368.dtsi | 29 ++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> index 1b21787269..b09e431a64 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -766,11 +766,40 @@ cru: clock-controller@ff760000 {
> grf: syscon@ff770000 {
> compatible = "rockchip,rk3368-grf", "syscon", "simple-mfd";
> reg = <0x0 0xff770000 0x0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
This introduces a device tree warning. You cannot mix nodes with no unit
address (io-domains) with nodes with a unit address (usb2-phy@700) on
the same hierarchical level. You have to pick a format and stick to it.
>
> io_domains: io-domains {
> compatible = "rockchip,rk3368-io-voltage-domain";
> status = "disabled";
> };
> +
> + u2phy: usb2-phy@700 {
> + compatible = "rockchip,rk3368-usb2phy";
> + reg = <0x700 0x2c>;
> + clocks = <&cru SCLK_OTGPHY0>;
> + clock-names = "phyclk";
> + clock-output-names = "usb480m_phy";
> + #clock-cells = <0>;
> + status = "disabled";
> +
> + u2phy_otg: otg-port {
> + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "otg-bvalid", "otg-id",
> + "linestate";
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> + u2phy_host: host-port {
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "linestate";
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> + };
> };
>
> wdt: watchdog@ff800000 {
> --
> 2.47.2
>
>
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* Re: [PATCH 1/4 v2] dt-bindings: serdes: s32g: Add NXP serdes subsystem
From: Rob Herring @ 2026-02-12 21:10 UTC (permalink / raw)
To: Vincent Guittot
Cc: vkoul, neil.armstrong, krzk+dt, conor+dt, ciprianmarian.costea,
s32, p.zabel, linux, ghennadi.procopciuc, Ionut.Vicovan,
linux-phy, devicetree, linux-kernel, linux-arm-kernel, netdev,
horms, Frank.li
In-Reply-To: <CAKfTPtA299R7yn3r=tCqhhP_tK3E_UpGSMrDLyRP4Ccwt1m58g@mail.gmail.com>
On Thu, Feb 12, 2026 at 1:17 AM Vincent Guittot
<vincent.guittot@linaro.org> wrote:
>
> On Tue, 10 Feb 2026 at 01:40, Rob Herring <robh@kernel.org> wrote:
> >
> > On Tue, Feb 03, 2026 at 05:19:14PM +0100, Vincent Guittot wrote:
> > > Describe the serdes subsystem available on the S32G platforms.
> > >
> > > Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
> > > ---
> > > .../bindings/phy/nxp,s32g-serdes.yaml | 154 ++++++++++++++++++
> > > 1 file changed, 154 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/phy/nxp,s32g-serdes.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/phy/nxp,s32g-serdes.yaml b/Documentation/devicetree/bindings/phy/nxp,s32g-serdes.yaml
> > > new file mode 100644
> > > index 000000000000..fad34bee2a4f
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/phy/nxp,s32g-serdes.yaml
> > > @@ -0,0 +1,154 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/phy/nxp,s32g-serdes.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: NXP S32G2xxx/S32G3xxx SerDes PHY subsystem
> > > +
> > > +maintainers:
> > > + - Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
> > > +
> > > +description: |
> > > + The SerDes subsystem on S32G SoC Family includes two types of PHYs:
> > > + - One PCIe PHY: Supports various PCIe operation modes
> > > + - Two Ethernet Physical Coding Sublayer (XPCS) controllers
> > > +
> > > + SerDes operation mode selects the enabled PHYs and speeds. Clock frequency
> > > + must be adapted accordingly. Below table describes all possible operation
> > > + modes.
> > > +
> > > + Mode PCIe XPCS0 XPCS1 PHY clock Description
> > > + SGMII SGMII (MHz)
> > > + -------------------------------------------------------------------------
> > > + 0 Gen3 N/A N/A 100 Single PCIe
> > > + 1 Gen2 1.25Gbps N/A 100 PCIe/SGMII
> > > + 2 Gen2 N/A 1.25Gbps 100 PCIe/SGMII
> > > + 3 N/A 1.25Gbps 1.25Gbps 100,125 SGMII
> > > + 4 N/A 3.125/1.25Gbps 3.125/1.25Gbps 125 SGMII
> > > + 5 Gen2 N/A 3.125Gbps 100 PCIe/SGMII
> >
> > Mixed tabs and spaces. Drop the tabs.
>
> okay
>
> >
> > What's not clear to me is do you have 2 or 4 lanes?
>
> 2 lanes per serdes
> as an example mode 0 is one PCIe x2 lane
> and mode 1 is one PCIe x1 and one xpcs0/SGMII on lane 1
> or mode 3 is one xpcs0/SGMII on lane 0 and one xpcs1/SGMII on lane 1
Still confused. So 2 total lanes?
>
> >
> > > +
> > > +properties:
> > > + compatible:
> > > + oneOf:
> > > + - enum:
> > > + - nxp,s32g2-serdes
> > > + - items:
> > > + - const: nxp,s32g3-serdes
> > > + - const: nxp,s32g2-serdes
> > > +
> > > + reg:
> > > + maxItems: 4
> > > +
> > > + reg-names:
> > > + items:
> > > + - const: ss_pcie
> > > + - const: pcie_phy
> > > + - const: xpcs0
> > > + - const: xpcs1
> > > +
> > > + clocks:
> > > + minItems: 4
> > > + maxItems: 5
> > > +
> > > + clock-names:
> > > + items:
> > > + - const: axi
> > > + - const: aux
> > > + - const: apb
> > > + - const: ref
> > > + - const: ext
> > > + minItems: 4
> > > +
> > > + resets:
> > > + maxItems: 2
> > > +
> > > + reset-names:
> > > + items:
> > > + - const: serdes
> > > + - const: pcie
> > > +
> > > + nxp,sys-mode:
> > > + $ref: /schemas/types.yaml#/definitions/uint32
> >
> > maximum: 5
> >
> > Though isn't this redundant with the child nodes? You could use the
> > standard 'phy-mode' property in each child.
>
> not really because we can have mode 1 but only a node to describe
> lane0 for PCIe x1 if the lane 1 is not used
>
> >
> > > + description: |
> > > + SerDes operational mode. See above table for possible values.
> > > +
> > > + '#address-cells':
> > > + const: 1
> > > +
> > > + '#size-cells':
> > > + const: 0
> > > +
> > > +patternProperties:
> > > + '^serdes[0,1]_lane@[0,1]$':
> >
> > Do you need to support serdes0_lane@0 and serdes1_lane@0 (or similar
> > with "@1")? That's illegal as you have 2 nodes with the same address.
>
> okay, we can find other naming
>
> >
> > > + description:
> > > + Describe a serdes lane.
> > > + type: object
> > > +
> > > + properties:
> > > + compatible:
> > > + enum:
> > > + - nxp,s32g2-serdes-pcie-phy
> > > + - nxp,s32g2-serdes-xpcs
> >
> > Seems like phy-mode would be sufficient. Are these separate blocks from
> > the parent?
>
> Isn't phy-mode only for ethernet phy ?
Sorry, it is "phy-type" that I was thinking about. That takes the
types defined in dt-bindings/phy/phy.h. The type can be defined either
in "phy-type" or in the phy cells if the type is per identifier.
Really, Given each lane doesn't have any of its own resources, I'd
probably get rid of the child nodes and put the type into the phy
cells. Then you'd have something like this:
// PCIE on lanes 0 and 1 (mode 0)
pcie {
phys = <&phy 0 PHY_TYPE_PCIE>, <&phy 1 PHY_TYPE_PCIE>;
};
// PCIE on lane 0 (mode 1)
pcie {
phys = <&phy 0 PHY_TYPE_PCIE>;
};
// Ethernet on lane 1
ethernet {
phys = <&phy 1 PHY_TYPE_SGMII>;
};
I perhaps don't have the cells right if it is more than just lane 0
and lane 1, but you can put anything there you want. The cell
definition is provider specific.
If you need to get the overall system wide configuration, that can be
done. It's not terribly efficient, but you can iterate all 'phys'
nodes in the DT, find the ones for your provider (&phy) and examine
the cell values.
Rob
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* Re: [REGRESSION] HDMI monitor not working on Radxa Rock 5B after phy rockchip samsung hdptx HDMI 2.1 FRL patchset
From: Cristian Ciocaltea @ 2026-02-12 22:04 UTC (permalink / raw)
To: dubito, Vinod Koul, Neil Armstrong, Heiko Stuebner, linux-phy,
linux-arm-kernel, linux-rockchip, linux-kernel, regressions
In-Reply-To: <b32164001947ba922aefb6ca86a8dc59e9323d2b.camel@online.de>
Hi Thomas,
On 2/11/26 11:20 PM, Thomas Niederprüm wrote:
> Hi,
>
> I'm running a Radxa Rock 5B (rk3588) on a 10+ year old Samsung TV screen
> connected via HDMI. This worked flawlessly in 6.18.7 but does not work on linux-
> next. I bisected the problem and identified commit 3481fc04 to be the first bad
> commit. This points to the phy PLL clock rate calculation to be the problem in
> connection with my monitor. As it seems relevant, I attached the EDID of my
> monitor.
>
> I'm booting the kernel out of EDK2 after which efifb is correctly taking over
> the initialized display and I can see the initial kernel boot messages on the
> HDMI output. After the drm/kms in the kernel takes over the screen shortly turns
> black, changes resolution, and then correctly displays on 6.18.7. However, in
> linux-next the screen remains black after kms took over. I cannot see any
> obvious differences in the boot logs but I attached two boot logs, one for the
> working 6.18.7 kernel and one for the non-working linux-next kernel.
>
> When reverting 3481fc04..de5dba83 (i.e. the faulty commit and the ones that
> followed in the HDMI 2.1 FRL series) I can build a working kernel from linux-
> next.
>
> I don't know where to dig from here but I'm happy to run any test necessary to
> track down the problem.
It'd be helpful if you could resend the logs after booting both kernels with the
following params (requires CONFIG_DYNAMIC_DEBUG=y):
rockchipdrm.dyndbg=+p dw_hdmi_qp.dyndbg=+p phy_rockchip_samsung_hdptx.dyndbg=+p
As well as running the command below before connecting your display/TV:
$ echo 0x4 > /sys/module/drm/parameters/debug
I've noticed you're forcing "video=HDMI-A-1:1920x1080M@60", which should be
anyway the preferred mode (according to the EDID).
Did you try choosing a different one, e.g. 1920x1080@50 or 1920x1080@30 (they
are supported according to the listing in CTA-861 Extension Block). That's more
a test to confirm the issue affects a particular modeline, or is more general.
FWIW I've tested over 40 modes with different displays/TVs and didn't notice any
regression, hence I'm probably missing something here.
Thanks for the report!
Cristian
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* Re: [PATCH v9 0/2] Add driver support for Eswin EIC7700 SoC SATA PHY
From: Yulin Lu @ 2026-02-13 6:20 UTC (permalink / raw)
To: vkoul, neil.armstrong, robh, krzk+dt, conor+dt, p.zabel,
linux-phy, devicetree, linux-kernel
Cc: ningyu, linmin, fenglin
In-Reply-To: <20260205082009.1780-1-luyulin@eswincomputing.com>
> Updates:
> v9 -> v8:
> - eswin,eic7700-sata-phy.yaml
> - Modify the format of the "default" field in the
> "eswin,tx-amplitude-tuning" and "eswin,tx-preemph-tuning"
> properties.
> - phy-eic7700-sata.c
> - Correct the incorrectly formatted symbol "-" in the comments.
> - Link to v8: https://lore.kernel.org/lkml/20260123024823.1612-1-luyulin@eswincomputing.com/
>
> v8 -> v7:
> - eswin,eic7700-sata-phy.yaml
> - Add "eswin,tx-amplitude-tuning" and "eswin,tx-preemph-tuning"
> properties, because these parameters may vary across different
> circuit boards.
> - Delete reviewed-by tag of Krzysztof Kozlowski, because the tuning
> properties are introduced.
> - phy-eic7700-sata.c
> - Try to get SATA PHY transmitter amplitude and pre-emphasis signal
> eye diagram tuning parameters from dts instead of hardcoded values
> in the code. Because, these parameters may vary across different
> circuit boards. Define default tuning parameters and use it when
> these properties are not declared in dts.
> - Add a comment to explain the reason for mapping I/O resources with
> platform_get_resource and devm_ioremap instead of using the
> devm_platform_ioremap_resource API.
> - Link to v7: https://lore.kernel.org/lkml/20260106062944.1529-1-luyulin@eswincomputing.com/
Hi Vinod, all,
In v7, I got driver review comments from Vinod. After fixing and submitting v8,
I received yaml comments from Krzysztof. v9 now has Reviewed-by from Krzysztof.
So I want to confirm whether there are any further comments on the driver code
in v9 and if it meets the requirements for merging.
Best regards,
Yulin Lu
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* [PATCH v2 0/2] phy: qcom: edp: Add DP/eDP switch for phys
From: Yongxing Mou @ 2026-02-13 7:31 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong
Cc: linux-arm-msm, linux-phy, linux-kernel, Yongxing Mou, stable
Currently the PHY selects the DP/eDP configuration tables in a fixed way,
choosing the table when enable. This driver has known issues:
1. The selected table does not match the actual platform mode.
2. It cannot support both modes at the same time.
As discussed here[1], this series:
1. Cleans up duplicated and incorrect tables based on the HPG.
2. Fixes the LDO programming error in eDP mode.
3. Adds DP/eDP mode switching support.
Note: x1e80100/sa8775p/sc7280 have been tested, while glymur/sc8280xp
have not been tested.
[1] https://lore.kernel.org/all/20260119-klm_dpphy-v2-1-52252190940b@oss.qualcomm.com/
Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
---
Changes in v2:
- Combine the third patch with the first one.[Dmitry]
- Fix code formatting issues.[Konrad][Dmitry]
- Update the commit message description.[Dmitry][Konrad]
- Fix kodiak swing/pre_emp table values.[Konrad]
- Link to v1: https://lore.kernel.org/r/20260205-edp_phy-v1-0-231882bbf3f1@oss.qualcomm.com
---
Yongxing Mou (2):
phy: qcom: edp: Add eDP/DP mode switch support
phy: qcom: edp: Add per-version LDO configuration callback
drivers/phy/qualcomm/phy-qcom-edp.c | 176 ++++++++++++++++++++++++++----------
1 file changed, 129 insertions(+), 47 deletions(-)
---
base-commit: fc4e91c639c0af93d63c3d5bc0ee45515dd7504a
change-id: 20260205-edp_phy-1eca3ed074c0
Best regards,
--
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* [PATCH v2 1/2] phy: qcom: edp: Add eDP/DP mode switch support
From: Yongxing Mou @ 2026-02-13 7:31 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong
Cc: linux-arm-msm, linux-phy, linux-kernel, Yongxing Mou, stable
In-Reply-To: <20260213-edp_phy-v2-0-43c40976435e@oss.qualcomm.com>
The eDP PHY supports both eDP&DP modes, each requires a different table.
The current driver doesn't fully support every combo PHY mode and use
either the eDP or DP table when enable the platform. In addition, some
platforms mismatch between the mode and the table where DP mode uses
the eDP table or eDP mode use the DP table.
Clean up and correct the tables for currently supported platforms based on
the HPG specification.
Here lists the tables can be reused across current platforms.
DP mode:
-sa8775p/sc7280/sc8280xp/x1e80100
-glymur
eDP mode(low vdiff):
-glymur/sa8775p/sc8280xp/x1e80100
-sc7280
Cc: stable@vger.kernel.org
Fixes: f199223cb490 ("phy: qcom: Introduce new eDP PHY driver")
Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
---
drivers/phy/qualcomm/phy-qcom-edp.c | 90 ++++++++++++++++++++++---------------
1 file changed, 53 insertions(+), 37 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c
index 13feab99feec..ff14de41cb1c 100644
--- a/drivers/phy/qualcomm/phy-qcom-edp.c
+++ b/drivers/phy/qualcomm/phy-qcom-edp.c
@@ -87,7 +87,8 @@ struct qcom_edp_phy_cfg {
bool is_edp;
const u8 *aux_cfg;
const u8 *vco_div_cfg;
- const struct qcom_edp_swing_pre_emph_cfg *swing_pre_emph_cfg;
+ const struct qcom_edp_swing_pre_emph_cfg *dp_swing_pre_emph_cfg;
+ const struct qcom_edp_swing_pre_emph_cfg *edp_swing_pre_emph_cfg;
const struct phy_ver_ops *ver_ops;
};
@@ -116,17 +117,17 @@ struct qcom_edp {
};
static const u8 dp_swing_hbr_rbr[4][4] = {
- { 0x08, 0x0f, 0x16, 0x1f },
+ { 0x07, 0x0f, 0x16, 0x1f },
{ 0x11, 0x1e, 0x1f, 0xff },
{ 0x16, 0x1f, 0xff, 0xff },
{ 0x1f, 0xff, 0xff, 0xff }
};
static const u8 dp_pre_emp_hbr_rbr[4][4] = {
- { 0x00, 0x0d, 0x14, 0x1a },
+ { 0x00, 0x0e, 0x15, 0x1a },
{ 0x00, 0x0e, 0x15, 0xff },
{ 0x00, 0x0e, 0xff, 0xff },
- { 0x03, 0xff, 0xff, 0xff }
+ { 0x04, 0xff, 0xff, 0xff }
};
static const u8 dp_swing_hbr2_hbr3[4][4] = {
@@ -150,6 +151,20 @@ static const struct qcom_edp_swing_pre_emph_cfg dp_phy_swing_pre_emph_cfg = {
.pre_emphasis_hbr3_hbr2 = &dp_pre_emp_hbr2_hbr3,
};
+static const u8 dp_pre_emp_hbr_rbr_v8[4][4] = {
+ { 0x00, 0x0e, 0x15, 0x1a },
+ { 0x00, 0x0e, 0x15, 0xff },
+ { 0x00, 0x0e, 0xff, 0xff },
+ { 0x00, 0xff, 0xff, 0xff }
+};
+
+static const struct qcom_edp_swing_pre_emph_cfg dp_phy_swing_pre_emph_cfg_v8 = {
+ .swing_hbr_rbr = &dp_swing_hbr_rbr,
+ .swing_hbr3_hbr2 = &dp_swing_hbr2_hbr3,
+ .pre_emphasis_hbr_rbr = &dp_pre_emp_hbr_rbr_v8,
+ .pre_emphasis_hbr3_hbr2 = &dp_pre_emp_hbr2_hbr3,
+};
+
static const u8 edp_swing_hbr_rbr[4][4] = {
{ 0x07, 0x0f, 0x16, 0x1f },
{ 0x0d, 0x16, 0x1e, 0xff },
@@ -158,7 +173,7 @@ static const u8 edp_swing_hbr_rbr[4][4] = {
};
static const u8 edp_pre_emp_hbr_rbr[4][4] = {
- { 0x05, 0x12, 0x17, 0x1d },
+ { 0x05, 0x11, 0x17, 0x1d },
{ 0x05, 0x11, 0x18, 0xff },
{ 0x06, 0x11, 0xff, 0xff },
{ 0x00, 0xff, 0xff, 0xff }
@@ -172,10 +187,10 @@ static const u8 edp_swing_hbr2_hbr3[4][4] = {
};
static const u8 edp_pre_emp_hbr2_hbr3[4][4] = {
- { 0x08, 0x11, 0x17, 0x1b },
- { 0x00, 0x0c, 0x13, 0xff },
- { 0x05, 0x10, 0xff, 0xff },
- { 0x00, 0xff, 0xff, 0xff }
+ { 0x0c, 0x15, 0x19, 0x1e },
+ { 0x0b, 0x15, 0x19, 0xff },
+ { 0x0e, 0x14, 0xff, 0xff },
+ { 0x0d, 0xff, 0xff, 0xff }
};
static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg = {
@@ -193,25 +208,25 @@ static const u8 edp_phy_vco_div_cfg_v4[4] = {
0x01, 0x01, 0x02, 0x00,
};
-static const u8 edp_pre_emp_hbr_rbr_v5[4][4] = {
- { 0x05, 0x11, 0x17, 0x1d },
- { 0x05, 0x11, 0x18, 0xff },
- { 0x06, 0x11, 0xff, 0xff },
- { 0x00, 0xff, 0xff, 0xff }
+static const u8 edp_swing_hbr2_hbr3_v3[4][4] = {
+ { 0x06, 0x11, 0x16, 0x1b },
+ { 0x0b, 0x19, 0x1f, 0xff },
+ { 0x18, 0x1f, 0xff, 0xff },
+ { 0x1f, 0xff, 0xff, 0xff }
};
-static const u8 edp_pre_emp_hbr2_hbr3_v5[4][4] = {
+static const u8 edp_pre_emp_hbr2_hbr3_v3[4][4] = {
{ 0x0c, 0x15, 0x19, 0x1e },
- { 0x0b, 0x15, 0x19, 0xff },
- { 0x0e, 0x14, 0xff, 0xff },
+ { 0x09, 0x14, 0x19, 0xff },
+ { 0x0f, 0x14, 0xff, 0xff },
{ 0x0d, 0xff, 0xff, 0xff }
};
-static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg_v5 = {
+static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg_v3 = {
.swing_hbr_rbr = &edp_swing_hbr_rbr,
- .swing_hbr3_hbr2 = &edp_swing_hbr2_hbr3,
- .pre_emphasis_hbr_rbr = &edp_pre_emp_hbr_rbr_v5,
- .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3_v5,
+ .swing_hbr3_hbr2 = &edp_swing_hbr2_hbr3_v3,
+ .pre_emphasis_hbr_rbr = &edp_pre_emp_hbr_rbr,
+ .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3_v3,
};
static const u8 edp_phy_aux_cfg_v5[DP_AUX_CFG_SIZE] = {
@@ -262,12 +277,7 @@ static int qcom_edp_phy_init(struct phy *phy)
DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN,
edp->edp + DP_PHY_PD_CTL);
- /*
- * TODO: Re-work the conditions around setting the cfg8 value
- * when more information becomes available about why this is
- * even needed.
- */
- if (edp->cfg->swing_pre_emph_cfg && !edp->is_edp)
+ if (!edp->is_edp)
aux_cfg[8] = 0xb7;
writel(0xfc, edp->edp + DP_PHY_MODE);
@@ -291,7 +301,7 @@ static int qcom_edp_phy_init(struct phy *phy)
static int qcom_edp_set_voltages(struct qcom_edp *edp, const struct phy_configure_opts_dp *dp_opts)
{
- const struct qcom_edp_swing_pre_emph_cfg *cfg = edp->cfg->swing_pre_emph_cfg;
+ const struct qcom_edp_swing_pre_emph_cfg *cfg;
unsigned int v_level = 0;
unsigned int p_level = 0;
u8 ldo_config;
@@ -299,11 +309,10 @@ static int qcom_edp_set_voltages(struct qcom_edp *edp, const struct phy_configur
u8 emph;
int i;
- if (!cfg)
- return 0;
-
if (edp->is_edp)
- cfg = &edp_phy_swing_pre_emph_cfg;
+ cfg = edp->cfg->edp_swing_pre_emph_cfg;
+ else
+ cfg = edp->cfg->dp_swing_pre_emph_cfg;
for (i = 0; i < dp_opts->lanes; i++) {
v_level = max(v_level, dp_opts->voltage[i]);
@@ -564,20 +573,24 @@ static const struct qcom_edp_phy_cfg sa8775p_dp_phy_cfg = {
.is_edp = false,
.aux_cfg = edp_phy_aux_cfg_v5,
.vco_div_cfg = edp_phy_vco_div_cfg_v4,
- .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg_v5,
+ .dp_swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
+ .edp_swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg,
.ver_ops = &qcom_edp_phy_ops_v4,
};
static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = {
.aux_cfg = edp_phy_aux_cfg_v4,
.vco_div_cfg = edp_phy_vco_div_cfg_v4,
+ .dp_swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
+ .edp_swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg_v3,
.ver_ops = &qcom_edp_phy_ops_v4,
};
static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg = {
.aux_cfg = edp_phy_aux_cfg_v4,
.vco_div_cfg = edp_phy_vco_div_cfg_v4,
- .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
+ .dp_swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
+ .edp_swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg,
.ver_ops = &qcom_edp_phy_ops_v4,
};
@@ -585,7 +598,8 @@ static const struct qcom_edp_phy_cfg sc8280xp_edp_phy_cfg = {
.is_edp = true,
.aux_cfg = edp_phy_aux_cfg_v4,
.vco_div_cfg = edp_phy_vco_div_cfg_v4,
- .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg,
+ .dp_swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
+ .edp_swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg,
.ver_ops = &qcom_edp_phy_ops_v4,
};
@@ -765,7 +779,8 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v6 = {
static struct qcom_edp_phy_cfg x1e80100_phy_cfg = {
.aux_cfg = edp_phy_aux_cfg_v4,
.vco_div_cfg = edp_phy_vco_div_cfg_v4,
- .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
+ .dp_swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
+ .edp_swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg,
.ver_ops = &qcom_edp_phy_ops_v6,
};
@@ -944,7 +959,8 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v8 = {
static struct qcom_edp_phy_cfg glymur_phy_cfg = {
.aux_cfg = edp_phy_aux_cfg_v8,
.vco_div_cfg = edp_phy_vco_div_cfg_v8,
- .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg_v5,
+ .dp_swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg_v8,
+ .edp_swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg,
.ver_ops = &qcom_edp_phy_ops_v8,
};
--
2.43.0
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^ permalink raw reply related
* [PATCH v2 2/2] phy: qcom: edp: Add per-version LDO configuration callback
From: Yongxing Mou @ 2026-02-13 7:31 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong
Cc: linux-arm-msm, linux-phy, linux-kernel, Yongxing Mou, stable
In-Reply-To: <20260213-edp_phy-v2-0-43c40976435e@oss.qualcomm.com>
For eDP low Vdiff, the LDO setting depends on the PHY version, instead of
being a simple 0x0 or 0x01. Introduce the com_ldo_config callback to
correct LDO setting accroding to the HPG.
Since SC7280 uses different LDO settings than SA8775P/SC8280XP, introduce
qcom_edp_phy_ops_v3 to keep the LDO setting correct.
Cc: stable@vger.kernel.org
Fixes: f199223cb490 ("phy: qcom: Introduce new eDP PHY driver")
Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
---
drivers/phy/qualcomm/phy-qcom-edp.c | 86 ++++++++++++++++++++++++++++++++-----
1 file changed, 76 insertions(+), 10 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c
index ff14de41cb1c..6464df8d2a62 100644
--- a/drivers/phy/qualcomm/phy-qcom-edp.c
+++ b/drivers/phy/qualcomm/phy-qcom-edp.c
@@ -81,6 +81,7 @@ struct phy_ver_ops {
int (*com_clk_fwd_cfg)(const struct qcom_edp *edp);
int (*com_configure_pll)(const struct qcom_edp *edp);
int (*com_configure_ssc)(const struct qcom_edp *edp);
+ int (*com_ldo_config)(const struct qcom_edp *edp);
};
struct qcom_edp_phy_cfg {
@@ -304,7 +305,7 @@ static int qcom_edp_set_voltages(struct qcom_edp *edp, const struct phy_configur
const struct qcom_edp_swing_pre_emph_cfg *cfg;
unsigned int v_level = 0;
unsigned int p_level = 0;
- u8 ldo_config;
+ int ret;
u8 swing;
u8 emph;
int i;
@@ -330,13 +331,13 @@ static int qcom_edp_set_voltages(struct qcom_edp *edp, const struct phy_configur
if (swing == 0xff || emph == 0xff)
return -EINVAL;
- ldo_config = edp->is_edp ? 0x0 : 0x1;
+ ret = edp->cfg->ver_ops->com_ldo_config(edp);
+ if (ret)
+ return ret;
- writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG);
writel(swing, edp->tx0 + TXn_TX_DRV_LVL);
writel(emph, edp->tx0 + TXn_TX_EMP_POST1_LVL);
- writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG);
writel(swing, edp->tx1 + TXn_TX_DRV_LVL);
writel(emph, edp->tx1 + TXn_TX_EMP_POST1_LVL);
@@ -560,6 +561,52 @@ static int qcom_edp_com_configure_pll_v4(const struct qcom_edp *edp)
return 0;
}
+static int qcom_edp_ldo_config_v3(const struct qcom_edp *edp)
+{
+ const struct phy_configure_opts_dp *dp_opts = &edp->dp_opts;
+ u32 ldo_config;
+
+ if (!edp->is_edp)
+ ldo_config = 0x0;
+ else if (dp_opts->link_rate <= 2700)
+ ldo_config = 0x81;
+ else
+ ldo_config = 0x41;
+
+ writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG);
+ writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG);
+
+ return 0;
+}
+
+static int qcom_edp_ldo_config_v4(const struct qcom_edp *edp)
+{
+ const struct phy_configure_opts_dp *dp_opts = &edp->dp_opts;
+ u32 ldo_config;
+
+ if (!edp->is_edp)
+ ldo_config = 0x0;
+ else if (dp_opts->link_rate <= 2700)
+ ldo_config = 0xc1;
+ else
+ ldo_config = 0x81;
+
+ writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG);
+ writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG);
+
+ return 0;
+}
+
+static const struct phy_ver_ops qcom_edp_phy_ops_v3 = {
+ .com_power_on = qcom_edp_phy_power_on_v4,
+ .com_resetsm_cntrl = qcom_edp_phy_com_resetsm_cntrl_v4,
+ .com_bias_en_clkbuflr = qcom_edp_com_bias_en_clkbuflr_v4,
+ .com_clk_fwd_cfg = qcom_edp_com_clk_fwd_cfg_v4,
+ .com_configure_pll = qcom_edp_com_configure_pll_v4,
+ .com_configure_ssc = qcom_edp_com_configure_ssc_v4,
+ .com_ldo_config = qcom_edp_ldo_config_v3,
+};
+
static const struct phy_ver_ops qcom_edp_phy_ops_v4 = {
.com_power_on = qcom_edp_phy_power_on_v4,
.com_resetsm_cntrl = qcom_edp_phy_com_resetsm_cntrl_v4,
@@ -567,6 +614,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 = {
.com_clk_fwd_cfg = qcom_edp_com_clk_fwd_cfg_v4,
.com_configure_pll = qcom_edp_com_configure_pll_v4,
.com_configure_ssc = qcom_edp_com_configure_ssc_v4,
+ .com_ldo_config = qcom_edp_ldo_config_v4,
};
static const struct qcom_edp_phy_cfg sa8775p_dp_phy_cfg = {
@@ -583,7 +631,7 @@ static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = {
.vco_div_cfg = edp_phy_vco_div_cfg_v4,
.dp_swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
.edp_swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg_v3,
- .ver_ops = &qcom_edp_phy_ops_v4,
+ .ver_ops = &qcom_edp_phy_ops_v3,
};
static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg = {
@@ -768,12 +816,31 @@ static int qcom_edp_com_configure_pll_v6(const struct qcom_edp *edp)
return 0;
}
+static int qcom_edp_ldo_config_v6(const struct qcom_edp *edp)
+{
+ const struct phy_configure_opts_dp *dp_opts = &edp->dp_opts;
+ u32 ldo_config;
+
+ if (!edp->is_edp)
+ ldo_config = 0x0;
+ else if (dp_opts->link_rate <= 2700)
+ ldo_config = 0x51;
+ else
+ ldo_config = 0x91;
+
+ writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG);
+ writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG);
+
+ return 0;
+}
+
static const struct phy_ver_ops qcom_edp_phy_ops_v6 = {
.com_power_on = qcom_edp_phy_power_on_v6,
.com_resetsm_cntrl = qcom_edp_phy_com_resetsm_cntrl_v6,
.com_bias_en_clkbuflr = qcom_edp_com_bias_en_clkbuflr_v6,
.com_configure_pll = qcom_edp_com_configure_pll_v6,
.com_configure_ssc = qcom_edp_com_configure_ssc_v6,
+ .com_ldo_config = qcom_edp_ldo_config_v6,
};
static struct qcom_edp_phy_cfg x1e80100_phy_cfg = {
@@ -954,6 +1021,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v8 = {
.com_clk_fwd_cfg = qcom_edp_com_clk_fwd_cfg_v8,
.com_configure_pll = qcom_edp_com_configure_pll_v8,
.com_configure_ssc = qcom_edp_com_configure_ssc_v8,
+ .com_ldo_config = qcom_edp_ldo_config_v6,
};
static struct qcom_edp_phy_cfg glymur_phy_cfg = {
@@ -969,7 +1037,6 @@ static int qcom_edp_phy_power_on(struct phy *phy)
const struct qcom_edp *edp = phy_get_drvdata(phy);
u32 bias0_en, drvr0_en, bias1_en, drvr1_en;
unsigned long pixel_freq;
- u8 ldo_config = 0x0;
int ret;
u32 val;
u8 cfg1;
@@ -978,11 +1045,10 @@ static int qcom_edp_phy_power_on(struct phy *phy)
if (ret)
return ret;
- if (edp->cfg->swing_pre_emph_cfg && !edp->is_edp)
- ldo_config = 0x1;
+ ret = edp->cfg->ver_ops->com_ldo_config(edp);
+ if (ret)
+ return ret;
- writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG);
- writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG);
writel(0x00, edp->tx0 + TXn_LANE_MODE_1);
writel(0x00, edp->tx1 + TXn_LANE_MODE_1);
--
2.43.0
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^ permalink raw reply related
* Re: [PATCH v2] phy: ti: j721e-wiz: Fix device node reference leak in wiz_get_lane_phy_types()
From: Markus Elfring @ 2026-02-13 8:09 UTC (permalink / raw)
To: Felix Gu, linux-phy, Jyri Sarha, Kishon Vijay Abraham I,
Neil Armstrong, Vinod Koul, Vladimir Oltean
Cc: LKML, kernel-janitors
In-Reply-To: <20260212-wiz-v2-1-6e8bd4cc7a4a@gmail.com>
…
> ---
> Changes in v2:
> - Use of_node_put() suggested by Vladimir Oltean.
> - Link to v1: https://lore.kernel.org/r/20260211-wiz-v1-1-fdd018d02f33@gmail.com
> ---
> drivers/phy/ti/phy-j721e-wiz.c | 2 ++
…
* Would you like to complete the exception handling by using another goto chain?
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/coding-style.rst?h=v6.19#n526
* How do you think about to increase the application of scope-based resource management
by additional update steps?
https://elixir.bootlin.com/linux/v6.19-rc5/source/include/linux/cleanup.h#L157-L161
Regards,
Markus
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^ permalink raw reply
* Re: [PATCH v3 1/5] phy: qcom: qmp-combo: Prevent unnecessary PM runtime suspend at boot
From: Johan Hovold @ 2026-02-13 8:47 UTC (permalink / raw)
To: Loic Poulain
Cc: vkoul, kishon, linux-arm-msm, linux-phy, dmitry.baryshkov,
neil.armstrong, konrad.dybcio, Abel Vesa
In-Reply-To: <20260205160240.748371-2-loic.poulain@oss.qualcomm.com>
On Thu, Feb 05, 2026 at 05:02:36PM +0100, Loic Poulain wrote:
> There is a small window where the device can suspend after
> pm_runtime_enable() and before pm_runtime_forbid(), causing an
> unnecessary suspend/resume cycle while the PHY is not yet registered.
What do you think can trigger a suspend in that window?
(A racing user space request to both disable and re-enable runtime PM
could theoretically do so but not in practice.).
> Move pm_runtime_forbid() before pm_runtime_enable() to eliminate
> this race.
I think the commit message should reflect that this isn't really an
issue.
Johan
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^ permalink raw reply
* Re: [PATCH v3 3/5] phy: qcom: qmp-usb-legacy: Fix possible NULL-deref on early runtime suspend
From: Johan Hovold @ 2026-02-13 9:02 UTC (permalink / raw)
To: Loic Poulain
Cc: vkoul, kishon, linux-arm-msm, linux-phy, dmitry.baryshkov,
neil.armstrong, konrad.dybcio, Abel Vesa
In-Reply-To: <20260205160240.748371-4-loic.poulain@oss.qualcomm.com>
On Thu, Feb 05, 2026 at 05:02:38PM +0100, Loic Poulain wrote:
> There is a small window where the runtime suspend callback may run
> after pm_runtime_enable() and before pm_runtime_forbid(). In this
> case, a crash occurs because runtime suspend/resume dereferences
> qmp->phy pointer, which is not yet initialized:
> `if (!qmp->phy->init_count) {`
So here too, what would trigger a suspend in this window? (Except
possibly user space disabling and reenabling runtime pm, which can't
happen in practice).
> This can also happen if user re-enables runtime-pm via the sysfs
> attribute before qmp phy is initialized.
This I guess can happen in theory, but you'd need to try pretty hard.
But I think the commit message should better reflect this is all mostly
theoretical (currently it sounds like something you've actually hit).
Johan
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