[thermal: thermal/next] thermal: intel: intel_tcc_cooling: Detect TCC lock bit

[thermal: thermal/next] thermal: intel: intel_tcc_cooling: Detect TCC lock bit

[thermal-bot for Zhang Rui]

The following commit has been merged into the thermal/next branch of thermal:

Commit-ID:     be6abd3ed65678f8c7bd212808a9841785c2d5ca
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//be6abd3ed65678f8c7bd212808a9841785c2d5ca
Author:        Zhang Rui <rui.zhang@intel.com>
AuthorDate:    Tue, 08 Nov 2022 16:12:19 +08:00
Committer:     Rafael J. Wysocki <rafael.j.wysocki@intel.com>
CommitterDate: Wed, 09 Nov 2022 14:58:02 +01:00

thermal: intel: intel_tcc_cooling: Detect TCC lock bit

When MSR_IA32_TEMPERATURE_TARGET is locked, TCC Offset can not be
updated even if the PROGRAMMABE Bit is set.

Yield the driver on platforms with MSR_IA32_TEMPERATURE_TARGET locked.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
---
 drivers/thermal/intel/intel_tcc_cooling.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/intel/intel_tcc_cooling.c
index 95adac4..c9e84e6 100644
--- a/drivers/thermal/intel/intel_tcc_cooling.c
+++ b/drivers/thermal/intel/intel_tcc_cooling.c
@@ -14,6 +14,7 @@
 #define TCC_SHIFT 24
 #define TCC_MASK	(0x3fULL<<24)
 #define TCC_PROGRAMMABLE	BIT(30)
+#define TCC_LOCKED		BIT(31)
 
 static struct thermal_cooling_device *tcc_cdev;
 
@@ -108,6 +109,15 @@ static int __init tcc_cooling_init(void)
 	if (!(val & TCC_PROGRAMMABLE))
 		return -ENODEV;
 
+	err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val);
+	if (err)
+		return err;
+
+	if (val & TCC_LOCKED) {
+		pr_info("TCC Offset locked\n");
+		return -ENODEV;
+	}
+
 	pr_info("Programmable TCC Offset detected\n");
 
 	tcc_cdev =