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From: Nick Hu <nick.hu@sifive.com>
To: greentime.hu@sifive.com, zong.li@sifive.com,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Pavel Machek <pavel@ucw.cz>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Anup Patel <anup@brainfault.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Mayuresh Chitale <mchitale@ventanamicro.com>,
	Atish Patra <atishp@rivosinc.com>,
	Samuel Holland <samuel.holland@sifive.com>,
	Nick Hu <nick.hu@sifive.com>, Samuel Ortiz <sameo@rivosinc.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org
Subject: [PATCH v2 0/3] Support SSTC while PM operations
Date: Thu, 26 Sep 2024 14:54:15 +0800	[thread overview]
Message-ID: <20240926065422.226518-1-nick.hu@sifive.com> (raw)

When the cpu is going to be hotplug, stop the stimecmp to prevent pending
interrupt.
When the cpu is going to be suspended, save the stimecmp before entering
the suspend state and restore it in the resume path.

changes in v2:
1. Add csr_read/write_hi_lo operations
2. Apply the suggestion from Anup.
link: https://lore.kernel.org/lkml/20240829033904.477200-3-nick.hu@sifive.com/T/#u

Nick Hu (3):
  riscv: Add csr_read/write_hi_lo support
  riscv: Add stimecmp save and restore
  clocksource/drivers/timer-riscv: Stop stimecmp when cpu hotplug

 arch/riscv/include/asm/csr.h      | 22 ++++++++++++++++++++++
 arch/riscv/include/asm/suspend.h  |  1 +
 arch/riscv/kernel/suspend.c       |  6 ++++++
 drivers/clocksource/timer-riscv.c |  6 ++++++
 4 files changed, 35 insertions(+)

-- 
2.34.1


             reply	other threads:[~2024-09-26  6:55 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-26  6:54 Nick Hu [this message]
2024-09-26  6:54 ` [PATCH v2 1/3] riscv: Add csr_read/write_hi_lo support Nick Hu
2024-09-26  7:59   ` Andrew Jones
     [not found]     ` <CAKddAkCJt5t_WyMuwSMb8qE4LHWy8GZ4QWZy6ViJvx-p5YBfuQ@mail.gmail.com>
2024-10-02  1:57       ` Nick Hu
2024-09-26  6:54 ` [PATCH v2 2/3] riscv: Add stimecmp save and restore Nick Hu
2024-09-26  6:54 ` [PATCH v2 3/3] clocksource/drivers/timer-riscv: Stop stimecmp when cpu hotplug Nick Hu
2024-09-26  9:40   ` Anup Patel
2024-09-26  9:47   ` Andrew Jones

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