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From: Laura Nao <laura.nao@collabora.com>
To: srini@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, rafael@kernel.org,
	daniel.lezcano@linaro.org, rui.zhang@intel.com,
	lukasz.luba@arm.com, matthias.bgg@gmail.com,
	angelogioacchino.delregno@collabora.com
Cc: wenst@chromium.org, nfraprado@collabora.com, arnd@arndb.de,
	colin.i.king@gmail.com, u.kleine-koenig@baylibre.com,
	andrew-ct.chen@mediatek.com, lala.lin@mediatek.com,
	bchihi@baylibre.com, frank-w@public-files.de,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, kernel@collabora.com,
	Laura Nao <laura.nao@collabora.com>
Subject: [PATCH v2 4/9] thermal: mediatek: lvts: Add platform ops to support alternative conversion logic
Date: Wed, 30 Jul 2025 17:21:23 +0200	[thread overview]
Message-ID: <20250730152128.311109-5-laura.nao@collabora.com> (raw)
In-Reply-To: <20250730152128.311109-1-laura.nao@collabora.com>

Introduce lvts_platform_ops struct to support SoC-specific versions of
lvts_raw_to_temp() and lvts_temp_to_raw() conversion functions.

This is in preparation for supporting SoCs like MT8196/MT6991, which
require a different lvts_temp_to_raw() implementation.

Signed-off-by: Laura Nao <laura.nao@collabora.com>
---
 drivers/thermal/mediatek/lvts_thermal.c | 46 +++++++++++++++++++++++--
 1 file changed, 43 insertions(+), 3 deletions(-)

diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index 8398af657ba2..6e4a35ecaf34 100644
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -125,8 +125,14 @@ struct lvts_ctrl_data {
 			continue; \
 		else
 
+struct lvts_platform_ops {
+	int (*lvts_raw_to_temp)(u32 raw_temp, int temp_factor);
+	u32 (*lvts_temp_to_raw)(int temperature, int temp_factor);
+};
+
 struct lvts_data {
 	const struct lvts_ctrl_data *lvts_ctrl;
+	struct lvts_platform_ops ops;
 	const u32 *conn_cmd;
 	const u32 *init_cmd;
 	int num_cal_offsets;
@@ -300,6 +306,7 @@ static int lvts_get_temp(struct thermal_zone_device *tz, int *temp)
 	struct lvts_ctrl *lvts_ctrl = container_of(lvts_sensor, struct lvts_ctrl,
 						   sensors[lvts_sensor->id]);
 	const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
+	const struct lvts_platform_ops *ops = &lvts_data->ops;
 	void __iomem *msr = lvts_sensor->msr;
 	u32 value;
 	int rc;
@@ -332,7 +339,7 @@ static int lvts_get_temp(struct thermal_zone_device *tz, int *temp)
 	if (rc)
 		return -EAGAIN;
 
-	*temp = lvts_raw_to_temp(value & 0xFFFF, lvts_data->temp_factor);
+	*temp = ops->lvts_raw_to_temp(value & 0xFFFF, lvts_data->temp_factor);
 
 	return 0;
 }
@@ -400,10 +407,11 @@ static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high)
 	struct lvts_ctrl *lvts_ctrl = container_of(lvts_sensor, struct lvts_ctrl,
 						   sensors[lvts_sensor->id]);
 	const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
+	const struct lvts_platform_ops *ops = &lvts_data->ops;
 	void __iomem *base = lvts_sensor->base;
-	u32 raw_low = lvts_temp_to_raw(low != -INT_MAX ? low : LVTS_MINIMUM_THRESHOLD,
+	u32 raw_low = ops->lvts_temp_to_raw(low != -INT_MAX ? low : LVTS_MINIMUM_THRESHOLD,
 				       lvts_data->temp_factor);
-	u32 raw_high = lvts_temp_to_raw(high, lvts_data->temp_factor);
+	u32 raw_high = ops->lvts_temp_to_raw(high, lvts_data->temp_factor);
 	bool should_update_thresh;
 
 	lvts_sensor->low_thresh = low;
@@ -1774,6 +1782,10 @@ static const struct lvts_data mt7988_lvts_ap_data = {
 	.temp_offset	= LVTS_COEFF_B_MT7988,
 	.gt_calib_bit_offset = 24,
 	.num_cal_offsets = 3,
+	.ops = {
+		.lvts_raw_to_temp = lvts_raw_to_temp,
+		.lvts_temp_to_raw = lvts_temp_to_raw,
+	}
 };
 
 static const struct lvts_data mt8186_lvts_data = {
@@ -1788,6 +1800,10 @@ static const struct lvts_data mt8186_lvts_data = {
 	.gt_calib_bit_offset = 24,
 	.def_calibration = 19000,
 	.num_cal_offsets = 3,
+	.ops = {
+		.lvts_raw_to_temp = lvts_raw_to_temp,
+		.lvts_temp_to_raw = lvts_temp_to_raw,
+	}
 };
 
 static const struct lvts_data mt8188_lvts_mcu_data = {
@@ -1802,6 +1818,10 @@ static const struct lvts_data mt8188_lvts_mcu_data = {
 	.gt_calib_bit_offset = 20,
 	.def_calibration = 35000,
 	.num_cal_offsets = 3,
+	.ops = {
+		.lvts_raw_to_temp = lvts_raw_to_temp,
+		.lvts_temp_to_raw = lvts_temp_to_raw,
+	}
 };
 
 static const struct lvts_data mt8188_lvts_ap_data = {
@@ -1816,6 +1836,10 @@ static const struct lvts_data mt8188_lvts_ap_data = {
 	.gt_calib_bit_offset = 20,
 	.def_calibration = 35000,
 	.num_cal_offsets = 3,
+	.ops = {
+		.lvts_raw_to_temp = lvts_raw_to_temp,
+		.lvts_temp_to_raw = lvts_temp_to_raw,
+	}
 };
 
 static const struct lvts_data mt8192_lvts_mcu_data = {
@@ -1830,6 +1854,10 @@ static const struct lvts_data mt8192_lvts_mcu_data = {
 	.gt_calib_bit_offset = 24,
 	.def_calibration = 35000,
 	.num_cal_offsets = 3,
+	.ops = {
+		.lvts_raw_to_temp = lvts_raw_to_temp,
+		.lvts_temp_to_raw = lvts_temp_to_raw,
+	}
 };
 
 static const struct lvts_data mt8192_lvts_ap_data = {
@@ -1844,6 +1872,10 @@ static const struct lvts_data mt8192_lvts_ap_data = {
 	.gt_calib_bit_offset = 24,
 	.def_calibration = 35000,
 	.num_cal_offsets = 3,
+	.ops = {
+		.lvts_raw_to_temp = lvts_raw_to_temp,
+		.lvts_temp_to_raw = lvts_temp_to_raw,
+	}
 };
 
 static const struct lvts_data mt8195_lvts_mcu_data = {
@@ -1858,6 +1890,10 @@ static const struct lvts_data mt8195_lvts_mcu_data = {
 	.gt_calib_bit_offset = 24,
 	.def_calibration = 35000,
 	.num_cal_offsets = 3,
+	.ops = {
+		.lvts_raw_to_temp = lvts_raw_to_temp,
+		.lvts_temp_to_raw = lvts_temp_to_raw,
+	}
 };
 
 static const struct lvts_data mt8195_lvts_ap_data = {
@@ -1872,6 +1908,10 @@ static const struct lvts_data mt8195_lvts_ap_data = {
 	.gt_calib_bit_offset = 24,
 	.def_calibration = 35000,
 	.num_cal_offsets = 3,
+	.ops = {
+		.lvts_raw_to_temp = lvts_raw_to_temp,
+		.lvts_temp_to_raw = lvts_temp_to_raw,
+	}
 };
 
 static const struct of_device_id lvts_of_match[] = {
-- 
2.39.5


  parent reply	other threads:[~2025-07-30 15:22 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-30 15:21 [PATCH v2 0/9] Add thermal sensor driver support for Mediatek MT8196 Laura Nao
2025-07-30 15:21 ` [PATCH v2 1/9] dt-bindings: thermal: mediatek: Add LVTS thermal controller support for MT8196 Laura Nao
2025-07-31  7:31   ` AngeloGioacchino Del Regno
2025-07-30 15:21 ` [PATCH v2 2/9] thermal/drivers/mediatek/lvts: Make number of calibration offsets configurable Laura Nao
2025-07-31  3:10   ` Fei Shao
2025-08-01  7:28   ` AngeloGioacchino Del Regno
2025-07-30 15:21 ` [PATCH v2 3/9] thermal/drivers/mediatek/lvts: Guard against zero temp_factor in lvts_raw_to_temp Laura Nao
2025-07-31  3:46   ` Fei Shao
2025-08-01  7:28   ` AngeloGioacchino Del Regno
2025-07-30 15:21 ` Laura Nao [this message]
2025-07-31  4:03   ` [PATCH v2 4/9] thermal: mediatek: lvts: Add platform ops to support alternative conversion logic Fei Shao
2025-08-01  7:28   ` AngeloGioacchino Del Regno
2025-07-30 15:21 ` [PATCH v2 5/9] thermal/drivers/mediatek/lvts: Add lvts_temp_to_raw variant Laura Nao
2025-07-31  4:06   ` Fei Shao
2025-07-31  9:10   ` Chen-Yu Tsai
2025-08-01  7:28   ` AngeloGioacchino Del Regno
2025-07-30 15:21 ` [PATCH v2 6/9] thermal/drivers/mediatek/lvts: Add support for ATP mode Laura Nao
2025-07-31  4:25   ` Fei Shao
2025-07-31 10:14     ` Laura Nao
2025-08-01  4:44       ` Fei Shao
2025-08-01  7:28   ` AngeloGioacchino Del Regno
2025-07-30 15:21 ` [PATCH v2 7/9] thermal/drivers/mediatek/lvts: Support MSR offset for 16-bit calibration data Laura Nao
2025-08-01  7:28   ` AngeloGioacchino Del Regno
2025-07-30 15:21 ` [PATCH v2 8/9] thermal/drivers/mediatek/lvts_thermal: Add MT8196 support Laura Nao
2025-08-01  7:28   ` AngeloGioacchino Del Regno
2025-07-30 15:21 ` [PATCH v2 9/9] dt-bindings: nvmem: mediatek: efuse: Add support for MT8196 Laura Nao
2025-07-30 23:54   ` Rob Herring
2025-07-31 10:26     ` Laura Nao
2025-08-03  8:18       ` Krzysztof Kozlowski
2025-07-31  7:26   ` AngeloGioacchino Del Regno
2025-07-31  7:28   ` AngeloGioacchino Del Regno

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