[PATCH 1/2] cpufreq: intel_pstate: Remove EPB related changes

[PATCH 1/2] cpufreq: intel_pstate: Remove EPB related changes

[Srinivas Pandruvada]

The intel_pstate driver does not enable HWP mode when CPUID.06H:EAX[10]
is not set, indicating that EPP (Energy Performance Preference) is not
supported by the hardware.

When EPP is unavailable, the system falls back to using EPB (Energy
Performance Bias) if the feature is supported. However, since the
intel_pstate driver will not enable HWP in this scenario, any EPB-related
code becomes unreachable and irrelevant. Remove the EPB handling code
paths simplifying the driver logic and reducing code size.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 drivers/cpufreq/intel_pstate.c | 49 +++-------------------------------
 1 file changed, 4 insertions(+), 45 deletions(-)

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index f366d35c5840..c28454b16723 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -620,24 +620,9 @@ static int min_perf_pct_min(void)
 		(cpu->pstate.min_pstate * 100 / turbo_pstate) : 0;
 }
 
-static s16 intel_pstate_get_epb(struct cpudata *cpu_data)
-{
-	u64 epb;
-	int ret;
-
-	if (!boot_cpu_has(X86_FEATURE_EPB))
-		return -ENXIO;
-
-	ret = rdmsrq_on_cpu(cpu_data->cpu, MSR_IA32_ENERGY_PERF_BIAS, &epb);
-	if (ret)
-		return (s16)ret;
-
-	return (s16)(epb & 0x0f);
-}
-
 static s16 intel_pstate_get_epp(struct cpudata *cpu_data, u64 hwp_req_data)
 {
-	s16 epp;
+	s16 epp = -EOPNOTSUPP;
 
 	if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
 		/*
@@ -651,34 +636,13 @@ static s16 intel_pstate_get_epp(struct cpudata *cpu_data, u64 hwp_req_data)
 				return epp;
 		}
 		epp = (hwp_req_data >> 24) & 0xff;
-	} else {
-		/* When there is no EPP present, HWP uses EPB settings */
-		epp = intel_pstate_get_epb(cpu_data);
 	}
 
 	return epp;
 }
 
-static int intel_pstate_set_epb(int cpu, s16 pref)
-{
-	u64 epb;
-	int ret;
-
-	if (!boot_cpu_has(X86_FEATURE_EPB))
-		return -ENXIO;
-
-	ret = rdmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &epb);
-	if (ret)
-		return ret;
-
-	epb = (epb & ~0x0f) | pref;
-	wrmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, epb);
-
-	return 0;
-}
-
 /*
- * EPP/EPB display strings corresponding to EPP index in the
+ * EPP display strings corresponding to EPP index in the
  * energy_perf_strings[]
  *	index		String
  *-------------------------------------
@@ -782,7 +746,7 @@ static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
 					      u32 raw_epp)
 {
 	int epp = -EINVAL;
-	int ret;
+	int ret = -EOPNOTSUPP;
 
 	if (!pref_index)
 		epp = cpu_data->epp_default;
@@ -802,10 +766,6 @@ static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
 			return -EBUSY;
 
 		ret = intel_pstate_set_epp(cpu_data, epp);
-	} else {
-		if (epp == -EINVAL)
-			epp = (pref_index - 1) << 2;
-		ret = intel_pstate_set_epb(cpu_data->cpu, epp);
 	}
 
 	return ret;
@@ -1337,9 +1297,8 @@ static void intel_pstate_hwp_set(unsigned int cpu)
 	if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
 		value &= ~GENMASK_ULL(31, 24);
 		value |= (u64)epp << 24;
-	} else {
-		intel_pstate_set_epb(cpu, epp);
 	}
+
 skip_epp:
 	WRITE_ONCE(cpu_data->hwp_req_cached, value);
 	wrmsrq_on_cpu(cpu, MSR_HWP_REQUEST, value);
-- 
2.51.0

[PATCH 2/2] cpufreq: intel_pstate: Enable HWP without EPP feature

[Srinivas Pandruvada]

When EPP feature is not available (CPUID CPUID.06H:EAX[10] is not set),
intel_pstate will not enable HWP.

Some processors support DEC feature (Dynamic Efficiency Control). But in
this case HWP must be enabled.

So, enable HWP even if EPP feature is not available but DEC feature is
present.

When EPP feature is not available don't publish sysfs attributes
"energy_performance_available_preferences" and
"energy_performance_preference", but continue to enable HWP.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 drivers/cpufreq/intel_pstate.c | 35 +++++++++++++++++++++++++++++++---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index c28454b16723..d74abe909fbc 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -904,6 +904,11 @@ static struct freq_attr *hwp_cpufreq_attrs[] = {
 	NULL,
 };
 
+static struct freq_attr *hwp_cpufreq_default_attrs[] = {
+	&base_frequency,
+	NULL,
+};
+
 static bool no_cas __ro_after_init;
 
 static struct cpudata *hybrid_max_perf_cpu __read_mostly;
@@ -1370,6 +1375,9 @@ static void intel_pstate_hwp_offline(struct cpudata *cpu)
 #define POWER_CTL_EE_ENABLE	1
 #define POWER_CTL_EE_DISABLE	2
 
+/* Enable bit for Dynamic Efficiency Control (DEC) */
+#define POWER_CTL_DEC_ENABLE	27
+
 static int power_ctl_ee_state;
 
 static void set_power_ctl_ee_state(bool input)
@@ -3761,6 +3769,17 @@ static const struct x86_cpu_id intel_hybrid_scaling_factor[] = {
 	{}
 };
 
+static bool dec_enabled(void)
+{
+	u64 power_ctl;
+
+	rdmsrq(MSR_IA32_POWER_CTL, power_ctl);
+	if (power_ctl & BIT(POWER_CTL_DEC_ENABLE))
+		return true;
+
+	return false;
+}
+
 static int __init intel_pstate_init(void)
 {
 	static struct cpudata **_all_cpu_data;
@@ -3793,15 +3812,24 @@ static int __init intel_pstate_init(void)
 		 * Avoid enabling HWP for processors without EPP support,
 		 * because that means incomplete HWP implementation which is a
 		 * corner case and supporting it is generally problematic.
+		 * But when DEC enable bit is set (MSR 0x1FC bit 27), continue
+		 * to enable HWP.
 		 *
 		 * If HWP is enabled already, though, there is no choice but to
 		 * deal with it.
 		 */
-		if ((!no_hwp && boot_cpu_has(X86_FEATURE_HWP_EPP)) || hwp_forced) {
+		if (!no_hwp || hwp_forced) {
+			if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
+				intel_pstate.attr = hwp_cpufreq_attrs;
+				intel_cpufreq.attr = hwp_cpufreq_attrs;
+			} else if (dec_enabled()) {
+				intel_pstate.attr = hwp_cpufreq_default_attrs;
+				intel_cpufreq.attr = hwp_cpufreq_default_attrs;
+			} else {
+				goto skip_hwp_enable;
+			}
 			hwp_active = true;
 			hwp_mode_bdw = id->driver_data;
-			intel_pstate.attr = hwp_cpufreq_attrs;
-			intel_cpufreq.attr = hwp_cpufreq_attrs;
 			intel_cpufreq.flags |= CPUFREQ_NEED_UPDATE_LIMITS;
 			intel_cpufreq.adjust_perf = intel_cpufreq_adjust_perf;
 			if (!default_driver)
@@ -3811,6 +3839,7 @@ static int __init intel_pstate_init(void)
 
 			goto hwp_cpu_matched;
 		}
+skip_hwp_enable:
 		pr_info("HWP not enabled\n");
 	} else {
 		if (no_load)
-- 
2.51.0

Re: [PATCH 1/2] cpufreq: intel_pstate: Remove EPB related changes

[Rafael J. Wysocki]

On Thu, Sep 4, 2025 at 2:06 AM Srinivas Pandruvada
<srinivas.pandruvada@linux.intel.com> wrote:
>
> The intel_pstate driver does not enable HWP mode when CPUID.06H:EAX[10]
> is not set, indicating that EPP (Energy Performance Preference) is not
> supported by the hardware.
>
> When EPP is unavailable, the system falls back to using EPB (Energy
> Performance Bias) if the feature is supported. However, since the
> intel_pstate driver will not enable HWP in this scenario, any EPB-related
> code becomes unreachable and irrelevant. Remove the EPB handling code
> paths simplifying the driver logic and reducing code size.
>
> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
> ---
>  drivers/cpufreq/intel_pstate.c | 49 +++-------------------------------
>  1 file changed, 4 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> index f366d35c5840..c28454b16723 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -620,24 +620,9 @@ static int min_perf_pct_min(void)
>                 (cpu->pstate.min_pstate * 100 / turbo_pstate) : 0;
>  }
>
> -static s16 intel_pstate_get_epb(struct cpudata *cpu_data)
> -{
> -       u64 epb;
> -       int ret;
> -
> -       if (!boot_cpu_has(X86_FEATURE_EPB))
> -               return -ENXIO;
> -
> -       ret = rdmsrq_on_cpu(cpu_data->cpu, MSR_IA32_ENERGY_PERF_BIAS, &epb);
> -       if (ret)
> -               return (s16)ret;
> -
> -       return (s16)(epb & 0x0f);
> -}
> -
>  static s16 intel_pstate_get_epp(struct cpudata *cpu_data, u64 hwp_req_data)
>  {
> -       s16 epp;
> +       s16 epp = -EOPNOTSUPP;
>
>         if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
>                 /*
> @@ -651,34 +636,13 @@ static s16 intel_pstate_get_epp(struct cpudata *cpu_data, u64 hwp_req_data)
>                                 return epp;
>                 }
>                 epp = (hwp_req_data >> 24) & 0xff;
> -       } else {
> -               /* When there is no EPP present, HWP uses EPB settings */
> -               epp = intel_pstate_get_epb(cpu_data);
>         }
>
>         return epp;
>  }
>
> -static int intel_pstate_set_epb(int cpu, s16 pref)
> -{
> -       u64 epb;
> -       int ret;
> -
> -       if (!boot_cpu_has(X86_FEATURE_EPB))
> -               return -ENXIO;
> -
> -       ret = rdmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &epb);
> -       if (ret)
> -               return ret;
> -
> -       epb = (epb & ~0x0f) | pref;
> -       wrmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, epb);
> -
> -       return 0;
> -}
> -
>  /*
> - * EPP/EPB display strings corresponding to EPP index in the
> + * EPP display strings corresponding to EPP index in the
>   * energy_perf_strings[]
>   *     index           String
>   *-------------------------------------
> @@ -782,7 +746,7 @@ static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
>                                               u32 raw_epp)
>  {
>         int epp = -EINVAL;
> -       int ret;
> +       int ret = -EOPNOTSUPP;
>
>         if (!pref_index)
>                 epp = cpu_data->epp_default;
> @@ -802,10 +766,6 @@ static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
>                         return -EBUSY;
>
>                 ret = intel_pstate_set_epp(cpu_data, epp);
> -       } else {
> -               if (epp == -EINVAL)
> -                       epp = (pref_index - 1) << 2;
> -               ret = intel_pstate_set_epb(cpu_data->cpu, epp);
>         }
>
>         return ret;
> @@ -1337,9 +1297,8 @@ static void intel_pstate_hwp_set(unsigned int cpu)
>         if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
>                 value &= ~GENMASK_ULL(31, 24);
>                 value |= (u64)epp << 24;
> -       } else {
> -               intel_pstate_set_epb(cpu, epp);
>         }
> +
>  skip_epp:
>         WRITE_ONCE(cpu_data->hwp_req_cached, value);
>         wrmsrq_on_cpu(cpu, MSR_HWP_REQUEST, value);
> --

Applied as 6.18 material, thanks!

Re: [PATCH 2/2] cpufreq: intel_pstate: Enable HWP without EPP feature

[Rafael J. Wysocki]

[-- Attachment #1: Type: text/plain, Size: 4408 bytes --]

On Thu, Sep 4, 2025 at 2:06 AM Srinivas Pandruvada
<srinivas.pandruvada@linux.intel.com> wrote:
>
> When EPP feature is not available (CPUID CPUID.06H:EAX[10] is not set),
> intel_pstate will not enable HWP.
>
> Some processors support DEC feature (Dynamic Efficiency Control). But in
> this case HWP must be enabled.
>
> So, enable HWP even if EPP feature is not available but DEC feature is
> present.
>
> When EPP feature is not available don't publish sysfs attributes
> "energy_performance_available_preferences" and
> "energy_performance_preference", but continue to enable HWP.
>
> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
> ---
>  drivers/cpufreq/intel_pstate.c | 35 +++++++++++++++++++++++++++++++---
>  1 file changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> index c28454b16723..d74abe909fbc 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -904,6 +904,11 @@ static struct freq_attr *hwp_cpufreq_attrs[] = {
>         NULL,
>  };
>
> +static struct freq_attr *hwp_cpufreq_default_attrs[] = {
> +       &base_frequency,
> +       NULL,
> +};
> +
>  static bool no_cas __ro_after_init;
>
>  static struct cpudata *hybrid_max_perf_cpu __read_mostly;
> @@ -1370,6 +1375,9 @@ static void intel_pstate_hwp_offline(struct cpudata *cpu)
>  #define POWER_CTL_EE_ENABLE    1
>  #define POWER_CTL_EE_DISABLE   2
>
> +/* Enable bit for Dynamic Efficiency Control (DEC) */
> +#define POWER_CTL_DEC_ENABLE   27
> +
>  static int power_ctl_ee_state;
>
>  static void set_power_ctl_ee_state(bool input)
> @@ -3761,6 +3769,17 @@ static const struct x86_cpu_id intel_hybrid_scaling_factor[] = {
>         {}
>  };
>
> +static bool dec_enabled(void)
> +{
> +       u64 power_ctl;
> +
> +       rdmsrq(MSR_IA32_POWER_CTL, power_ctl);
> +       if (power_ctl & BIT(POWER_CTL_DEC_ENABLE))
> +               return true;
> +
> +       return false;
> +}
> +
>  static int __init intel_pstate_init(void)
>  {
>         static struct cpudata **_all_cpu_data;
> @@ -3793,15 +3812,24 @@ static int __init intel_pstate_init(void)
>                  * Avoid enabling HWP for processors without EPP support,
>                  * because that means incomplete HWP implementation which is a
>                  * corner case and supporting it is generally problematic.
> +                * But when DEC enable bit is set (MSR 0x1FC bit 27), continue
> +                * to enable HWP.
>                  *
>                  * If HWP is enabled already, though, there is no choice but to
>                  * deal with it.
>                  */
> -               if ((!no_hwp && boot_cpu_has(X86_FEATURE_HWP_EPP)) || hwp_forced) {
> +               if (!no_hwp || hwp_forced) {
> +                       if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
> +                               intel_pstate.attr = hwp_cpufreq_attrs;
> +                               intel_cpufreq.attr = hwp_cpufreq_attrs;
> +                       } else if (dec_enabled()) {
> +                               intel_pstate.attr = hwp_cpufreq_default_attrs;
> +                               intel_cpufreq.attr = hwp_cpufreq_default_attrs;
> +                       } else {
> +                               goto skip_hwp_enable;
> +                       }
>                         hwp_active = true;
>                         hwp_mode_bdw = id->driver_data;
> -                       intel_pstate.attr = hwp_cpufreq_attrs;
> -                       intel_cpufreq.attr = hwp_cpufreq_attrs;
>                         intel_cpufreq.flags |= CPUFREQ_NEED_UPDATE_LIMITS;
>                         intel_cpufreq.adjust_perf = intel_cpufreq_adjust_perf;
>                         if (!default_driver)
> @@ -3811,6 +3839,7 @@ static int __init intel_pstate_init(void)
>
>                         goto hwp_cpu_matched;
>                 }
> +skip_hwp_enable:
>                 pr_info("HWP not enabled\n");
>         } else {
>                 if (no_load)
> --

I think that this would work, but then it looks super ad hoc and I'd
like to completely rearrange it.

My (totally untested) version is attached.  Please let me know if this
can be made work for you and if so, I'll turn it into a proper patch.

[-- Attachment #2: cpufreq-intel_pstate-Enable-HWP-without-EPP-feature.patch --]
[-- Type: text/x-patch, Size: 2856 bytes --]

---
 drivers/cpufreq/intel_pstate.c |   53 ++++++++++++++++++++++++++++++++---------
 1 file changed, 42 insertions(+), 11 deletions(-)

--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -897,11 +897,19 @@ static ssize_t show_base_frequency(struc
 
 cpufreq_freq_attr_ro(base_frequency);
 
+enum hwp_cpufreq_attr_index {
+	HWP_BASE_FREQUENCY_INDEX = 0,
+	HWP_PERFORMANCE_PREFERENCE_INDEX,
+	HWP_PERFORMANCE_AVAILABLE_PREFERENCES_INDEX,
+	HWP_CPUFREQ_ATTR_COUNT,
+};
+
 static struct freq_attr *hwp_cpufreq_attrs[] = {
-	&energy_performance_preference,
-	&energy_performance_available_preferences,
-	&base_frequency,
-	NULL,
+	[HWP_BASE_FREQUENCY_INDEX] = &base_frequency,
+	[HWP_PERFORMANCE_PREFERENCE_INDEX] = &energy_performance_preference,
+	[HWP_PERFORMANCE_AVAILABLE_PREFERENCES_INDEX] =
+				&energy_performance_available_preferences,
+	[HWP_CPUFREQ_ATTR_COUNT] = NULL,
 };
 
 static bool no_cas __ro_after_init;
@@ -1370,6 +1378,9 @@ static void intel_pstate_hwp_offline(str
 #define POWER_CTL_EE_ENABLE	1
 #define POWER_CTL_EE_DISABLE	2
 
+/* Enable bit for Dynamic Efficiency Control (DEC) */
+#define POWER_CTL_DEC_ENABLE	27
+
 static int power_ctl_ee_state;
 
 static void set_power_ctl_ee_state(bool input)
@@ -3759,6 +3770,30 @@ static const struct x86_cpu_id intel_hyb
 	{}
 };
 
+static bool hwp_is_supported(void)
+{
+	u64 power_ctl;
+
+	/*
+	 * Avoid enabling HWP for processors without EPP support unless the
+	 * Dynamic Efficiency Control (DEC) enable bit (MSR_IA32_POWER_CTL,
+	 * bit 27) is set because that means incomplete HWP implementation
+	 * which is a corner case and supporting it is generally problematic.
+	 */
+	if (boot_cpu_has(X86_FEATURE_HWP_EPP))
+		return true;
+
+	rdmsrq(MSR_IA32_POWER_CTL, power_ctl);
+	if (!(power_ctl & BIT(POWER_CTL_DEC_ENABLE)))
+		return false;
+
+	/* Without EPP support, don't expose EPP-related sysfs attributes. */
+	hwp_cpufreq_attrs[HWP_PERFORMANCE_PREFERENCE_INDEX] = NULL;
+	hwp_cpufreq_attrs[HWP_PERFORMANCE_AVAILABLE_PREFERENCES_INDEX] = NULL;
+
+	return true;
+}
+
 static int __init intel_pstate_init(void)
 {
 	static struct cpudata **_all_cpu_data;
@@ -3788,14 +3823,10 @@ static int __init intel_pstate_init(void
 
 		copy_cpu_funcs(&core_funcs);
 		/*
-		 * Avoid enabling HWP for processors without EPP support,
-		 * because that means incomplete HWP implementation which is a
-		 * corner case and supporting it is generally problematic.
-		 *
-		 * If HWP is enabled already, though, there is no choice but to
-		 * deal with it.
+		 * If HWP is enabled already, there is no choice but to deal
+		 * with it.
 		 */
-		if ((!no_hwp && boot_cpu_has(X86_FEATURE_HWP_EPP)) || hwp_forced) {
+		if (hwp_forced || (!no_hwp && hwp_is_supported())) {
 			hwp_active = true;
 			hwp_mode_bdw = id->driver_data;
 			intel_pstate.attr = hwp_cpufreq_attrs;

Re: [PATCH 2/2] cpufreq: intel_pstate: Enable HWP without EPP feature

[Rafael J. Wysocki]

[-- Attachment #1: Type: text/plain, Size: 4879 bytes --]

On Fri, Sep 5, 2025 at 11:02 PM Rafael J. Wysocki <rafael@kernel.org> wrote:
>
> On Thu, Sep 4, 2025 at 2:06 AM Srinivas Pandruvada
> <srinivas.pandruvada@linux.intel.com> wrote:
> >
> > When EPP feature is not available (CPUID CPUID.06H:EAX[10] is not set),
> > intel_pstate will not enable HWP.
> >
> > Some processors support DEC feature (Dynamic Efficiency Control). But in
> > this case HWP must be enabled.
> >
> > So, enable HWP even if EPP feature is not available but DEC feature is
> > present.
> >
> > When EPP feature is not available don't publish sysfs attributes
> > "energy_performance_available_preferences" and
> > "energy_performance_preference", but continue to enable HWP.
> >
> > Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
> > ---
> >  drivers/cpufreq/intel_pstate.c | 35 +++++++++++++++++++++++++++++++---
> >  1 file changed, 32 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> > index c28454b16723..d74abe909fbc 100644
> > --- a/drivers/cpufreq/intel_pstate.c
> > +++ b/drivers/cpufreq/intel_pstate.c
> > @@ -904,6 +904,11 @@ static struct freq_attr *hwp_cpufreq_attrs[] = {
> >         NULL,
> >  };
> >
> > +static struct freq_attr *hwp_cpufreq_default_attrs[] = {
> > +       &base_frequency,
> > +       NULL,
> > +};
> > +
> >  static bool no_cas __ro_after_init;
> >
> >  static struct cpudata *hybrid_max_perf_cpu __read_mostly;
> > @@ -1370,6 +1375,9 @@ static void intel_pstate_hwp_offline(struct cpudata *cpu)
> >  #define POWER_CTL_EE_ENABLE    1
> >  #define POWER_CTL_EE_DISABLE   2
> >
> > +/* Enable bit for Dynamic Efficiency Control (DEC) */
> > +#define POWER_CTL_DEC_ENABLE   27
> > +
> >  static int power_ctl_ee_state;
> >
> >  static void set_power_ctl_ee_state(bool input)
> > @@ -3761,6 +3769,17 @@ static const struct x86_cpu_id intel_hybrid_scaling_factor[] = {
> >         {}
> >  };
> >
> > +static bool dec_enabled(void)
> > +{
> > +       u64 power_ctl;
> > +
> > +       rdmsrq(MSR_IA32_POWER_CTL, power_ctl);
> > +       if (power_ctl & BIT(POWER_CTL_DEC_ENABLE))
> > +               return true;
> > +
> > +       return false;
> > +}
> > +
> >  static int __init intel_pstate_init(void)
> >  {
> >         static struct cpudata **_all_cpu_data;
> > @@ -3793,15 +3812,24 @@ static int __init intel_pstate_init(void)
> >                  * Avoid enabling HWP for processors without EPP support,
> >                  * because that means incomplete HWP implementation which is a
> >                  * corner case and supporting it is generally problematic.
> > +                * But when DEC enable bit is set (MSR 0x1FC bit 27), continue
> > +                * to enable HWP.
> >                  *
> >                  * If HWP is enabled already, though, there is no choice but to
> >                  * deal with it.
> >                  */
> > -               if ((!no_hwp && boot_cpu_has(X86_FEATURE_HWP_EPP)) || hwp_forced) {
> > +               if (!no_hwp || hwp_forced) {
> > +                       if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
> > +                               intel_pstate.attr = hwp_cpufreq_attrs;
> > +                               intel_cpufreq.attr = hwp_cpufreq_attrs;
> > +                       } else if (dec_enabled()) {
> > +                               intel_pstate.attr = hwp_cpufreq_default_attrs;
> > +                               intel_cpufreq.attr = hwp_cpufreq_default_attrs;
> > +                       } else {
> > +                               goto skip_hwp_enable;
> > +                       }
> >                         hwp_active = true;
> >                         hwp_mode_bdw = id->driver_data;
> > -                       intel_pstate.attr = hwp_cpufreq_attrs;
> > -                       intel_cpufreq.attr = hwp_cpufreq_attrs;
> >                         intel_cpufreq.flags |= CPUFREQ_NEED_UPDATE_LIMITS;
> >                         intel_cpufreq.adjust_perf = intel_cpufreq_adjust_perf;
> >                         if (!default_driver)
> > @@ -3811,6 +3839,7 @@ static int __init intel_pstate_init(void)
> >
> >                         goto hwp_cpu_matched;
> >                 }
> > +skip_hwp_enable:
> >                 pr_info("HWP not enabled\n");
> >         } else {
> >                 if (no_load)
> > --
>
> I think that this would work, but then it looks super ad hoc and I'd
> like to completely rearrange it.
>
> My (totally untested) version is attached.  Please let me know if this
> can be made work for you and if so, I'll turn it into a proper patch.

Bah, the EPP-related attributes need to be hidden when EPP is not
there, even if hwp_forced is set.

Attached is a new version, please let me know if it works for you.

[-- Attachment #2: intel_pstate-Enable-HWP-without-EPP-v2.patch --]
[-- Type: text/x-patch, Size: 3295 bytes --]

---
 drivers/cpufreq/intel_pstate.c |   72 +++++++++++++++++++++++++++++++----------
 1 file changed, 56 insertions(+), 16 deletions(-)

--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -897,11 +897,19 @@ static ssize_t show_base_frequency(struc
 
 cpufreq_freq_attr_ro(base_frequency);
 
+enum hwp_cpufreq_attr_index {
+	HWP_BASE_FREQUENCY_INDEX = 0,
+	HWP_PERFORMANCE_PREFERENCE_INDEX,
+	HWP_PERFORMANCE_AVAILABLE_PREFERENCES_INDEX,
+	HWP_CPUFREQ_ATTR_COUNT,
+};
+
 static struct freq_attr *hwp_cpufreq_attrs[] = {
-	&energy_performance_preference,
-	&energy_performance_available_preferences,
-	&base_frequency,
-	NULL,
+	[HWP_BASE_FREQUENCY_INDEX] = &base_frequency,
+	[HWP_PERFORMANCE_PREFERENCE_INDEX] = &energy_performance_preference,
+	[HWP_PERFORMANCE_AVAILABLE_PREFERENCES_INDEX] =
+				&energy_performance_available_preferences,
+	[HWP_CPUFREQ_ATTR_COUNT] = NULL,
 };
 
 static bool no_cas __ro_after_init;
@@ -1370,6 +1378,9 @@ static void intel_pstate_hwp_offline(str
 #define POWER_CTL_EE_ENABLE	1
 #define POWER_CTL_EE_DISABLE	2
 
+/* Enable bit for Dynamic Efficiency Control (DEC) */
+#define POWER_CTL_DEC_ENABLE	27
+
 static int power_ctl_ee_state;
 
 static void set_power_ctl_ee_state(bool input)
@@ -3758,6 +3769,26 @@ static const struct x86_cpu_id intel_hyb
 	{}
 };
 
+static bool hwp_check_epp(void)
+{
+	if (boot_cpu_has(X86_FEATURE_HWP_EPP))
+		return true;
+
+	/* Without EPP support, don't expose EPP-related sysfs attributes. */
+	hwp_cpufreq_attrs[HWP_PERFORMANCE_PREFERENCE_INDEX] = NULL;
+	hwp_cpufreq_attrs[HWP_PERFORMANCE_AVAILABLE_PREFERENCES_INDEX] = NULL;
+
+	return false;
+}
+
+static bool hwp_check_dec(void)
+{
+	u64 power_ctl;
+
+	rdmsrq(MSR_IA32_POWER_CTL, power_ctl);
+	return !!(power_ctl & BIT(POWER_CTL_DEC_ENABLE));
+}
+
 static int __init intel_pstate_init(void)
 {
 	static struct cpudata **_all_cpu_data;
@@ -3778,23 +3809,32 @@ static int __init intel_pstate_init(void
 
 	id = x86_match_cpu(hwp_support_ids);
 	if (id) {
-		hwp_forced = intel_pstate_hwp_is_enabled();
+		bool epp_present = hwp_check_epp();
 
-		if (hwp_forced)
+		/*
+		 * If HWP is enabled already, there is no choice but to deal
+		 * with it.
+		 */
+		hwp_forced = intel_pstate_hwp_is_enabled();
+		if (hwp_forced) {
 			pr_info("HWP enabled by BIOS\n");
-		else if (no_load)
+			no_hwp = 0;
+		} else if (no_load) {
 			return -ENODEV;
+		} else if (!epp_present && !hwp_check_dec()) {
+			/*
+			 * Avoid enabling HWP for processors without EPP support
+			 * unless the Dynamic Efficiency Control (DEC) enable
+			 * bit (MSR_IA32_POWER_CTL, bit 27) is set because that
+			 * means incomplete HWP implementation which is a corner
+			 * case and supporting it is generally problematic.
+			 */
+			no_hwp = 1;
+		}
 
 		copy_cpu_funcs(&core_funcs);
-		/*
-		 * Avoid enabling HWP for processors without EPP support,
-		 * because that means incomplete HWP implementation which is a
-		 * corner case and supporting it is generally problematic.
-		 *
-		 * If HWP is enabled already, though, there is no choice but to
-		 * deal with it.
-		 */
-		if ((!no_hwp && boot_cpu_has(X86_FEATURE_HWP_EPP)) || hwp_forced) {
+
+		if (!no_hwp) {
 			hwp_active = true;
 			hwp_mode_bdw = id->driver_data;
 			intel_pstate.attr = hwp_cpufreq_attrs;

Re: [PATCH 2/2] cpufreq: intel_pstate: Enable HWP without EPP feature

[Rafael J. Wysocki]

On Sat, Sep 6, 2025 at 6:13 PM Rafael J. Wysocki <rafael@kernel.org> wrote:
>
> On Fri, Sep 5, 2025 at 11:02 PM Rafael J. Wysocki <rafael@kernel.org> wrote:
> >
> > On Thu, Sep 4, 2025 at 2:06 AM Srinivas Pandruvada
> > <srinivas.pandruvada@linux.intel.com> wrote:
> > >
> > > When EPP feature is not available (CPUID CPUID.06H:EAX[10] is not set),
> > > intel_pstate will not enable HWP.
> > >
> > > Some processors support DEC feature (Dynamic Efficiency Control). But in
> > > this case HWP must be enabled.
> > >
> > > So, enable HWP even if EPP feature is not available but DEC feature is
> > > present.
> > >
> > > When EPP feature is not available don't publish sysfs attributes
> > > "energy_performance_available_preferences" and
> > > "energy_performance_preference", but continue to enable HWP.
> > >
> > > Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
> > > ---
> > >  drivers/cpufreq/intel_pstate.c | 35 +++++++++++++++++++++++++++++++---
> > >  1 file changed, 32 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> > > index c28454b16723..d74abe909fbc 100644
> > > --- a/drivers/cpufreq/intel_pstate.c
> > > +++ b/drivers/cpufreq/intel_pstate.c
> > > @@ -904,6 +904,11 @@ static struct freq_attr *hwp_cpufreq_attrs[] = {
> > >         NULL,
> > >  };
> > >
> > > +static struct freq_attr *hwp_cpufreq_default_attrs[] = {
> > > +       &base_frequency,
> > > +       NULL,
> > > +};
> > > +
> > >  static bool no_cas __ro_after_init;
> > >
> > >  static struct cpudata *hybrid_max_perf_cpu __read_mostly;
> > > @@ -1370,6 +1375,9 @@ static void intel_pstate_hwp_offline(struct cpudata *cpu)
> > >  #define POWER_CTL_EE_ENABLE    1
> > >  #define POWER_CTL_EE_DISABLE   2
> > >
> > > +/* Enable bit for Dynamic Efficiency Control (DEC) */
> > > +#define POWER_CTL_DEC_ENABLE   27
> > > +
> > >  static int power_ctl_ee_state;
> > >
> > >  static void set_power_ctl_ee_state(bool input)
> > > @@ -3761,6 +3769,17 @@ static const struct x86_cpu_id intel_hybrid_scaling_factor[] = {
> > >         {}
> > >  };
> > >
> > > +static bool dec_enabled(void)
> > > +{
> > > +       u64 power_ctl;
> > > +
> > > +       rdmsrq(MSR_IA32_POWER_CTL, power_ctl);
> > > +       if (power_ctl & BIT(POWER_CTL_DEC_ENABLE))
> > > +               return true;
> > > +
> > > +       return false;
> > > +}
> > > +
> > >  static int __init intel_pstate_init(void)
> > >  {
> > >         static struct cpudata **_all_cpu_data;
> > > @@ -3793,15 +3812,24 @@ static int __init intel_pstate_init(void)
> > >                  * Avoid enabling HWP for processors without EPP support,
> > >                  * because that means incomplete HWP implementation which is a
> > >                  * corner case and supporting it is generally problematic.
> > > +                * But when DEC enable bit is set (MSR 0x1FC bit 27), continue
> > > +                * to enable HWP.
> > >                  *
> > >                  * If HWP is enabled already, though, there is no choice but to
> > >                  * deal with it.
> > >                  */
> > > -               if ((!no_hwp && boot_cpu_has(X86_FEATURE_HWP_EPP)) || hwp_forced) {
> > > +               if (!no_hwp || hwp_forced) {
> > > +                       if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
> > > +                               intel_pstate.attr = hwp_cpufreq_attrs;
> > > +                               intel_cpufreq.attr = hwp_cpufreq_attrs;
> > > +                       } else if (dec_enabled()) {
> > > +                               intel_pstate.attr = hwp_cpufreq_default_attrs;
> > > +                               intel_cpufreq.attr = hwp_cpufreq_default_attrs;
> > > +                       } else {
> > > +                               goto skip_hwp_enable;
> > > +                       }
> > >                         hwp_active = true;
> > >                         hwp_mode_bdw = id->driver_data;
> > > -                       intel_pstate.attr = hwp_cpufreq_attrs;
> > > -                       intel_cpufreq.attr = hwp_cpufreq_attrs;
> > >                         intel_cpufreq.flags |= CPUFREQ_NEED_UPDATE_LIMITS;
> > >                         intel_cpufreq.adjust_perf = intel_cpufreq_adjust_perf;
> > >                         if (!default_driver)
> > > @@ -3811,6 +3839,7 @@ static int __init intel_pstate_init(void)
> > >
> > >                         goto hwp_cpu_matched;
> > >                 }
> > > +skip_hwp_enable:
> > >                 pr_info("HWP not enabled\n");
> > >         } else {
> > >                 if (no_load)
> > > --
> >
> > I think that this would work, but then it looks super ad hoc and I'd
> > like to completely rearrange it.
> >
> > My (totally untested) version is attached.  Please let me know if this
> > can be made work for you and if so, I'll turn it into a proper patch.
>
> Bah, the EPP-related attributes need to be hidden when EPP is not
> there, even if hwp_forced is set.
>
> Attached is a new version, please let me know if it works for you.

Any chance to have a look at the latest patch?

Re: [PATCH 2/2] cpufreq: intel_pstate: Enable HWP without EPP feature

[srinivas pandruvada]

On Wed, 2025-09-10 at 12:08 +0200, Rafael J. Wysocki wrote:
> On Sat, Sep 6, 2025 at 6:13 PM Rafael J. Wysocki <rafael@kernel.org>
> wrote:
> > 
> > On Fri, Sep 5, 2025 at 11:02 PM Rafael J. Wysocki
> > <rafael@kernel.org> wrote:
> > > 
> > > On Thu, Sep 4, 2025 at 2:06 AM Srinivas Pandruvada
> > > <srinivas.pandruvada@linux.intel.com> wrote:
> > > > 
> > > > When EPP feature is not available (CPUID CPUID.06H:EAX[10] is
> > > > not set),
> > > > intel_pstate will not enable HWP.
> > > > 
> > > > Some processors support DEC feature (Dynamic Efficiency
> > > > Control). But in
> > > > this case HWP must be enabled.
> > > > 
> > > > So, enable HWP even if EPP feature is not available but DEC
> > > > feature is
> > > > present.
> > > > 
> > > > When EPP feature is not available don't publish sysfs
> > > > attributes
> > > > "energy_performance_available_preferences" and
> > > > "energy_performance_preference", but continue to enable HWP.
> > > > 
> > > > 

[...]

> > 
> > Attached is a new version, please let me know if it works for you.
> 
> Any chance to have a look at the latest patch?
That patch looks good.

Thanks,
Srinivas