public inbox for linux-pm@vger.kernel.org
 help / color / mirror / Atom feed
* [PATCH v2 0/6] Improvements to PCI hibernate path
@ 2026-04-27 20:50 Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 1/6] PCI: Stop setting cached power state to "unknown" on unbind Mario Limonciello (AMD)
                   ` (5 more replies)
  0 siblings, 6 replies; 7+ messages in thread
From: Mario Limonciello (AMD) @ 2026-04-27 20:50 UTC (permalink / raw)
  To: Bjorn Helgaas, open list:PCI SUBSYSTEM
  Cc: open list:PCI SUBSYSTEM, open list, Rafael J . Wysocki,
	Lukas Wunner, linux-pm, Mario Limonciello (AMD)

A few cycles ago I sent out a kernel series for using the S4 paths when
the system goes to S5.  Some parts of it got merged, and Rafael suggested
to split the other parts into smaller pieces across multiple kernel cycles
to make bisecting easier.

This fell into my backlog behind other things, so I wanted to try again
this cycle for the PCI pieces. I have been carrying it, rebasing it and
personally using it for a while now though.

This series attempts to unify the PCI suspend and hibernate paths and to
fix some things that I observed to be wrong with how I expect hibernate
to work.

Based off v7.1-rc1

v2:
 - Include Lukas' patch from pci/pm directly in series so Sashiko can
   better review.
 - Include linux-pm in CC.

Lukas Wunner (1):
  PCI: Stop setting cached power state to "unknown" on unbind

Mario Limonciello (AMD) (5):
  PCI/PM: Disable device wakeups when halting or powering off system
  PCI/PM: Split out code from pci_pm_suspend_noirq() into helper
  PCI/PM: Run bridge power up actions as part of restore phase
  PCI/PM: Use pci_power_manageable() in pci_pm_poweroff_noirq()
  PCI: Put PCIe bridges with downstream devices into D3 at hibernate

 drivers/pci/pci-driver.c | 109 +++++++++++++++++++++++++--------------
 1 file changed, 69 insertions(+), 40 deletions(-)

-- 
2.53.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v2 1/6] PCI: Stop setting cached power state to "unknown" on unbind
  2026-04-27 20:50 [PATCH v2 0/6] Improvements to PCI hibernate path Mario Limonciello (AMD)
@ 2026-04-27 20:50 ` Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 2/6] PCI/PM: Disable device wakeups when halting or powering off system Mario Limonciello (AMD)
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: Mario Limonciello (AMD) @ 2026-04-27 20:50 UTC (permalink / raw)
  To: Bjorn Helgaas, open list:PCI SUBSYSTEM
  Cc: open list:PCI SUBSYSTEM, open list, Rafael J . Wysocki,
	Lukas Wunner, linux-pm, Mario Limonciello (AMD)

From: Lukas Wunner <lukas@wunner.de>

When a PCI device is unbound from its driver, pci_device_remove() sets the
cached power state in pci_dev->current_state to PCI_UNKNOWN.  This was
introduced by commit 2449e06a5696 ("PCI: reset pci device state to unknown
state for resume") to invalidate the cached power state in case the system
is subsequently put to sleep.

For bound devices, the cached power state is set to PCI_UNKNOWN in
pci_pm_suspend_noirq(), immediately before entering system sleep.

Extend to unbound devices for consistency.

This obviates the need to change the cached power state on unbind, so stop
doing so.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>
---
 drivers/pci/pci-driver.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index d10ece0889f0f..2bfefd8db5260 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -512,13 +512,6 @@ static void pci_device_remove(struct device *dev)
 	/* Undo the runtime PM settings in local_pci_probe() */
 	pm_runtime_put_sync(dev);
 
-	/*
-	 * If the device is still on, set the power state as "unknown",
-	 * since it might change by the next time we load the driver.
-	 */
-	if (pci_dev->current_state == PCI_D0)
-		pci_dev->current_state = PCI_UNKNOWN;
-
 	/*
 	 * We would love to complain here if pci_dev->is_enabled is set, that
 	 * the driver should have called pci_disable_device(), but the
@@ -893,7 +886,7 @@ static int pci_pm_suspend_noirq(struct device *dev)
 
 	if (!pm) {
 		pci_save_state(pci_dev);
-		goto Fixup;
+		goto set_unknown;
 	}
 
 	if (pm->suspend_noirq) {
@@ -945,6 +938,7 @@ static int pci_pm_suspend_noirq(struct device *dev)
 		goto Fixup;
 	}
 
+set_unknown:
 	pci_pm_set_unknown_state(pci_dev);
 
 	/*
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH v2 2/6] PCI/PM: Disable device wakeups when halting or powering off system
  2026-04-27 20:50 [PATCH v2 0/6] Improvements to PCI hibernate path Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 1/6] PCI: Stop setting cached power state to "unknown" on unbind Mario Limonciello (AMD)
@ 2026-04-27 20:50 ` Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 3/6] PCI/PM: Split out code from pci_pm_suspend_noirq() into helper Mario Limonciello (AMD)
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: Mario Limonciello (AMD) @ 2026-04-27 20:50 UTC (permalink / raw)
  To: Bjorn Helgaas, open list:PCI SUBSYSTEM
  Cc: open list:PCI SUBSYSTEM, open list, Rafael J . Wysocki,
	Lukas Wunner, linux-pm, Mario Limonciello (AMD), Eric Naim

PCI devices can be configured as wakeup sources from low power states.
However, when the system is powering off such wakeups are not expected
and may lead to spurious behavior.

ACPI r6.5, section 16.1.5 notes:

    "Hardware does allow a transition to S0 due to power button press
     or a Remote Start."

This implies that wakeups from PCI devices should not be relied upon
in these states. To align with this expectation and avoid unintended
wakeups, disable device wakeup capability during these transitions.

Tested-by: Eric Naim <dnaim@cachyos.org>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
---
 drivers/pci/pci-driver.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 2bfefd8db5260..a43ee7bbfb3f5 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -1166,6 +1166,9 @@ static int pci_pm_poweroff(struct device *dev)
 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
 
+	if (device_may_wakeup(dev) && system_state == SYSTEM_POWER_OFF)
+		device_set_wakeup_enable(dev, false);
+
 	if (pci_has_legacy_pm_support(pci_dev))
 		return pci_legacy_suspend(dev, PMSG_HIBERNATE);
 
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH v2 3/6] PCI/PM: Split out code from pci_pm_suspend_noirq() into helper
  2026-04-27 20:50 [PATCH v2 0/6] Improvements to PCI hibernate path Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 1/6] PCI: Stop setting cached power state to "unknown" on unbind Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 2/6] PCI/PM: Disable device wakeups when halting or powering off system Mario Limonciello (AMD)
@ 2026-04-27 20:50 ` Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 4/6] PCI/PM: Run bridge power up actions as part of restore phase Mario Limonciello (AMD)
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: Mario Limonciello (AMD) @ 2026-04-27 20:50 UTC (permalink / raw)
  To: Bjorn Helgaas, open list:PCI SUBSYSTEM
  Cc: open list:PCI SUBSYSTEM, open list, Rafael J . Wysocki,
	Lukas Wunner, linux-pm, Mario Limonciello (AMD), Eric Naim

In order to unify suspend and hibernate codepaths without code duplication
the common code should be in common helpers.  Move it from
pci_pm_suspend_noirq() into a helper.  No intended functional changes.

Tested-by: Eric Naim <dnaim@cachyos.org>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
---
 drivers/pci/pci-driver.c | 86 +++++++++++++++++++++++++---------------
 1 file changed, 54 insertions(+), 32 deletions(-)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index a43ee7bbfb3f5..bfb521eb0eed7 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -788,6 +788,54 @@ static void pci_pm_complete(struct device *dev)
 
 #endif /* !CONFIG_PM_SLEEP */
 
+#if defined(CONFIG_SUSPEND)
+/**
+ * pci_pm_suspend_noirq_common
+ * @pci_dev: pci device
+ * @skip_bus_pm: pointer to a boolean indicating whether to skip bus PM
+ *
+ * Prepare the device to go into a low power state by saving state and
+ * deciding whether to skip bus PM.
+ *
+ */
+static void pci_pm_suspend_noirq_common(struct pci_dev *pci_dev, bool *skip_bus_pm)
+{
+	if (!pci_dev->state_saved) {
+		pci_save_state(pci_dev);
+
+		/*
+		 * If the device is a bridge with a child in D0 below it,
+		 * it needs to stay in D0, so check skip_bus_pm to avoid
+		 * putting it into a low-power state in that case.
+		 */
+		if (!pci_dev->skip_bus_pm && pci_power_manageable(pci_dev))
+			pci_prepare_to_sleep(pci_dev);
+	}
+
+	pci_dbg(pci_dev, "PCI PM: Sleep power state: %s\n",
+		pci_power_name(pci_dev->current_state));
+
+	if (pci_dev->current_state == PCI_D0) {
+		pci_dev->skip_bus_pm = true;
+		/*
+		 * Per PCI PM r1.2, table 6-1, a bridge must be in D0 if any
+		 * downstream device is in D0, so avoid changing the power state
+		 * of the parent bridge by setting the skip_bus_pm flag for it.
+		 */
+		if (pci_dev->bus->self)
+			pci_dev->bus->self->skip_bus_pm = true;
+	}
+
+	if (pci_dev->skip_bus_pm && pm_suspend_no_platform()) {
+		pci_dbg(pci_dev, "PCI PM: Skipped\n");
+		*skip_bus_pm = true;
+		return;
+	}
+
+	pci_pm_set_unknown_state(pci_dev);
+}
+#endif /* CONFIG_SUSPEND */
+
 #ifdef CONFIG_SUSPEND
 static void pcie_pme_root_status_cleanup(struct pci_dev *pci_dev)
 {
@@ -877,6 +925,7 @@ static int pci_pm_suspend_noirq(struct device *dev)
 {
 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+	bool skip_bus_pm = false;
 
 	if (dev_pm_skip_suspend(dev))
 		return 0;
@@ -886,7 +935,8 @@ static int pci_pm_suspend_noirq(struct device *dev)
 
 	if (!pm) {
 		pci_save_state(pci_dev);
-		goto set_unknown;
+		pci_pm_set_unknown_state(pci_dev);
+		goto Ehci_workaround;
 	}
 
 	if (pm->suspend_noirq) {
@@ -907,40 +957,12 @@ static int pci_pm_suspend_noirq(struct device *dev)
 		}
 	}
 
-	if (!pci_dev->state_saved) {
-		pci_save_state(pci_dev);
-
-		/*
-		 * If the device is a bridge with a child in D0 below it,
-		 * it needs to stay in D0, so check skip_bus_pm to avoid
-		 * putting it into a low-power state in that case.
-		 */
-		if (!pci_dev->skip_bus_pm && pci_power_manageable(pci_dev))
-			pci_prepare_to_sleep(pci_dev);
-	}
-
-	pci_dbg(pci_dev, "PCI PM: Suspend power state: %s\n",
-		pci_power_name(pci_dev->current_state));
+	pci_pm_suspend_noirq_common(pci_dev, &skip_bus_pm);
 
-	if (pci_dev->current_state == PCI_D0) {
-		pci_dev->skip_bus_pm = true;
-		/*
-		 * Per PCI PM r1.2, table 6-1, a bridge must be in D0 if any
-		 * downstream device is in D0, so avoid changing the power state
-		 * of the parent bridge by setting the skip_bus_pm flag for it.
-		 */
-		if (pci_dev->bus->self)
-			pci_dev->bus->self->skip_bus_pm = true;
-	}
-
-	if (pci_dev->skip_bus_pm && pm_suspend_no_platform()) {
-		pci_dbg(pci_dev, "PCI PM: Skipped\n");
+	if (skip_bus_pm)
 		goto Fixup;
-	}
-
-set_unknown:
-	pci_pm_set_unknown_state(pci_dev);
 
+Ehci_workaround:
 	/*
 	 * Some BIOSes from ASUS have a bug: If a USB EHCI host controller's
 	 * PCI COMMAND register isn't 0, the BIOS assumes that the controller
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH v2 4/6] PCI/PM: Run bridge power up actions as part of restore phase
  2026-04-27 20:50 [PATCH v2 0/6] Improvements to PCI hibernate path Mario Limonciello (AMD)
                   ` (2 preceding siblings ...)
  2026-04-27 20:50 ` [PATCH v2 3/6] PCI/PM: Split out code from pci_pm_suspend_noirq() into helper Mario Limonciello (AMD)
@ 2026-04-27 20:50 ` Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 5/6] PCI/PM: Use pci_power_manageable() in pci_pm_poweroff_noirq() Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 6/6] PCI: Put PCIe bridges with downstream devices into D3 at hibernate Mario Limonciello (AMD)
  5 siblings, 0 replies; 7+ messages in thread
From: Mario Limonciello (AMD) @ 2026-04-27 20:50 UTC (permalink / raw)
  To: Bjorn Helgaas, open list:PCI SUBSYSTEM
  Cc: open list:PCI SUBSYSTEM, open list, Rafael J . Wysocki,
	Lukas Wunner, linux-pm, Mario Limonciello (AMD), Eric Naim

Suspend resume actions will check the state of the device and whether
bus PM should be skipped.  These same actions make sense during hibernation
image restore.  Apply them there as well.

Tested-by: Eric Naim <dnaim@cachyos.org>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
---
 drivers/pci/pci-driver.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index bfb521eb0eed7..793af4af2971b 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -1273,10 +1273,15 @@ static int pci_pm_restore_noirq(struct device *dev)
 {
 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+	pci_power_t prev_state = pci_dev->current_state;
+	bool skip_bus_pm = pci_dev->skip_bus_pm;
 
 	pci_pm_default_resume_early(pci_dev);
 	pci_fixup_device(pci_fixup_resume_early, pci_dev);
 
+	if (!skip_bus_pm && prev_state == PCI_D3cold)
+		pci_pm_bridge_power_up_actions(pci_dev);
+
 	if (pci_has_legacy_pm_support(pci_dev))
 		return 0;
 
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH v2 5/6] PCI/PM: Use pci_power_manageable() in pci_pm_poweroff_noirq()
  2026-04-27 20:50 [PATCH v2 0/6] Improvements to PCI hibernate path Mario Limonciello (AMD)
                   ` (3 preceding siblings ...)
  2026-04-27 20:50 ` [PATCH v2 4/6] PCI/PM: Run bridge power up actions as part of restore phase Mario Limonciello (AMD)
@ 2026-04-27 20:50 ` Mario Limonciello (AMD)
  2026-04-27 20:50 ` [PATCH v2 6/6] PCI: Put PCIe bridges with downstream devices into D3 at hibernate Mario Limonciello (AMD)
  5 siblings, 0 replies; 7+ messages in thread
From: Mario Limonciello (AMD) @ 2026-04-27 20:50 UTC (permalink / raw)
  To: Bjorn Helgaas, open list:PCI SUBSYSTEM
  Cc: open list:PCI SUBSYSTEM, open list, Rafael J . Wysocki,
	Lukas Wunner, linux-pm, Mario Limonciello (AMD), Eric Naim

Devices with no subordinate should be put into D3 during hibernate, but
devices that have bridge_d3 set should also be put to sleep during
hibernate. Adjust the check in pci_pm_poweroff_noirq() to use
pci_power_manageable() to cover those as well.

Tested-by: Eric Naim <dnaim@cachyos.org>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
---
 drivers/pci/pci-driver.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 793af4af2971b..3c82d818ee15b 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -1254,7 +1254,7 @@ static int pci_pm_poweroff_noirq(struct device *dev)
 			return error;
 	}
 
-	if (!pci_dev->state_saved && !pci_has_subordinate(pci_dev))
+	if (!pci_dev->state_saved && pci_power_manageable(pci_dev))
 		pci_prepare_to_sleep(pci_dev);
 
 	/*
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH v2 6/6] PCI: Put PCIe bridges with downstream devices into D3 at hibernate
  2026-04-27 20:50 [PATCH v2 0/6] Improvements to PCI hibernate path Mario Limonciello (AMD)
                   ` (4 preceding siblings ...)
  2026-04-27 20:50 ` [PATCH v2 5/6] PCI/PM: Use pci_power_manageable() in pci_pm_poweroff_noirq() Mario Limonciello (AMD)
@ 2026-04-27 20:50 ` Mario Limonciello (AMD)
  5 siblings, 0 replies; 7+ messages in thread
From: Mario Limonciello (AMD) @ 2026-04-27 20:50 UTC (permalink / raw)
  To: Bjorn Helgaas, open list:PCI SUBSYSTEM
  Cc: open list:PCI SUBSYSTEM, open list, Rafael J . Wysocki,
	Lukas Wunner, linux-pm, Mario Limonciello (AMD), AceLan Kao,
	Kai-Heng Feng, Mark Pearson, Denis Benato, Merthan Karakaş,
	Eric Naim

During suspend, PCIe bridges with downstream devices are transitioned into
a low power state (D3hot or D3cold) depending on platform capabilities.
However, during hibernate, these bridges remain in D0, which can lead to
unnecessary power consumption.

Align the hibernate flow with suspend by updating pci_pm_poweroff_noirq()
to use pci_pm_suspend_noirq_common(). This ensures that PCIe bridges with
active downstream devices are properly transitioned to a low power state
during hibernate.

This change introduces a functional update: the hibernate path will now
invoke pci_save_state(), and — unless bus-level power management is
skipped — will transition the bridge into D3hot or D3cold as appropriate.

Cc: AceLan Kao <acelan.kao@canonical.com>
Cc: Kai-Heng Feng <kaihengf@nvidia.com>
Cc: Mark Pearson <mpearson-lenovo@squebb.ca>
Cc: Denis Benato <benato.denis96@gmail.com>
Cc: Merthan Karakaş <m3rthn.k@gmail.com>
Tested-by: Eric Naim <dnaim@cachyos.org>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
---
 drivers/pci/pci-driver.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 3c82d818ee15b..50eca518493b8 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -788,7 +788,7 @@ static void pci_pm_complete(struct device *dev)
 
 #endif /* !CONFIG_PM_SLEEP */
 
-#if defined(CONFIG_SUSPEND)
+#if defined(CONFIG_SUSPEND) || defined(CONFIG_HIBERNATE_CALLBACKS)
 /**
  * pci_pm_suspend_noirq_common
  * @pci_dev: pci device
@@ -834,7 +834,7 @@ static void pci_pm_suspend_noirq_common(struct pci_dev *pci_dev, bool *skip_bus_
 
 	pci_pm_set_unknown_state(pci_dev);
 }
-#endif /* CONFIG_SUSPEND */
+#endif /* CONFIG_SUSPEND || CONFIG_HIBERNATE_CALLBACKS */
 
 #ifdef CONFIG_SUSPEND
 static void pcie_pme_root_status_cleanup(struct pci_dev *pci_dev)
@@ -1191,6 +1191,8 @@ static int pci_pm_poweroff(struct device *dev)
 	if (device_may_wakeup(dev) && system_state == SYSTEM_POWER_OFF)
 		device_set_wakeup_enable(dev, false);
 
+	pci_dev->skip_bus_pm = false;
+
 	if (pci_has_legacy_pm_support(pci_dev))
 		return pci_legacy_suspend(dev, PMSG_HIBERNATE);
 
@@ -1233,6 +1235,7 @@ static int pci_pm_poweroff_noirq(struct device *dev)
 {
 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+	bool skip_bus_pm = false;
 
 	if (dev_pm_skip_suspend(dev))
 		return 0;
@@ -1254,8 +1257,9 @@ static int pci_pm_poweroff_noirq(struct device *dev)
 			return error;
 	}
 
-	if (!pci_dev->state_saved && pci_power_manageable(pci_dev))
-		pci_prepare_to_sleep(pci_dev);
+	pci_pm_suspend_noirq_common(pci_dev, &skip_bus_pm);
+	if (skip_bus_pm)
+		goto Fixup;
 
 	/*
 	 * The reason for doing this here is the same as for the analogous code
@@ -1264,6 +1268,7 @@ static int pci_pm_poweroff_noirq(struct device *dev)
 	if (pci_dev->class == PCI_CLASS_SERIAL_USB_EHCI)
 		pci_write_config_word(pci_dev, PCI_COMMAND, 0);
 
+Fixup:
 	pci_fixup_device(pci_fixup_suspend_late, pci_dev);
 
 	return 0;
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2026-04-27 20:50 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-04-27 20:50 [PATCH v2 0/6] Improvements to PCI hibernate path Mario Limonciello (AMD)
2026-04-27 20:50 ` [PATCH v2 1/6] PCI: Stop setting cached power state to "unknown" on unbind Mario Limonciello (AMD)
2026-04-27 20:50 ` [PATCH v2 2/6] PCI/PM: Disable device wakeups when halting or powering off system Mario Limonciello (AMD)
2026-04-27 20:50 ` [PATCH v2 3/6] PCI/PM: Split out code from pci_pm_suspend_noirq() into helper Mario Limonciello (AMD)
2026-04-27 20:50 ` [PATCH v2 4/6] PCI/PM: Run bridge power up actions as part of restore phase Mario Limonciello (AMD)
2026-04-27 20:50 ` [PATCH v2 5/6] PCI/PM: Use pci_power_manageable() in pci_pm_poweroff_noirq() Mario Limonciello (AMD)
2026-04-27 20:50 ` [PATCH v2 6/6] PCI: Put PCIe bridges with downstream devices into D3 at hibernate Mario Limonciello (AMD)

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox