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From: Gregory CLEMENT <gregory.clement@free-electrons.com>
To: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	linux-pm@vger.kernel.org, Jason Cooper <jason@lakedaemon.net>,
	Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Lior Amsalem <alior@marvell.com>,
	Tawfik Bayouk <tawfik@marvell.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 15/16] ARM: mvebu: Add CPU idle support for Armada 38x
Date: Thu, 03 Jul 2014 17:29:57 +0200	[thread overview]
Message-ID: <53B576F5.6080508@free-electrons.com> (raw)
In-Reply-To: <20140630170741.73256ba0@free-electrons.com>

Hi Thomas,


>> Unlike the Armada XP and the Armada 370, this SoC uses a Cortex A9
>> core.
> 
> Isn't there some more details missing in this sentence? When I read it,
> at the end of the sentence, I'm wondering "and so what? what does this
> implies in terms of cpuidle support?".

Humm, actually, it the next sentence was wrongly formulate. Using a
Cortex A9 implies(or at least encourage) the use of ARM L2 cache and of
the SCU.

> 
>> Beside this, the main difference for the cpu idle is the way to
>> handle the L2 cache and the use of SCU.


[...]

>>  		pr_err("unable to request region\n");
>>  		ret = -EBUSY;
>> +
> 
> This change.
> 
>>  		goto out;
>>  	}
>>  
>> @@ -163,7 +181,6 @@ static int __init mvebu_v7_pmsu_init(void)
>>  		ret = -ENOMEM;
>>  		goto out;
>>  	}
>> -
> 
> And this one look like spurious changes not related to the patch.

yes of course.

> 
>>   out:
>>  	of_node_put(np);
>>  	return ret;
>> @@ -260,6 +277,27 @@ static int armada_xp_370_cpu_suspend(unsigned long deepidle)
>>  	return cpu_suspend(deepidle, do_armada_xp_370_cpu_suspend);
>>  }
>>  
>> +static noinline int do_armada_38x_cpu_suspend(unsigned long deepidle)
>> +{
>> +	mvebu_v7_pmsu_idle_prepare(deepidle, false);
>> +	/*
>> +	 * Already flushed cache, but do it again as the outer cache
>> +	 * functions dirty the cache with spinlocks
>> +	 */
>> +	v7_exit_coherency_flush(louis);
>> +
>> +	scu_power_mode(scu_base, SCU_PM_POWEROFF);
>> +
>> +	cpu_do_idle();
> 
> I see cpu_do_idle() does dsb() and wfi(), so why don't we use in the
> do_armada_370_xp_cpu_suspend() function ?

We can use cpu_do_idle() in do_armada_370_xp_cpu_suspend() too.

> 
>> +
>> +	return 1;
> 
> You return 1 here, but in the do_armada_370_xp_cpu_suspend() function
> you return zero. Is the return value being used? Why use 0 in one case
> and 1 in the other?

return 1 means error. But I think it was a nasty trick to not enter in the
CPU_PM_EXIT case. I forgot to go back on this, once the cpu idle was working
on Armada 38x. I will take care of it in the next series.

[...]

>> +{
>> +	struct device_node *np;
>> +	void __iomem *mpsoc_base;
>> +	u32 reg;
>> +
>> +	np = of_find_compatible_node(NULL, NULL,
>> +				"marvell,armada-380-coherency-fabric");
>> +	if (!np)
>> +		return false;
> 
> 		return -ENODEV;
> 
>> +	of_node_put(np);
>> +
>> +	np = of_find_compatible_node(NULL, NULL,
>> +				"marvell,armada-380-mpcore-soc-ctrl");
>> +	if (!np)
>> +		return false;
> 
> 		return -ENODEV;
> 
>> +	mpsoc_base = of_iomap(np, 0);
>> +	WARN_ON(!mpsoc_base);
> 
> WARN_ON() seems a bit weak for something that will make the next line
> crash the kernel. What about:
> 
> 	if (!mpsoc_base)
> 		return -ENOMEM;
> 
> I think the of_node_put(np) should be here.

OK


Thanks,

Gregory



-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

  reply	other threads:[~2014-07-03 15:30 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-27 13:22 [PATCH 00/16] CPU Idle for Armada 370 and Armada 38x Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 01/16] ARM: mvebu: Sort the headers of pmsu.c in alphabetic order Gregory CLEMENT
2014-06-30 12:16   ` Thomas Petazzoni
2014-07-02 22:57     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 02/16] ARM: mvebu: Add a common function for the boot address work around Gregory CLEMENT
2014-06-30 12:40   ` Thomas Petazzoni
2014-07-02 22:58     ` Gregory CLEMENT
2014-07-03  7:16       ` Thomas Petazzoni
2014-07-01 14:34   ` Thomas Petazzoni
2014-07-02 22:58     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 03/16] ARM: mvebu: Add function to export the physical address of the boot register Gregory CLEMENT
2014-06-27 14:14   ` Gregory CLEMENT
2014-06-30 12:46   ` Thomas Petazzoni
2014-07-03  8:39     ` Gregory CLEMENT
2014-07-03  9:25       ` Thomas Petazzoni
2014-07-03 10:07         ` Gregory CLEMENT
2014-07-01 11:46   ` Thomas Petazzoni
2014-07-01 15:02     ` Ezequiel Garcia
2014-06-27 13:22 ` [PATCH 04/16] ARM: mvebu: Use the common function for Armada 375 SMP workaround Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 05/16] ARM: mvebu: Add workaround for cpuidle support for Armada 370 Gregory CLEMENT
2014-06-30 12:50   ` Thomas Petazzoni
2014-07-03  8:44     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 06/16] ARM: mvebu: Rename the armada_370_xp into mvebu_v7 in pmsu.c file Gregory CLEMENT
2014-06-30 12:57   ` Thomas Petazzoni
2014-07-03  8:47     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 07/16] ARM: mvebu: Make the CPU idle initialization more generic Gregory CLEMENT
2014-06-27 14:15   ` Gregory CLEMENT
2014-06-28 14:56     ` Jason Cooper
2014-06-30 10:30       ` Gregory CLEMENT
2014-06-30 14:07   ` Thomas Petazzoni
2014-07-03  8:54     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 08/16] ARM: mvebu: Use a local variable to store the resume address Gregory CLEMENT
2014-06-30 15:09   ` Thomas Petazzoni
2014-07-03  9:24     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 09/16] ARM: mvebu: Make the snoop disable optional in mvebu_v7_pmsu_idle_prepare Gregory CLEMENT
2014-06-30 15:43   ` Thomas Petazzoni
2014-07-03 12:50     ` Gregory CLEMENT
2014-07-03 12:55       ` Thomas Petazzoni
2014-06-27 13:22 ` [PATCH 10/16] ARM: mvebu: Export the SCU address Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 11/16] ARM: mvebu: dts: Add CA9 MPcore SoC Controller node Gregory CLEMENT
2014-06-30 15:37   ` Thomas Petazzoni
2014-07-03 12:51     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 12/16] cpuidle: mvebu: Rename the driver from armada-370-xp to mvebu-v7 Gregory CLEMENT
2014-06-30 13:28   ` Thomas Petazzoni
2014-07-03 13:08     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 13/16] cpuidle: mvebu: Move the description of the cpuidle states in the platform part Gregory CLEMENT
2014-06-30 13:32   ` Thomas Petazzoni
2014-07-03 13:23     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 14/16] ARM: mvebu: Add CPU idle support for Armada 370 Gregory CLEMENT
2014-06-30 13:36   ` Thomas Petazzoni
2014-07-03 15:03     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 15/16] ARM: mvebu: Add CPU idle support for Armada 38x Gregory CLEMENT
2014-06-30 15:07   ` Thomas Petazzoni
2014-07-03 15:29     ` Gregory CLEMENT [this message]
2014-07-01 14:35   ` Thomas Petazzoni
2014-07-03 15:09     ` Gregory CLEMENT
2014-06-27 13:22 ` [PATCH 16/16] ARM: mvebu: defconfig: Enable CPU Idle support in mvebu_v7_defconfig Gregory CLEMENT
2014-06-30 15:45 ` [PATCH 00/16] CPU Idle for Armada 370 and Armada 38x Thomas Petazzoni
2014-06-30 15:51   ` Gregory CLEMENT
2014-07-01 14:38     ` Thomas Petazzoni

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