* amd-pstate fails to initialize on HP 255 G8 (Ryzen 5 5500U) although ACPI CPPC works under Windows
[not found] <e4259474-fa4f-4ed8-8a7f-1a3a2521acd3.ref@yahoo.com>
@ 2026-07-31 14:56 ` Giusy
0 siblings, 0 replies; only message in thread
From: Giusy @ 2026-07-31 14:56 UTC (permalink / raw)
To: linux-pm; +Cc: ray.huang, mario.limonciello, gautham.shenoy
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Hello,
I would like to report what appears to be an amd-pstate initialization
issue on my laptop.
Hardware
========
System: HP 255 G8 Notebook PC
CPU: AMD Ryzen 5 5500U (Zen 2)
BIOS: F.45 (2025-12-09)
Software
========
Distribution: Arch Linux
Kernel: 7.1.5-arch1-1 (same behavior also observed with linux-zen 7.1.x)
Kernel command line:
amd_pstate=active amd_pstate.shared_mem=1
Problem
=======
Initially, the BIOS did not expose any user-accessible CPPC option. As
an experiment, I used Smokeless UMAF to enable the hidden CPPC setting.
After enabling it:
* Windows 11 successfully exposes and uses ACPI Collaborative
Processor Performance Control.
* Linux still fails to initialize amd-pstate.
The amd_pstate driver fails to initialize with:
amd_pstate: The CPPC feature is supported but currently disabled by
the BIOS.
amd_pstate: AMD CPPC shared memory based functionality is supported
amd_pstate: failed to set energy perf value (-524)
amd_pstate: Failed to initialize CPU X: -524
amd_pstate: failed to register with return -19
Despite this message:
* ACPI _CPC objects are present in the firmware.
* Linux parses all _CPC objects successfully.
* /sys/devices/system/cpu/cpu0/acpi_cppc/ is populated and exposes
valid CPPC information.
As I said before, the vendor BIOS does not expose any CPPC option in
Setup. I enabled the hidden CPPC firmware option using Smokeless UMAF
for testing purposes. Windows 11 subsequently uses ACPI Collaborative
Processor Performance Control correctly, while Linux still reports that
CPPC is disabled by the BIOS and fails to initialize amd-pstate.
Windows evidence
================
Windows Event ID 55 (Microsoft-Windows-Kernel-Processor-Power) reports
for every processor:
Performance state type:
ACPI Collaborative Processor Performance Control
The Windows power management report also reports:
Performance control type:
ACPI Collaborative Processor Performance Control
This suggests that the firmware is exposing functional CPPC interfaces
and Windows is able to use them correctly.
Linux diagnostics
=================
Relevant kernel messages include:
ACPI CPPC: Parsed CPC struct for CPU: 0
...
ACPI CPPC: Parsed CPC struct for CPU: 11
followed by
amd_pstate: The CPPC feature is supported but currently disabled by
the BIOS.
and finally
amd_pstate: failed to register with return -19
Additionally, I tested the amd-debug-tools package (amd-pstate v0.2.20).
Running:
sudo amd-pstate triage
results in:
Unable to gather CPU information
strace shows that the tool attempts to access
/sys/devices/system/cpu/amd_pstate/, but those sysfs entries are absent
because the amd_pstate driver never successfully registers. I believe
this is a consequence of the initialization failure rather than a
separate bug.
I have attached various files:
* complete journal from boot
* filtered amd_pstate and CPPC logs
* ACPI tables
* cpuid output
* acpi_cppc sysfs dump
* cpufreq information
* amd-pstate triage output
* Windows 11 Event ID 55 output
* Windows 11 powercfg output
Question
========
Since Windows successfully uses ACPI Collaborative Processor Performance
Control on the same firmware, is this expected behavior, or could this
indicate an amd-pstate compatibility issue with Linux platform?
If additional debugging information or patches would be useful, I'd be
happy to test them.
Thank you for your time.
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lug 31 15:47:38 archlinux kernel: Command line: initrd=\initramfs-linux.img root=UUID=07661b1b-e19e-4a46-864d-7b95ce1d5439 rw zswap.enabled=0 amd_pstate=active amd_pstate.shared_mem=1 amd_pstate.dyndbg=+p cppc_acpi.dyndbg=+p
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x0000000009f00000-0x0000000009f0efff] ACPI NVS
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000caf7f000-0x00000000cdf7efff] ACPI NVS
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000cdf7f000-0x00000000cdffefff] ACPI data
lug 31 15:47:38 archlinux kernel: efi: ACPI=0xcdffe000 ACPI 2.0=0xcdffe014 ESRT=0xc9dfa798 TPMFinalLog=0xcdf40000 SMBIOS=0xc9683000 SMBIOS 3.0=0xc9681000 MEMATTR=0xb27d6018 RNG=0xcdfaef18 INITRD=0xb277ff98 TPMEventLog=0xcdfa5018
lug 31 15:47:38 archlinux kernel: ACPI: Early table checksum verification disabled
lug 31 15:47:38 archlinux kernel: ACPI: RSDP 0x00000000CDFFE014 000024 (v02 HPQOEM)
lug 31 15:47:38 archlinux kernel: ACPI: XSDT 0x00000000CDFC1188 000144 (v01 HPQOEM SLIC-MPC 00000002 HP 01000013)
lug 31 15:47:38 archlinux kernel: ACPI: FACP 0x00000000CDFE1000 00010C (v05 HPQOEM SLIC-MPC 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: DSDT 0x00000000CDFD4000 00873F (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: FACS 0x00000000CCED3000 000040
lug 31 15:47:38 archlinux kernel: ACPI: UEFI 0x00000000CDF7E000 000236 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFFC000 00021F (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFF4000 0072B0 (v02 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFF0000 003A21 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFEF000 000472 (v02 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: TPM2 0x00000000CDFEE000 00004C (v04 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFED000 00017D (v01 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFE5000 007E47 (v01 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: ASF! 0x00000000CDFE3000 0000A5 (v32 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: BOOT 0x00000000CDFE2000 000028 (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: HPET 0x00000000CDFE0000 000038 (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: APIC 0x00000000CDFDF000 000138 (v03 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: MCFG 0x00000000CDFDE000 00003C (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFD3000 0000C1 (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFD2000 000080 (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: VFCT 0x00000000CDFC4000 00D884 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFC3000 0000F8 (v01 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFC2000 00005C (v02 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFFD000 00005C (v02 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFBD000 003E88 (v02 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: CRAT 0x00000000CDFBC000 000BA8 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: CDIT 0x00000000CDFBB000 000029 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFBA000 000139 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB9000 00028D (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB8000 000372 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB7000 00021F (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB6000 000D53 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB4000 0010C5 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB0000 00362F (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: FPDT 0x00000000CDFAF000 000044 (v01 HPQOEM SLIC-MPC 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: WSMT 0x00000000CDFAD000 000028 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: IVRS 0x00000000CDFAC000 0001A4 (v02 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFAB000 00007D (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFAA000 0004FE (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: BGRT 0x00000000CDFDD000 000038 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: Reserving FACP table memory at [mem 0xcdfe1000-0xcdfe110b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving DSDT table memory at [mem 0xcdfd4000-0xcdfdc73e]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving FACS table memory at [mem 0xcced3000-0xcced303f]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving UEFI table memory at [mem 0xcdf7e000-0xcdf7e235]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdffc000-0xcdffc21e]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdff4000-0xcdffb2af]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdff0000-0xcdff3a20]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfef000-0xcdfef471]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving TPM2 table memory at [mem 0xcdfee000-0xcdfee04b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfed000-0xcdfed17c]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfe5000-0xcdfece46]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving ASF! table memory at [mem 0xcdfe3000-0xcdfe30a4]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving BOOT table memory at [mem 0xcdfe2000-0xcdfe2027]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving HPET table memory at [mem 0xcdfe0000-0xcdfe0037]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving APIC table memory at [mem 0xcdfdf000-0xcdfdf137]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving MCFG table memory at [mem 0xcdfde000-0xcdfde03b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfd3000-0xcdfd30c0]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfd2000-0xcdfd207f]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving VFCT table memory at [mem 0xcdfc4000-0xcdfd1883]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfc3000-0xcdfc30f7]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfc2000-0xcdfc205b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdffd000-0xcdffd05b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfbd000-0xcdfc0e87]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving CRAT table memory at [mem 0xcdfbc000-0xcdfbcba7]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving CDIT table memory at [mem 0xcdfbb000-0xcdfbb028]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfba000-0xcdfba138]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb9000-0xcdfb928c]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb8000-0xcdfb8371]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb7000-0xcdfb721e]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb6000-0xcdfb6d52]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb4000-0xcdfb50c4]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb0000-0xcdfb362e]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving FPDT table memory at [mem 0xcdfaf000-0xcdfaf043]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving WSMT table memory at [mem 0xcdfad000-0xcdfad027]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving IVRS table memory at [mem 0xcdfac000-0xcdfac1a3]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfab000-0xcdfab07c]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfaa000-0xcdfaa4fd]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving BGRT table memory at [mem 0xcdfdd000-0xcdfdd037]
lug 31 15:47:38 archlinux kernel: ACPI: PM-Timer IO Port: 0x408
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x03] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x04] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x05] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x06] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x07] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x08] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x09] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0a] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0b] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0c] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0d] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0e] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0f] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
lug 31 15:47:38 archlinux kernel: ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
lug 31 15:47:38 archlinux kernel: ACPI: Using ACPI (MADT) for SMP configuration information
lug 31 15:47:38 archlinux kernel: ACPI: HPET id: 0x10228210 base: 0xfed00000
lug 31 15:47:38 archlinux kernel: Kernel command line: initrd=\initramfs-linux.img root=UUID=07661b1b-e19e-4a46-864d-7b95ce1d5439 rw zswap.enabled=0 amd_pstate=active amd_pstate.shared_mem=1 amd_pstate.dyndbg=+p cppc_acpi.dyndbg=+p
lug 31 15:47:38 archlinux kernel: ACPI: Core revision 20251212
lug 31 15:47:38 archlinux kernel: ACPI: PM: Registering ACPI NVS region [mem 0x09f00000-0x09f0efff] (61440 bytes)
lug 31 15:47:38 archlinux kernel: ACPI: PM: Registering ACPI NVS region [mem 0xcaf7f000-0xcdf7efff] (50331648 bytes)
lug 31 15:47:38 archlinux kernel: ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
lug 31 15:47:38 archlinux kernel: acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
lug 31 15:47:38 archlinux kernel: ACPI: Added _OSI(Module Device)
lug 31 15:47:38 archlinux kernel: ACPI: Added _OSI(Processor Device)
lug 31 15:47:38 archlinux kernel: ACPI: Added _OSI(Processor Aggregator Device)
lug 31 15:47:38 archlinux kernel: ACPI: 21 ACPI AML tables successfully acquired and loaded
lug 31 15:47:38 archlinux kernel: ACPI: [Firmware Bug]: BIOS _OSI(Linux) query ignored
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_: platform _OSC: OS support mask [006e7eff]
lug 31 15:47:38 archlinux kernel: ACPI: EC: EC started
lug 31 15:47:38 archlinux kernel: ACPI: EC: interrupt blocked
lug 31 15:47:38 archlinux kernel: ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PCI0.LPC0.EC0_: Boot DSDT EC used to handle transactions
lug 31 15:47:38 archlinux kernel: ACPI: Interpreter enabled
lug 31 15:47:38 archlinux kernel: ACPI: PM: (supports S0 S3 S4 S5)
lug 31 15:47:38 archlinux kernel: ACPI: Using IOAPIC for interrupt routing
lug 31 15:47:38 archlinux kernel: PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
lug 31 15:47:38 archlinux kernel: ACPI: Enabled 4 GPEs in block 00 to 1F
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PCI0.GPP2.WLAN.PRWL: New power resource
lug 31 15:47:38 archlinux kernel: ACPI BIOS Error (bug): Could not resolve symbol [\_SB.WLBU._STA.WLVD], AE_NOT_FOUND (20251212/psargs-332)
lug 31 15:47:38 archlinux kernel: ACPI Error: Aborting method \_SB.WLBU._STA due to previous error (AE_NOT_FOUND) (20251212/psparse-529)
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PRWL: New power resource
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PRWB: New power resource
lug 31 15:47:38 archlinux kernel: ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI EDR HPX-Type3]
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: _OSC: platform does not support [SHPCHotplug LTR DPC]
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: FADT indicates ASPM is unsupported, using BIOS configuration
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: [Firmware Info]: ECAM [mem 0xf8000000-0xfbffffff] for domain 0000 [bus 00-3f] only partially covers this bridge
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKA configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKA disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKB configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKB disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKC configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKC disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKD configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKD disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKE configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKE disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKF configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKF disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKG configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKG disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKH configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKH disabled
lug 31 15:47:38 archlinux kernel: ACPI BIOS Error (bug): Could not resolve symbol [\_SB.WLBU._STA.WLVD], AE_NOT_FOUND (20251212/psargs-332)
lug 31 15:47:38 archlinux kernel: ACPI Error: Aborting method \_SB.WLBU._STA due to previous error (AE_NOT_FOUND) (20251212/psparse-529)
lug 31 15:47:38 archlinux kernel: ACPI: EC: interrupt unblocked
lug 31 15:47:38 archlinux kernel: ACPI: EC: event unblocked
lug 31 15:47:38 archlinux kernel: ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62
lug 31 15:47:38 archlinux kernel: ACPI: EC: GPE=0x3
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PCI0.LPC0.EC0_: Boot DSDT EC initialization complete
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PCI0.LPC0.EC0_: EC: Used to handle transactions and events
lug 31 15:47:38 archlinux kernel: ACPI: bus type USB registered
lug 31 15:47:38 archlinux kernel: ACPI BIOS Error (bug): Could not resolve symbol [\_SB.WLBU._STA.WLVD], AE_NOT_FOUND (20251212/psargs-332)
lug 31 15:47:38 archlinux kernel: ACPI Error: Aborting method \_SB.WLBU._STA due to previous error (AE_NOT_FOUND) (20251212/psparse-529)
lug 31 15:47:38 archlinux kernel: PCI: Using ACPI for IRQ routing
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:00: Could not reserve [mem 0xfec00000-0xfec01fff]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:00: Reserved [mem 0xfee00000-0xfee00fff]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:00: Reserved [mem 0xfde00000-0xfdefffff]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x0010-0x001f]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x0072-0x0073]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x0080]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x00b0-0x00b1]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x0092]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0400-0x04cf]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x04d0-0x04d1]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x04d6]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c00-0x0c01]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c14]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c50-0x0c52]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c6c]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c6f]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0cd0-0x0cdb]
lug 31 15:47:38 archlinux kernel: acpi PNP0C01:00: Reserved [mem 0xff000000-0xffffffff]
lug 31 15:47:38 archlinux kernel: pnp: PnP ACPI init
lug 31 15:47:38 archlinux kernel: ACPI BIOS Error (bug): Could not resolve symbol [\_SB.WLBU._STA.WLVD], AE_NOT_FOUND (20251212/psargs-332)
lug 31 15:47:38 archlinux kernel: ACPI Error: Aborting method \_SB.WLBU._STA due to previous error (AE_NOT_FOUND) (20251212/psparse-529)
lug 31 15:47:38 archlinux kernel: pnp: PnP ACPI: found 1 devices
lug 31 15:47:38 archlinux kernel: clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
lug 31 15:47:38 archlinux kernel: ACPI: AC: AC Adapter [ACAD] (on-line)
lug 31 15:47:38 archlinux kernel: ACPI: button: Power Button [PWRB]
lug 31 15:47:38 archlinux kernel: ACPI: button: Lid Switch [LID]
lug 31 15:47:38 archlinux kernel: ACPI: button: Power Button [PWRF]
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 0
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 1
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 2
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 3
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 4
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 5
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 6
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 7
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 8
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 9
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 10
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 11
lug 31 15:47:38 archlinux kernel: ACPI: thermal: [Firmware Bug]: Invalid critical threshold (-274000)
lug 31 15:47:38 archlinux kernel: acpi LNXTHERM:00: registered as thermal_zone0
lug 31 15:47:38 archlinux kernel: ACPI: thermal: Thermal Zone [TSZ0] (52 C)
lug 31 15:47:38 archlinux kernel: acpi LNXTHERM:01: registered as thermal_zone1
lug 31 15:47:38 archlinux kernel: ACPI: thermal: Thermal Zone [TSZ2] (20 C)
lug 31 15:47:38 archlinux kernel: ACPI: battery: Slot [BAT1] (battery present)
lug 31 15:47:38 archlinux kernel: tpm_crb_acpi MSFT0101:00: Disabling hwrng
lug 31 15:47:38 archlinux kernel: tpm tpm0: tpm_read_log_acpi: Failed to map ACPI memory
lug 31 15:47:38 archlinux kernel: ACPI: bus type drm_connector registered
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI: video: Video Device [VGA] (multi-head: yes rom: no post: no)
lug 31 15:47:38 archlinux kernel: input: Video Bus as /devices/pci0000:00/0000:00:08.1/acpi.video_bus.0/input/input4
lug 31 15:47:44 HP255G8R5 kernel: acpi-tad ACPI000E:00: Missing _PRW
lug 31 15:47:44 HP255G8R5 kernel: acpi_cpufreq: overriding BIOS provided _PSD data
lug 31 15:47:46 HP255G8R5 kernel: ACPI BIOS Error (bug): Attempt to CreateField of length zero (20251212/dsopcode-133)
lug 31 15:47:46 HP255G8R5 kernel: ACPI Error: Aborting method \_SB.WMID.WQBD due to previous error (AE_AML_OPERAND_VALUE) (20251212/psparse-529)
lug 31 15:47:46 HP255G8R5 kernel: ACPI BIOS Error (bug): Attempt to CreateField of length zero (20251212/dsopcode-133)
lug 31 15:47:46 HP255G8R5 kernel: ACPI Error: Aborting method \_SB.WMID.WQBC due to previous error (AE_AML_OPERAND_VALUE) (20251212/psparse-529)
lug 31 15:47:46 HP255G8R5 kernel: ACPI BIOS Error (bug): Attempt to CreateField of length zero (20251212/dsopcode-133)
lug 31 15:47:46 HP255G8R5 kernel: ACPI Error: Aborting method \_SB.WMID.WQBE due to previous error (AE_AML_OPERAND_VALUE) (20251212/psparse-529)
lug 31 15:47:46 HP255G8R5 kernel: ACPI BIOS Error (bug): Attempt to CreateField of length zero (20251212/dsopcode-133)
lug 31 15:47:46 HP255G8R5 kernel: ACPI Error: Aborting method \_SB.WMID.WHCM due to previous error (AE_AML_OPERAND_VALUE) (20251212/psparse-529)
lug 31 15:47:46 HP255G8R5 kernel: ACPI Error: Aborting method \_SB.WMID.WMAA due to previous error (AE_AML_OPERAND_VALUE) (20251212/psparse-529)
[-- Attachment #3: acpi_cppc.txt --]
[-- Type: text/plain, Size: 620 bytes --]
/sys/devices/system/cpu/cpu0/acpi_cppc/feedback_ctrs:ref:195624481185 del:191574079799
/sys/devices/system/cpu/cpu0/acpi_cppc/guaranteed_perf:0
/sys/devices/system/cpu/cpu0/acpi_cppc/highest_perf:255
/sys/devices/system/cpu/cpu0/acpi_cppc/lowest_freq:400
/sys/devices/system/cpu/cpu0/acpi_cppc/lowest_nonlinear_perf:70
/sys/devices/system/cpu/cpu0/acpi_cppc/lowest_perf:26
/sys/devices/system/cpu/cpu0/acpi_cppc/nominal_freq:2100
/sys/devices/system/cpu/cpu0/acpi_cppc/nominal_perf:132
/sys/devices/system/cpu/cpu0/acpi_cppc/reference_perf:132
/sys/devices/system/cpu/cpu0/acpi_cppc/wraparound_time:18446744073709551615
[-- Attachment #4: acpi-tables.tar.gz --]
[-- Type: application/gzip, Size: 459900 bytes --]
[-- Attachment #5: amd_pstate.log --]
[-- Type: text/x-log, Size: 2722 bytes --]
lug 31 15:47:38 archlinux kernel: Command line: initrd=\initramfs-linux.img root=UUID=07661b1b-e19e-4a46-864d-7b95ce1d5439 rw zswap.enabled=0 amd_pstate=active amd_pstate.shared_mem=1 amd_pstate.dyndbg=+p cppc_acpi.dyndbg=+p
lug 31 15:47:38 archlinux kernel: Kernel command line: initrd=\initramfs-linux.img root=UUID=07661b1b-e19e-4a46-864d-7b95ce1d5439 rw zswap.enabled=0 amd_pstate=active amd_pstate.shared_mem=1 amd_pstate.dyndbg=+p cppc_acpi.dyndbg=+p
lug 31 15:47:38 archlinux kernel: amd_pstate: The CPPC feature is supported but currently disabled by the BIOS.
lug 31 15:47:38 archlinux kernel: amd_pstate: AMD CPPC shared memory based functionality is supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 0: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 1: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 2: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 3: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 4: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 5: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 6: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 7: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 8: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 9: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 10: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 11: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to register with return -19
[-- Attachment #6: amd-pstate-triage.txt --]
[-- Type: text/plain, Size: 107 bytes --]
🐧 ^[[94mArch Linux^[[0m
🐧 ^[[94mKernel: 7.1.5-arch1-2^[[0m
❌ ^[[91mUnable to gather CPU information^[[0m
[-- Attachment #7: cmdline.txt --]
[-- Type: text/plain, Size: 177 bytes --]
initrd=\initramfs-linux.img root=UUID=07661b1b-e19e-4a46-864d-7b95ce1d5439 rw zswap.enabled=0 amd_pstate=active amd_pstate.shared_mem=1 amd_pstate.dyndbg=+p cppc_acpi.dyndbg=+p
[-- Attachment #8: cppc.log --]
[-- Type: text/x-log, Size: 3566 bytes --]
lug 31 15:47:38 archlinux kernel: Command line: initrd=\initramfs-linux.img root=UUID=07661b1b-e19e-4a46-864d-7b95ce1d5439 rw zswap.enabled=0 amd_pstate=active amd_pstate.shared_mem=1 amd_pstate.dyndbg=+p cppc_acpi.dyndbg=+p
lug 31 15:47:38 archlinux kernel: Kernel command line: initrd=\initramfs-linux.img root=UUID=07661b1b-e19e-4a46-864d-7b95ce1d5439 rw zswap.enabled=0 amd_pstate=active amd_pstate.shared_mem=1 amd_pstate.dyndbg=+p cppc_acpi.dyndbg=+p
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 0
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 1
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 2
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 3
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 4
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 5
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 6
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 7
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 8
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 9
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 10
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 11
lug 31 15:47:38 archlinux kernel: amd_pstate: The CPPC feature is supported but currently disabled by the BIOS.
Please enable it if your BIOS has the CPPC option.
lug 31 15:47:38 archlinux kernel: amd_pstate: AMD CPPC shared memory based functionality is supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
[-- Attachment #9: cpufreq.txt --]
[-- Type: text/plain, Size: 17726 bytes --]
===== /sys/devices/system/cpu/cpufreq/policy0 =====
### /sys/devices/system/cpu/cpufreq/policy0/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy0/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy0/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy0/freqdomain_cpus
0 1
### /sys/devices/system/cpu/cpufreq/policy0/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy0/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy0/boost
1
### /sys/devices/system/cpu/cpufreq/policy0/related_cpus
0
### /sys/devices/system/cpu/cpufreq/policy0/cpb
1
### /sys/devices/system/cpu/cpufreq/policy0/scaling_cur_freq
1635468
### /sys/devices/system/cpu/cpufreq/policy0/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy0/affected_cpus
0
### /sys/devices/system/cpu/cpufreq/policy0/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy0/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_avg_freq
1794041
### /sys/devices/system/cpu/cpufreq/policy0/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy1 =====
### /sys/devices/system/cpu/cpufreq/policy1/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy1/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy1/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy1/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy1/freqdomain_cpus
0 1
### /sys/devices/system/cpu/cpufreq/policy1/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy1/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy1/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy1/boost
1
### /sys/devices/system/cpu/cpufreq/policy1/related_cpus
1
### /sys/devices/system/cpu/cpufreq/policy1/cpb
1
### /sys/devices/system/cpu/cpufreq/policy1/scaling_cur_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy1/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy1/affected_cpus
1
### /sys/devices/system/cpu/cpufreq/policy1/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy1/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy1/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy1/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy1/cpuinfo_avg_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy1/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy10 =====
### /sys/devices/system/cpu/cpufreq/policy10/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy10/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy10/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy10/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy10/freqdomain_cpus
10 11
### /sys/devices/system/cpu/cpufreq/policy10/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy10/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy10/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy10/boost
1
### /sys/devices/system/cpu/cpufreq/policy10/related_cpus
10
### /sys/devices/system/cpu/cpufreq/policy10/cpb
1
### /sys/devices/system/cpu/cpufreq/policy10/scaling_cur_freq
1753678
### /sys/devices/system/cpu/cpufreq/policy10/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy10/affected_cpus
10
### /sys/devices/system/cpu/cpufreq/policy10/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy10/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy10/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy10/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy10/cpuinfo_avg_freq
2725797
### /sys/devices/system/cpu/cpufreq/policy10/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy11 =====
### /sys/devices/system/cpu/cpufreq/policy11/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy11/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy11/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy11/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy11/freqdomain_cpus
10 11
### /sys/devices/system/cpu/cpufreq/policy11/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy11/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy11/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy11/boost
1
### /sys/devices/system/cpu/cpufreq/policy11/related_cpus
11
### /sys/devices/system/cpu/cpufreq/policy11/cpb
1
### /sys/devices/system/cpu/cpufreq/policy11/scaling_cur_freq
1863299
### /sys/devices/system/cpu/cpufreq/policy11/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy11/affected_cpus
11
### /sys/devices/system/cpu/cpufreq/policy11/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy11/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy11/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy11/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy11/cpuinfo_avg_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy11/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy2 =====
### /sys/devices/system/cpu/cpufreq/policy2/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy2/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy2/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy2/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy2/freqdomain_cpus
2 3
### /sys/devices/system/cpu/cpufreq/policy2/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy2/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy2/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy2/boost
1
### /sys/devices/system/cpu/cpufreq/policy2/related_cpus
2
### /sys/devices/system/cpu/cpufreq/policy2/cpb
1
### /sys/devices/system/cpu/cpufreq/policy2/scaling_cur_freq
1794681
### /sys/devices/system/cpu/cpufreq/policy2/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy2/affected_cpus
2
### /sys/devices/system/cpu/cpufreq/policy2/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy2/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy2/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy2/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy2/cpuinfo_avg_freq
4037699
### /sys/devices/system/cpu/cpufreq/policy2/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy3 =====
### /sys/devices/system/cpu/cpufreq/policy3/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy3/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy3/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy3/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy3/freqdomain_cpus
2 3
### /sys/devices/system/cpu/cpufreq/policy3/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy3/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy3/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy3/boost
1
### /sys/devices/system/cpu/cpufreq/policy3/related_cpus
3
### /sys/devices/system/cpu/cpufreq/policy3/cpb
1
### /sys/devices/system/cpu/cpufreq/policy3/scaling_cur_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy3/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy3/affected_cpus
3
### /sys/devices/system/cpu/cpufreq/policy3/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy3/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy3/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy3/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy3/cpuinfo_avg_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy3/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy4 =====
### /sys/devices/system/cpu/cpufreq/policy4/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy4/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy4/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy4/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy4/freqdomain_cpus
4 5
### /sys/devices/system/cpu/cpufreq/policy4/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy4/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy4/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy4/boost
1
### /sys/devices/system/cpu/cpufreq/policy4/related_cpus
4
### /sys/devices/system/cpu/cpufreq/policy4/cpb
1
### /sys/devices/system/cpu/cpufreq/policy4/scaling_cur_freq
1426462
### /sys/devices/system/cpu/cpufreq/policy4/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy4/affected_cpus
4
### /sys/devices/system/cpu/cpufreq/policy4/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy4/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy4/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy4/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy4/cpuinfo_avg_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy4/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy5 =====
### /sys/devices/system/cpu/cpufreq/policy5/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy5/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy5/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy5/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy5/freqdomain_cpus
4 5
### /sys/devices/system/cpu/cpufreq/policy5/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy5/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy5/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy5/boost
1
### /sys/devices/system/cpu/cpufreq/policy5/related_cpus
5
### /sys/devices/system/cpu/cpufreq/policy5/cpb
1
### /sys/devices/system/cpu/cpufreq/policy5/scaling_cur_freq
1687231
### /sys/devices/system/cpu/cpufreq/policy5/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy5/affected_cpus
5
### /sys/devices/system/cpu/cpufreq/policy5/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy5/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy5/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy5/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy5/cpuinfo_avg_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy5/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy6 =====
### /sys/devices/system/cpu/cpufreq/policy6/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy6/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy6/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy6/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy6/freqdomain_cpus
6 7
### /sys/devices/system/cpu/cpufreq/policy6/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy6/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy6/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy6/boost
1
### /sys/devices/system/cpu/cpufreq/policy6/related_cpus
6
### /sys/devices/system/cpu/cpufreq/policy6/cpb
1
### /sys/devices/system/cpu/cpufreq/policy6/scaling_cur_freq
1796570
### /sys/devices/system/cpu/cpufreq/policy6/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy6/affected_cpus
6
### /sys/devices/system/cpu/cpufreq/policy6/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy6/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy6/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy6/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy6/cpuinfo_avg_freq
1796576
### /sys/devices/system/cpu/cpufreq/policy6/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy7 =====
### /sys/devices/system/cpu/cpufreq/policy7/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy7/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy7/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy7/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy7/freqdomain_cpus
6 7
### /sys/devices/system/cpu/cpufreq/policy7/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy7/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy7/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy7/boost
1
### /sys/devices/system/cpu/cpufreq/policy7/related_cpus
7
### /sys/devices/system/cpu/cpufreq/policy7/cpb
1
### /sys/devices/system/cpu/cpufreq/policy7/scaling_cur_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy7/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy7/affected_cpus
7
### /sys/devices/system/cpu/cpufreq/policy7/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy7/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy7/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy7/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy7/cpuinfo_avg_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy7/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy8 =====
### /sys/devices/system/cpu/cpufreq/policy8/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy8/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy8/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy8/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy8/freqdomain_cpus
8 9
### /sys/devices/system/cpu/cpufreq/policy8/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy8/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy8/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy8/boost
1
### /sys/devices/system/cpu/cpufreq/policy8/related_cpus
8
### /sys/devices/system/cpu/cpufreq/policy8/cpb
1
### /sys/devices/system/cpu/cpufreq/policy8/scaling_cur_freq
4037579
### /sys/devices/system/cpu/cpufreq/policy8/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy8/affected_cpus
8
### /sys/devices/system/cpu/cpufreq/policy8/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy8/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy8/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy8/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy8/cpuinfo_avg_freq
4042505
### /sys/devices/system/cpu/cpufreq/policy8/bios_limit
2100000
===== /sys/devices/system/cpu/cpufreq/policy9 =====
### /sys/devices/system/cpu/cpufreq/policy9/scaling_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy9/scaling_available_governors
conservative ondemand userspace powersave performance schedutil
### /sys/devices/system/cpu/cpufreq/policy9/scaling_boost_frequencies
### /sys/devices/system/cpu/cpufreq/policy9/cpuinfo_cur_freq
### /sys/devices/system/cpu/cpufreq/policy9/freqdomain_cpus
8 9
### /sys/devices/system/cpu/cpufreq/policy9/scaling_governor
schedutil
### /sys/devices/system/cpu/cpufreq/policy9/cpuinfo_max_freq
4056445
### /sys/devices/system/cpu/cpufreq/policy9/scaling_available_frequencies
2100000 1700000 1400000
### /sys/devices/system/cpu/cpufreq/policy9/boost
1
### /sys/devices/system/cpu/cpufreq/policy9/related_cpus
9
### /sys/devices/system/cpu/cpufreq/policy9/cpb
1
### /sys/devices/system/cpu/cpufreq/policy9/scaling_cur_freq
1795670
### /sys/devices/system/cpu/cpufreq/policy9/scaling_setspeed
<unsupported>
### /sys/devices/system/cpu/cpufreq/policy9/affected_cpus
9
### /sys/devices/system/cpu/cpufreq/policy9/scaling_max_freq
2100000
### /sys/devices/system/cpu/cpufreq/policy9/cpuinfo_transition_latency
0
### /sys/devices/system/cpu/cpufreq/policy9/scaling_driver
acpi-cpufreq
### /sys/devices/system/cpu/cpufreq/policy9/cpuinfo_min_freq
1400000
### /sys/devices/system/cpu/cpufreq/policy9/cpuinfo_avg_freq
1796524
### /sys/devices/system/cpu/cpufreq/policy9/bios_limit
2100000
[-- Attachment #10: cpuid.txt --]
[-- Type: text/plain, Size: 471290 bytes --]
CPU 0:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0x0 (0)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 0
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 0
Core Identifiers (0x8000001e/ebx):
core ID = 0x0 (0)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=0 SMT_ID=0
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 1:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0x1 (1)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 1
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 1
Core Identifiers (0x8000001e/ebx):
core ID = 0x0 (0)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=0 SMT_ID=1
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 2:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0x2 (2)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 2
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 2
Core Identifiers (0x8000001e/ebx):
core ID = 0x1 (1)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=1 SMT_ID=0
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 3:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0x3 (3)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 3
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 3
Core Identifiers (0x8000001e/ebx):
core ID = 0x1 (1)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=1 SMT_ID=1
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 4:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0x4 (4)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 4
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 4
Core Identifiers (0x8000001e/ebx):
core ID = 0x2 (2)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=2 SMT_ID=0
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 5:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0x5 (5)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 5
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 5
Core Identifiers (0x8000001e/ebx):
core ID = 0x2 (2)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=2 SMT_ID=1
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 6:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0x8 (8)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 8
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 8
Core Identifiers (0x8000001e/ebx):
core ID = 0x4 (4)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=4 SMT_ID=0
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 7:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0x9 (9)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 9
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 9
Core Identifiers (0x8000001e/ebx):
core ID = 0x4 (4)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=4 SMT_ID=1
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 8:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0xa (10)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 10
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 10
Core Identifiers (0x8000001e/ebx):
core ID = 0x5 (5)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=5 SMT_ID=0
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 9:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0xb (11)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 11
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 11
Core Identifiers (0x8000001e/ebx):
core ID = 0x5 (5)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=5 SMT_ID=1
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 10:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0xc (12)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 12
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 12
Core Identifiers (0x8000001e/ebx):
core ID = 0x6 (6)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=6 SMT_ID=0
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
CPU 11:
vendor_id = "AuthenticAMD"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
miscellaneous (1/ebx):
process local APIC physical ID = 0xd (13)
maximum IDs for CPUs in pkg = 0xc (12)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = true
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = true
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = true
DTES64: 64-bit debug store = false
MONITOR/MWAIT = true
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = true
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = true
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = true
SSE4.2 extensions = true
x2APIC: extended xAPIC support = false
MOVBE instruction = true
POPCNT instruction = true
time stamp counter deadline = false
AES instruction = true
XSAVE/XSTOR states = true
OS-enabled XSAVE/XSTOR = true
AVX: advanced vector extensions = true
F16C half-precision convert instruction = true
RDRAND instruction = true
hypervisor guest status = false
cache and TLB information (2):
processor serial number = 0086-0F81-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x40 (64)
largest monitor-line size (bytes) = 0x40 (64)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
monitorless MWAIT supported = false
number of C0 sub C-states using MWAIT = 0x1 (1)
number of C1 sub C-states using MWAIT = 0x1 (1)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = true
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
IA32_HWP_CTL MSR supported = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = true
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = true
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = true
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = true
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = true
BMI2 instructions = true
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = true
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = true
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = true
ADX instructions = true
SMAP: supervisor mode access prevention = true
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = true
CLWB instruction = true
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = true
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = true
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = true
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOVSB = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = false
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = false
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = false
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
topdown slots event = not available
topdown backend bound = not available
topdown bad speculation = not available
topdown frontend bound = not available
topdown retiring = not available
LBR inserts = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
TMA slots/cycle = 0x0 (0)
x2APIC features / processor topology (0xb):
extended APIC ID = 13
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level & previous levels = 0x1 (1)
number of logical processors at level = 0x2 (2)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level & previous levels = 0x7 (7)
number of logical processors at level = 0xc (12)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level & previous levels = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000207
x87 state = true
SSE state = true
AVX state = true
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = true
XTILECFG state = false
XTILEDATA state = false
APX EGPR = false
bytes required by fields in XCR0 = 0x00000340 (832)
bytes required by XSAVE/XRSTOR area = 0x00000380 (896)
XSAVEOPT instruction = true
XSAVEC instruction = true
XGETBV instruction = true
XSAVES/XRSTORS instructions = true
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000340 (832)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
AVX/YMM features (0xd/2):
AVX/YMM save state byte size = 0x00000100 (256)
AVX/YMM save state byte offset = 0x00000240 (576)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
PKRU features (0xd/9):
PKRU save state byte size = 0x00000040 (64)
PKRU save state byte offset = 0x00000340 (832)
supported in IA32_XSS or XCR0 = XCR0 (user state)
64-byte alignment in compacted XSAVE = false
XFD faulting supported = false
Quality of Service Monitoring Resource Type (0xf/0):
Maximum range of RMID = 255
supports L3 cache monitoring = true
L3 Cache Quality of Service Monitoring (0xf/1):
Conversion factor from IA32_QM_CTR to bytes = 64
Maximum range of RMID = 255
Counter width = 24
QoS monitoring counter size = 0x18 (24)
IA32_QM_CTR bit 61 is overflow = false
non-CPU agent cache monitoring (CMT) = false
non-CPU agent mem bandwidth mon (MBM) = false
(QoS monitoring counter size synth) = 62
supports L3 occupancy monitoring = true
supports L3 total bandwidth monitoring = true
supports L3 local bandwidth monitoring = true
Resource Director Technology Allocation (0x10/0):
L3 cache allocation technology supported = true
L2 cache allocation technology supported = false
memory bandwidth allocation supported = false
cache bandwidth allocation supported = false
resource priority supported = false
L3 Cache Allocation Technology (0x10/1):
length of capacity bit mask = 0x10 (16)
non-CPU agent support = false
code and data prioritization supported = true
non-contiguous bitmask supported = false
highest COS number supported = 0xf (15)
alloc units isolation/contention map = 0x00000000
extended processor signature (0x80000001/eax):
family/generation = 0xf (15)
model = 0x8 (8)
stepping id = 0x1 (1)
extended family = 0x8 (8)
extended model = 0x6 (6)
(family synth) = 0x17 (23)
(model synth) = 0x68 (104)
extended feature flags (0x80000001/edx):
x87 FPU on chip = true
virtual-8086 mode enhancement = true
debugging extensions = true
page size extensions = true
time stamp counter = true
RDMSR and WRMSR support = true
physical address extensions = true
machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSCALL and SYSRET instructions = true
memory type range registers = true
global paging extension = true
machine check architecture = true
conditional move/compare instruction = true
page attribute table = true
page size extension = true
multiprocessing capable = false
no-execute page protection = true
AMD multimedia instruction extensions = true
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
1-GB large page support = true
RDTSCP = true
long mode (AA-64) = true
3DNow! instruction extensions = false
3DNow! instructions = false
extended brand id (0x80000001/ebx):
raw = 0x0 (0)
BrandId = 0x0 (0)
PkgType = 0x0 (0)
AMD feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
CMP Legacy = true
SVM: secure virtual machine = true
extended APIC space = true
AltMovCr8 = true
LZCNT advanced bit manipulation = true
SSE4A support = true
misaligned SSE mode = true
3DNow! PREFETCH/PREFETCHW instructions = true
OS visible workaround = true
instruction based sampling = true
XOP support = false
SKINIT/STGI support = true
watchdog timer support = true
lightweight profiling support = false
4-operand FMA instruction = false
TCE: translation cache extension = true
NodeId MSR C001100C = false
TBM support = false
topology extensions = true
core performance counter extensions = true
NB/DF performance counter extensions = true
data breakpoint extension = true
performance time-stamp counter support = false
LLC performance counter extensions = true
MWAITX/MONITORX supported = true
Address mask extension support = true
brand = "AMD Ryzen 5 5500U with Radeon Graphics "
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x40 (64)
instruction associativity = 0xff (255)
data # entries = 0x40 (64)
data associativity = 0xff (255)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x8 (8)
size (KB) = 0x20 (32)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 4 to 5-way (4)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x400 (1024)
instruction associativity = 8 to 15-way (6)
data # entries = 0x800 (2048)
data associativity = 8 to 15-way (6)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 8 to 15-way (6)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x9 (9)
size (in 512KB units) = 0x10 (16)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = true
SUCCOR support = true
HWA: hardware assert support = false
scalable MCA support = true
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = true
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = true
TM: thermal monitor = true
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = true
TscInvariant = true
CPB: core performance boost = true
read-only effective frequency interface = true
processor feedback interface = false
APM power reporting = false
connected standby = true
RAPL: running average power limit = true
fast CPPC = false
CPPC floor performance = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x30 (48)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = true
instructions retired count support = true
always save/restore error pointers = true
INVLPGB instruction = false
RDPRU instruction = true
memory bandwidth enforcement = true
MCOMMIT instruction = true
WBNOINVD instruction = true
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = true
IBRS: indirect branch restr speculation = true
STIBP: 1 thr indirect branch predictor = true
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = true
IBRS provides same mode protection = true
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = true
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
IBPB_RET: ret addr predictor cleared = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of threads = 0xc (12)
ApicIdCoreIdSize = 0x7 (7)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x1 (1)
SVM Secure Virtual Machine (0x8000000a):
SvmRev: SVM revision = 0x1 (1)
nested paging = true
LBR virtualization = true
SVM lock = true
NRIP save = true
MSR based TSC rate control = true
VMCB clean bits support = true
flush by ASID = true
decode assists = true
PMC virtualization = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = true
pause filter threshold = true
AVIC: AMD virtual interrupt controller = true
virtualized VMLOAD/VMSAVE = true
virtualized global interrupt flag (GIF) = true
GMET: guest mode execute trap = true
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = true
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
extended LVT AVIC access changes = false
guest VMCB addr check = false
bus lock threshold = false
idle HLT intercept = false
EXITINFO1 non-interceptible shutdown = false
guest PMC event filtering supported = false
PML: page modification logging supported = false
x2AVIC_EXT: 4096 vCPUs supported = false
NASID: number of address space IDs = 0x8000 (32768)
L1 TLB information: 1G pages (0x80000019/eax):
instruction # entries = 0x40 (64)
instruction associativity = full (15)
data # entries = 0x40 (64)
data associativity = full (15)
L2 TLB information: 1G pages (0x80000019/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
Performance Optimization Identifiers (0x8000001a/eax):
128-bit SSE executed full-width = false
MOVU* better than MOVL*/MOVH* = true
256-bit SSE executed full-width = true
512-bit SSE executed full-width = false
Instruction Based Sampling Identifiers (0x8000001b/eax):
IBS feature flags valid = true
IBS fetch sampling = true
IBS execution sampling = true
read write of op counter = true
op counting mode = true
branch target address reporting = true
IbsOpCurCnt and IbsOpMaxCnt extend 7 = true
invalid RIP indication support = true
fused branch micro-op indication support = true
IBS fetch control extended MSR support = true
IBS op data 4 MSR support = false
IBS L3 miss filtering support = false
IBS load latency filtering support = false
IBS alternate disable bit support = false
IBS fetch latency filtering support = false
IBS address bit 63 filtering support = false
IBS streaming store filtering support = false
IBS buffering v1 support = false
IBS memory profiler v1 support = false
simplified DTLB page size & miss report = false
Lightweight Profiling Capabilities: Availability (0x8000001c/eax):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities: Supported (0x8000001c/edx):
lightweight profiling = false
LWPVAL instruction = false
instruction retired event = false
branch retired event = false
DC miss event = false
core clocks not halted event = false
core reference clocks not halted event = false
continuous mode sampling = false
tsc in event record = false
interrupt on threshold overflow = false
Lightweight Profiling Capabilities (0x8000001c/ebx):
LWPCB byte size = 0x0 (0)
event record byte size = 0x0 (0)
maximum EventId = 0x0 (0)
EventInterval1 field offset = 0x0 (0)
Lightweight Profiling Capabilities (0x8000001c/ecx):
latency counter bit size = 0x0 (0)
data cache miss address valid = false
amount cache latency is rounded = 0x0 (0)
LWP implementation version = 0x0 (0)
event ring buffer size in records = 0x0 (0)
branch prediction filtering = false
IP filtering = false
cache level filtering = false
cache latency filteing = false
Cache Properties (0x8000001d):
--- cache 0 ---
type = data (1)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 1 ---
type = instruction (2)
level = 0x1 (1)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 64
write-back invalidate = false
cache inclusive of lower levels = false
(synth size) = 32768 (32 KB)
--- cache 2 ---
type = unified (3)
level = 0x2 (2)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x1 (1)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x8 (8)
number of sets = 1024
write-back invalidate = false
cache inclusive of lower levels = true
(synth size) = 524288 (512 KB)
--- cache 3 ---
type = unified (3)
level = 0x3 (3)
self-initializing = true
fully associative = false
extra cores sharing this cache = 0x5 (5)
line size in bytes = 0x40 (64)
physical line partitions = 0x1 (1)
number of ways = 0x10 (16)
number of sets = 4096
write-back invalidate = true
cache inclusive of lower levels = false
(synth size) = 4194304 (4 MB)
extended APIC ID = 13
Core Identifiers (0x8000001e/ebx):
core ID = 0x6 (6)
threads per core = 0x2 (2)
Node Identifiers (0x8000001e/ecx):
node ID = 0x0 (0)
nodes per processor = 0x1 (1)
AMD Secure Encryption Virtualization (0x8000001f):
SME: secure memory encryption support = true
SEV: secure encrypted virtualize support = true
VM page flush MSR support = true
SEV-ES: SEV encrypted state support = true
SEV-SNP: SEV secure nested paging = false
VMPL: VM permission levels = false
RMPQUERY instruction support = false
VMPL supervisor shadow stack support = false
Secure TSC supported = false
virtual TSC_AUX supported = false
hardware cache coher across enc domains = false
SEV guest exec only from 64-bit host = false
restricted injection = false
alternate injection = false
full debug state swap for SEV-ES/SEV-SNP = false
disallowing IBS use by host = false
VTE: SEV virtual transparent encryption = true
VMGEXIT parameter support = false
virtual TOM MSR support = false
IBS virtual support for SEV-ES/SEV-SNP = false
PMC virtual support for SEV-ES/SEV-SNP = false
RMPREAD instruction = false
guest intercept control support = false
segmented RMP support = false
VMSA register protection support = false
SMT protection support = false
secure AVIC support = false
allowed SEV features support = false
SVSM communication page MSR support = false
VIRT_RMPUPDATE & VIRT_PSMASH MSR support = false
write to hypervisor in-used allowed = false
IBPB on entry support = false
encryption bit position in PTE = 0x2f (47)
physical address space width reduction = 0x4 (4)
number of VM permission levels = 0x0 (0)
not vulnerable to SNP cache coherency = false
number of SEV-enabled guests supported = 0xe (14)
minimum SEV guest ASID = 0x1 (1)
PQoS Extended Features (0x80000020):
L3 bandwidth enforcement = true
L3 slow memory bandwidth enforcement = false
bandwidth monitoring event configuration = false
L3 range reservation support = false
assignable bandwidth monitoring counters = false
SDCI allocation enforcement = false
GLBE: global bandwidth enforcement = false
GLSBE: global slow bandwidth enforcement = false
PLZA: privilege level zero association = false
PQoS L3 Memory Bandwidth Enforcement (0x80000020/1):
capacity bitmask length = 0xc (12)
number of classes of service = 0xf (15)
(instruction supported synth):
CMPXCHG8B = true
conditional move/compare = true
PREFETCH/PREFETCHW = true
(multi-processing synth) = multi-core (c=6), hyper-threaded (t=2)
(multi-processing method) = AMD leaf 0xb
(APIC widths synth): CORE_width=6 SMT_width=1
(APIC synth): PKG_ID=0 CORE_ID=6 SMT_ID=1
(uarch synth) = AMD Zen 2, 7nm
(synth) = AMD Ryzen 5000 (Lucienne A1) [Zen 2], 7nm
[-- Attachment #11: cpupower.txt --]
[-- Type: text/plain, Size: 769 bytes --]
analyzing CPU 1:
driver: acpi-cpufreq
CPUs which run at the same hardware frequency: 1
CPUs which need to have their frequency coordinated by software: 1
maximum transition latency: Cannot determine or is not supported.
hardware limits: 1.40 GHz - 4.06 GHz
available frequency steps: 2.10 GHz, 1.70 GHz, 1.40 GHz
available cpufreq governors: conservative ondemand userspace powersave performance schedutil
current policy: frequency should be within 1.40 GHz and 2.10 GHz.
The governor "schedutil" may decide which speed to use
within this range.
current CPU frequency: Unable to call hardware
current CPU frequency: 1.40 GHz (asserted by call to kernel)
boost state support:
Supported: yes
Active: no
[-- Attachment #12: energy-report.html --]
[-- Type: text/html, Size: 32860 bytes --]
[-- Attachment #13: journal.txt --]
[-- Type: text/plain, Size: 107066 bytes --]
lug 31 15:47:38 archlinux kernel: Linux version 7.1.5-arch1-2 (linux@archlinux) (gcc (GCC) 16.1.1 20260728, GNU ld (GNU Binutils) 2.47) #1 SMP PREEMPT_DYNAMIC Tue, 28 Jul 2026 13:49:51 +0000
lug 31 15:47:38 archlinux kernel: Command line: initrd=\initramfs-linux.img root=UUID=07661b1b-e19e-4a46-864d-7b95ce1d5439 rw zswap.enabled=0 amd_pstate=active amd_pstate.shared_mem=1 amd_pstate.dyndbg=+p cppc_acpi.dyndbg=+p
lug 31 15:47:38 archlinux kernel: BIOS-provided physical RAM map:
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x0000000000000000-0x000000000009efff] System RAM
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x000000000009f000-0x00000000000bffff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000000c0000-0x00000000000fffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x0000000000100000-0x0000000009beffff] System RAM
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x0000000009bf0000-0x0000000009dfffff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x0000000009e00000-0x0000000009efffff] System RAM
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x0000000009f00000-0x0000000009f0efff] ACPI NVS
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x0000000009f0f000-0x00000000c5f7efff] System RAM
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000c5f7f000-0x00000000caf7efff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000caf7f000-0x00000000cdf7efff] ACPI NVS
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000cdf7f000-0x00000000cdffefff] ACPI data
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000cdfff000-0x00000000cdffffff] System RAM
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000ce000000-0x00000000cfffffff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000d0000000-0x00000000f7ffffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000fc000000-0x00000000fddfffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000fde00000-0x00000000fdefffff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000fdf00000-0x00000000fdffffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000fe000000-0x00000000fe0fffff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000fe100000-0x00000000febfffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000fec00000-0x00000000fec01fff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000fec02000-0x00000000fec0ffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000fec10000-0x00000000fec10fff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000fec11000-0x00000000fec1ffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000fec20000-0x00000000fec20fff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000fec21000-0x00000000fed7ffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000fed80000-0x00000000fed81fff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000fed82000-0x00000000fedfffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [gap 0x00000000fee01000-0x00000000feffffff]
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] device reserved
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x0000000100000000-0x000000040e2fffff] System RAM
lug 31 15:47:38 archlinux kernel: BIOS-e820: [mem 0x000000040e300000-0x000000042fffffff] device reserved
lug 31 15:47:38 archlinux kernel: NX (Execute Disable) protection: active
lug 31 15:47:38 archlinux kernel: APIC: Static calls initialized
lug 31 15:47:38 archlinux kernel: efi: EFI v2.7 by INSYDE Corp.
lug 31 15:47:38 archlinux kernel: efi: ACPI=0xcdffe000 ACPI 2.0=0xcdffe014 ESRT=0xc9dfa798 TPMFinalLog=0xcdf40000 SMBIOS=0xc9683000 SMBIOS 3.0=0xc9681000 MEMATTR=0xb27d6018 RNG=0xcdfaef18 INITRD=0xb277ff98 TPMEventLog=0xcdfa5018
lug 31 15:47:38 archlinux kernel: random: crng init done
lug 31 15:47:38 archlinux kernel: efi: Remove mem54: MMIO range=[0xf8000000-0xfbffffff] (64MB) from e820 map
lug 31 15:47:38 archlinux kernel: e820: remove [mem 0xf8000000-0xfbffffff] device reserved
lug 31 15:47:38 archlinux kernel: efi: Remove mem55: MMIO range=[0xfde00000-0xfdefffff] (1MB) from e820 map
lug 31 15:47:38 archlinux kernel: e820: remove [mem 0xfde00000-0xfdefffff] device reserved
lug 31 15:47:38 archlinux kernel: efi: Remove mem56: MMIO range=[0xfe000000-0xfe0fffff] (1MB) from e820 map
lug 31 15:47:38 archlinux kernel: e820: remove [mem 0xfe000000-0xfe0fffff] device reserved
lug 31 15:47:38 archlinux kernel: efi: Not removing mem57: MMIO range=[0xfec00000-0xfec01fff] (8KB) from e820 map
lug 31 15:47:38 archlinux kernel: efi: Not removing mem58: MMIO range=[0xfec10000-0xfec10fff] (4KB) from e820 map
lug 31 15:47:38 archlinux kernel: efi: Not removing mem59: MMIO range=[0xfec20000-0xfec20fff] (4KB) from e820 map
lug 31 15:47:38 archlinux kernel: efi: Not removing mem60: MMIO range=[0xfed80000-0xfed81fff] (8KB) from e820 map
lug 31 15:47:38 archlinux kernel: efi: Not removing mem61: MMIO range=[0xfee00000-0xfee00fff] (4KB) from e820 map
lug 31 15:47:38 archlinux kernel: efi: Remove mem62: MMIO range=[0xff000000-0xffffffff] (16MB) from e820 map
lug 31 15:47:38 archlinux kernel: e820: remove [mem 0xff000000-0xffffffff] device reserved
lug 31 15:47:38 archlinux kernel: DMI: SMBIOS 3.3.0 present.
lug 31 15:47:38 archlinux kernel: DMI: HP HP 255 G8 Notebook PC/890E, BIOS F.45 12/09/2025
lug 31 15:47:38 archlinux kernel: DMI: Memory slots populated: 2/2
lug 31 15:47:38 archlinux kernel: tsc: Fast TSC calibration using PIT
lug 31 15:47:38 archlinux kernel: tsc: Detected 2096.037 MHz processor
lug 31 15:47:38 archlinux kernel: e820: update [mem 0x00000000-0x00000fff] System RAM ==> device reserved
lug 31 15:47:38 archlinux kernel: e820: remove [mem 0x000a0000-0x000fffff] System RAM
lug 31 15:47:38 archlinux kernel: last_pfn = 0x40e300 max_arch_pfn = 0x400000000
lug 31 15:47:38 archlinux kernel: MTRR map: 7 entries (4 fixed + 3 variable; max 21), built from 9 variable MTRRs
lug 31 15:47:38 archlinux kernel: x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT
lug 31 15:47:38 archlinux kernel: last_pfn = 0xce000 max_arch_pfn = 0x400000000
lug 31 15:47:38 archlinux kernel: esrt: Reserving ESRT space from 0x00000000c9dfa798 to 0x00000000c9dfa7d0.
lug 31 15:47:38 archlinux kernel: Using GB pages for direct mapping
lug 31 15:47:38 archlinux kernel: Secure boot disabled
lug 31 15:47:38 archlinux kernel: RAMDISK: [mem 0xaa6df000-0xad52efff]
lug 31 15:47:38 archlinux kernel: ACPI: Early table checksum verification disabled
lug 31 15:47:38 archlinux kernel: ACPI: RSDP 0x00000000CDFFE014 000024 (v02 HPQOEM)
lug 31 15:47:38 archlinux kernel: ACPI: XSDT 0x00000000CDFC1188 000144 (v01 HPQOEM SLIC-MPC 00000002 HP 01000013)
lug 31 15:47:38 archlinux kernel: ACPI: FACP 0x00000000CDFE1000 00010C (v05 HPQOEM SLIC-MPC 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: DSDT 0x00000000CDFD4000 00873F (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: FACS 0x00000000CCED3000 000040
lug 31 15:47:38 archlinux kernel: ACPI: UEFI 0x00000000CDF7E000 000236 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFFC000 00021F (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFF4000 0072B0 (v02 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFF0000 003A21 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFEF000 000472 (v02 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: TPM2 0x00000000CDFEE000 00004C (v04 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFED000 00017D (v01 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFE5000 007E47 (v01 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: ASF! 0x00000000CDFE3000 0000A5 (v32 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: BOOT 0x00000000CDFE2000 000028 (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: HPET 0x00000000CDFE0000 000038 (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: APIC 0x00000000CDFDF000 000138 (v03 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: MCFG 0x00000000CDFDE000 00003C (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFD3000 0000C1 (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFD2000 000080 (v01 HPQOEM 890E 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: VFCT 0x00000000CDFC4000 00D884 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFC3000 0000F8 (v01 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFC2000 00005C (v02 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFFD000 00005C (v02 HPQOEM 890E 00001000 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFBD000 003E88 (v02 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: CRAT 0x00000000CDFBC000 000BA8 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: CDIT 0x00000000CDFBB000 000029 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFBA000 000139 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB9000 00028D (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB8000 000372 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB7000 00021F (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB6000 000D53 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB4000 0010C5 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFB0000 00362F (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: FPDT 0x00000000CDFAF000 000044 (v01 HPQOEM SLIC-MPC 00000002 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: WSMT 0x00000000CDFAD000 000028 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: IVRS 0x00000000CDFAC000 0001A4 (v02 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFAB000 00007D (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: SSDT 0x00000000CDFAA000 0004FE (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: BGRT 0x00000000CDFDD000 000038 (v01 HPQOEM 890E 00000001 HP 00040000)
lug 31 15:47:38 archlinux kernel: ACPI: Reserving FACP table memory at [mem 0xcdfe1000-0xcdfe110b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving DSDT table memory at [mem 0xcdfd4000-0xcdfdc73e]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving FACS table memory at [mem 0xcced3000-0xcced303f]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving UEFI table memory at [mem 0xcdf7e000-0xcdf7e235]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdffc000-0xcdffc21e]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdff4000-0xcdffb2af]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdff0000-0xcdff3a20]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfef000-0xcdfef471]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving TPM2 table memory at [mem 0xcdfee000-0xcdfee04b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfed000-0xcdfed17c]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfe5000-0xcdfece46]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving ASF! table memory at [mem 0xcdfe3000-0xcdfe30a4]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving BOOT table memory at [mem 0xcdfe2000-0xcdfe2027]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving HPET table memory at [mem 0xcdfe0000-0xcdfe0037]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving APIC table memory at [mem 0xcdfdf000-0xcdfdf137]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving MCFG table memory at [mem 0xcdfde000-0xcdfde03b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfd3000-0xcdfd30c0]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfd2000-0xcdfd207f]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving VFCT table memory at [mem 0xcdfc4000-0xcdfd1883]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfc3000-0xcdfc30f7]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfc2000-0xcdfc205b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdffd000-0xcdffd05b]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfbd000-0xcdfc0e87]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving CRAT table memory at [mem 0xcdfbc000-0xcdfbcba7]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving CDIT table memory at [mem 0xcdfbb000-0xcdfbb028]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfba000-0xcdfba138]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb9000-0xcdfb928c]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb8000-0xcdfb8371]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb7000-0xcdfb721e]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb6000-0xcdfb6d52]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb4000-0xcdfb50c4]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfb0000-0xcdfb362e]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving FPDT table memory at [mem 0xcdfaf000-0xcdfaf043]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving WSMT table memory at [mem 0xcdfad000-0xcdfad027]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving IVRS table memory at [mem 0xcdfac000-0xcdfac1a3]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfab000-0xcdfab07c]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving SSDT table memory at [mem 0xcdfaa000-0xcdfaa4fd]
lug 31 15:47:38 archlinux kernel: ACPI: Reserving BGRT table memory at [mem 0xcdfdd000-0xcdfdd037]
lug 31 15:47:38 archlinux kernel: No NUMA configuration found
lug 31 15:47:38 archlinux kernel: Faking a node at [mem 0x0000000000000000-0x000000040e2fffff]
lug 31 15:47:38 archlinux kernel: NODE_DATA(0) allocated [mem 0x40e2d4f80-0x40e2fffff]
lug 31 15:47:38 archlinux kernel: ACPI: PM-Timer IO Port: 0x408
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x03] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x04] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x05] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x06] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x07] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x08] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x09] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0a] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0b] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0c] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0d] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0e] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0x0f] high edge lint[0x1])
lug 31 15:47:38 archlinux kernel: IOAPIC[0]: apic_id 33, version 33, address 0xfec00000, GSI 0-23
lug 31 15:47:38 archlinux kernel: IOAPIC[1]: apic_id 34, version 33, address 0xfec01000, GSI 24-55
lug 31 15:47:38 archlinux kernel: ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
lug 31 15:47:38 archlinux kernel: ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
lug 31 15:47:38 archlinux kernel: ACPI: Using ACPI (MADT) for SMP configuration information
lug 31 15:47:38 archlinux kernel: ACPI: HPET id: 0x10228210 base: 0xfed00000
lug 31 15:47:38 archlinux kernel: e820: update [mem 0xb27e1000-0xb27f4fff] System RAM ==> device reserved
lug 31 15:47:38 archlinux kernel: CPU topo: Max. logical packages: 1
lug 31 15:47:38 archlinux kernel: CPU topo: Max. logical nodes: 1
lug 31 15:47:38 archlinux kernel: CPU topo: Num. nodes per package: 1
lug 31 15:47:38 archlinux kernel: CPU topo: Max. logical dies: 1
lug 31 15:47:38 archlinux kernel: CPU topo: Max. dies per package: 1
lug 31 15:47:38 archlinux kernel: CPU topo: Max. threads per core: 2
lug 31 15:47:38 archlinux kernel: CPU topo: Num. cores per package: 6
lug 31 15:47:38 archlinux kernel: CPU topo: Num. threads per package: 12
lug 31 15:47:38 archlinux kernel: CPU topo: Allowing 12 present CPUs plus 0 hotplug CPUs
lug 31 15:47:38 archlinux kernel: PM: hibernation: Registered nosave memory: [mem 0x00000000-0x00000fff]
lug 31 15:47:38 archlinux kernel: PM: hibernation: Registered nosave memory: [mem 0x0009f000-0x000fffff]
lug 31 15:47:38 archlinux kernel: PM: hibernation: Registered nosave memory: [mem 0x09bf0000-0x09dfffff]
lug 31 15:47:38 archlinux kernel: PM: hibernation: Registered nosave memory: [mem 0x09f00000-0x09f0efff]
lug 31 15:47:38 archlinux kernel: PM: hibernation: Registered nosave memory: [mem 0xb27e1000-0xb27f4fff]
lug 31 15:47:38 archlinux kernel: PM: hibernation: Registered nosave memory: [mem 0xc5f7f000-0xcdffefff]
lug 31 15:47:38 archlinux kernel: PM: hibernation: Registered nosave memory: [mem 0xce000000-0xffffffff]
lug 31 15:47:38 archlinux kernel: [gap 0xd0000000-0xfebfffff] available for PCI devices
lug 31 15:47:38 archlinux kernel: Booting paravirtualized kernel on bare hardware
lug 31 15:47:38 archlinux kernel: clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1910969940391419 ns
lug 31 15:47:38 archlinux kernel: Zone ranges:
lug 31 15:47:38 archlinux kernel: DMA [mem 0x0000000000001000-0x0000000000ffffff]
lug 31 15:47:38 archlinux kernel: DMA32 [mem 0x0000000001000000-0x00000000ffffffff]
lug 31 15:47:38 archlinux kernel: Normal [mem 0x0000000100000000-0x000000040e2fffff]
lug 31 15:47:38 archlinux kernel: Device empty
lug 31 15:47:38 archlinux kernel: Movable zone start for each node
lug 31 15:47:38 archlinux kernel: Early memory node ranges
lug 31 15:47:38 archlinux kernel: node 0: [mem 0x0000000000001000-0x000000000009efff]
lug 31 15:47:38 archlinux kernel: node 0: [mem 0x0000000000100000-0x0000000009beffff]
lug 31 15:47:38 archlinux kernel: node 0: [mem 0x0000000009e00000-0x0000000009efffff]
lug 31 15:47:38 archlinux kernel: node 0: [mem 0x0000000009f0f000-0x00000000c5f7efff]
lug 31 15:47:38 archlinux kernel: node 0: [mem 0x00000000cdfff000-0x00000000cdffffff]
lug 31 15:47:38 archlinux kernel: node 0: [mem 0x0000000100000000-0x000000040e2fffff]
lug 31 15:47:38 archlinux kernel: Initmem setup node 0 [mem 0x0000000000001000-0x000000040e2fffff]
lug 31 15:47:38 archlinux kernel: On node 0, zone DMA: 1 pages in unavailable ranges
lug 31 15:47:38 archlinux kernel: On node 0, zone DMA: 97 pages in unavailable ranges
lug 31 15:47:38 archlinux kernel: On node 0, zone DMA32: 528 pages in unavailable ranges
lug 31 15:47:38 archlinux kernel: On node 0, zone DMA32: 15 pages in unavailable ranges
lug 31 15:47:38 archlinux kernel: On node 0, zone DMA32: 32896 pages in unavailable ranges
lug 31 15:47:38 archlinux kernel: On node 0, zone Normal: 8192 pages in unavailable ranges
lug 31 15:47:38 archlinux kernel: On node 0, zone Normal: 7424 pages in unavailable ranges
lug 31 15:47:38 archlinux kernel: setup_percpu: NR_CPUS:8192 nr_cpumask_bits:12 nr_cpu_ids:12 nr_node_ids:1
lug 31 15:47:38 archlinux kernel: percpu: Embedded 63 pages/cpu s221184 r8192 d28672 u262144
lug 31 15:47:38 archlinux kernel: pcpu-alloc: s221184 r8192 d28672 u262144 alloc=1*2097152
lug 31 15:47:38 archlinux kernel: pcpu-alloc: [0] 00 01 02 03 04 05 06 07 [0] 08 09 10 11 -- -- -- --
lug 31 15:47:38 archlinux kernel: Kernel command line: initrd=\initramfs-linux.img root=UUID=07661b1b-e19e-4a46-864d-7b95ce1d5439 rw zswap.enabled=0 amd_pstate=active amd_pstate.shared_mem=1 amd_pstate.dyndbg=+p cppc_acpi.dyndbg=+p
lug 31 15:47:38 archlinux kernel: printk: log buffer data + meta data: 131072 + 557056 = 688128 bytes
lug 31 15:47:38 archlinux kernel: Dentry cache hash table entries: 2097152 (order: 12, 16777216 bytes, linear)
lug 31 15:47:38 archlinux kernel: Inode-cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
lug 31 15:47:38 archlinux kernel: software IO TLB: area num 16.
lug 31 15:47:38 archlinux kernel: Fallback order for Node 0: 0
lug 31 15:47:38 archlinux kernel: Built 1 zonelists, mobility grouping on. Total pages: 4014079
lug 31 15:47:38 archlinux kernel: Policy zone: Normal
lug 31 15:47:38 archlinux kernel: mem auto-init: stack:all(zero), heap alloc:on, heap free:off
lug 31 15:47:38 archlinux kernel: SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=12, Nodes=1
lug 31 15:47:38 archlinux kernel: ftrace: allocating 58190 entries in 228 pages
lug 31 15:47:38 archlinux kernel: ftrace: allocated 228 pages with 4 groups
lug 31 15:47:38 archlinux kernel: Dynamic Preempt: full
lug 31 15:47:38 archlinux kernel: rcu: Preemptible hierarchical RCU implementation.
lug 31 15:47:38 archlinux kernel: rcu: RCU restricting CPUs from NR_CPUS=8192 to nr_cpu_ids=12.
lug 31 15:47:38 archlinux kernel: rcu: RCU priority boosting: priority 1 delay 500 ms.
lug 31 15:47:38 archlinux kernel: Trampoline variant of Tasks RCU enabled.
lug 31 15:47:38 archlinux kernel: Rude variant of Tasks RCU enabled.
lug 31 15:47:38 archlinux kernel: Tracing variant of Tasks RCU enabled.
lug 31 15:47:38 archlinux kernel: rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies.
lug 31 15:47:38 archlinux kernel: rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=12
lug 31 15:47:38 archlinux kernel: RCU Tasks: Setting shift to 4 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=12.
lug 31 15:47:38 archlinux kernel: RCU Tasks Rude: Setting shift to 4 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=12.
lug 31 15:47:38 archlinux kernel: NR_IRQS: 524544, nr_irqs: 1064, preallocated irqs: 16
lug 31 15:47:38 archlinux kernel: rcu: srcu_init: Setting srcu_struct sizes based on contention.
lug 31 15:47:38 archlinux kernel: clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
lug 31 15:47:38 archlinux kernel: kfence: initialized - using 2097152 bytes for 255 objects at 0x(____ptrval____)-0x(____ptrval____)
lug 31 15:47:38 archlinux kernel: Console: colour dummy device 80x25
lug 31 15:47:38 archlinux kernel: printk: legacy console [tty0] enabled
lug 31 15:47:38 archlinux kernel: ACPI: Core revision 20251212
lug 31 15:47:38 archlinux kernel: clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 133484873504 ns
lug 31 15:47:38 archlinux kernel: APIC: Switch to symmetric I/O mode setup
lug 31 15:47:38 archlinux kernel: AMD-Vi: ivrs, add hid:AMDI0020, uid:\_SB.FUR0, rdevid:0xa0
lug 31 15:47:38 archlinux kernel: AMD-Vi: ivrs, add hid:AMDI0020, uid:\_SB.FUR1, rdevid:0xa0
lug 31 15:47:38 archlinux kernel: AMD-Vi: ivrs, add hid:AMDI0020, uid:\_SB.FUR2, rdevid:0xa0
lug 31 15:47:38 archlinux kernel: AMD-Vi: ivrs, add hid:AMDI0020, uid:\_SB.FUR3, rdevid:0xa0
lug 31 15:47:38 archlinux kernel: AMD-Vi: Using global IVHD EFR:0x206d73ef22254ade, EFR2:0x0
lug 31 15:47:38 archlinux kernel: ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
lug 31 15:47:38 archlinux kernel: clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x1e3690ae8ae, max_idle_ns: 440795219964 ns
lug 31 15:47:38 archlinux kernel: Calibrating delay loop (skipped), value calculated using timer frequency.. 4192.07 BogoMIPS (lpj=2096037)
lug 31 15:47:38 archlinux kernel: x86/cpu: User Mode Instruction Prevention (UMIP) activated
lug 31 15:47:38 archlinux kernel: LVT offset 1 assigned for vector 0xf9
lug 31 15:47:38 archlinux kernel: LVT offset 2 assigned for vector 0xf4
lug 31 15:47:38 archlinux kernel: Last level iTLB entries: 4KB 1024, 2MB 1024, 4MB 512
lug 31 15:47:38 archlinux kernel: Last level dTLB entries: 4KB 2048, 2MB 2048, 4MB 1024, 1GB 0
lug 31 15:47:38 archlinux kernel: process: using mwait in idle threads
lug 31 15:47:38 archlinux kernel: mitigations: Enabled attack vectors: user_kernel, user_user, guest_host, guest_guest, SMT mitigations: auto
lug 31 15:47:38 archlinux kernel: Speculative Store Bypass: Mitigation: Speculative Store Bypass disabled via prctl
lug 31 15:47:38 archlinux kernel: Spectre V2 : Mitigation: Retpolines
lug 31 15:47:38 archlinux kernel: RETBleed: Mitigation: untrained return thunk
lug 31 15:47:38 archlinux kernel: Spectre V2 : Selecting STIBP always-on mode to complement retbleed mitigation
lug 31 15:47:38 archlinux kernel: Spectre V2 : User space: Mitigation: STIBP always-on protection
lug 31 15:47:38 archlinux kernel: Speculative Return Stack Overflow: Mitigation: Safe RET
lug 31 15:47:38 archlinux kernel: VMSCAPE: Mitigation: IBPB before exit to userspace
lug 31 15:47:38 archlinux kernel: Spectre V1 : Mitigation: usercopy/swapgs barriers and __user pointer sanitization
lug 31 15:47:38 archlinux kernel: Spectre V2 : Spectre v2 / SpectreRSB: Filling RSB on context switch and VMEXIT
lug 31 15:47:38 archlinux kernel: Spectre V2 : Enabling Speculation Barrier for firmware calls
lug 31 15:47:38 archlinux kernel: active return thunk: retbleed_return_thunk
lug 31 15:47:38 archlinux kernel: Spectre V2 : mitigation: Enabling conditional Indirect Branch Prediction Barrier
lug 31 15:47:38 archlinux kernel: active return thunk: srso_return_thunk
lug 31 15:47:38 archlinux kernel: x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
lug 31 15:47:38 archlinux kernel: x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
lug 31 15:47:38 archlinux kernel: x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers'
lug 31 15:47:38 archlinux kernel: x86/fpu: xstate_offset[2]: 576, xstate_sizes[2]: 256
lug 31 15:47:38 archlinux kernel: x86/fpu: Enabled xstate features 0x7, context size is 832 bytes, using 'compacted' format.
lug 31 15:47:38 archlinux kernel: pid_max: default: 32768 minimum: 301
lug 31 15:47:38 archlinux kernel: landlock: Up and running.
lug 31 15:47:38 archlinux kernel: Yama: becoming mindful.
lug 31 15:47:38 archlinux kernel: LSM support for eBPF active
lug 31 15:47:38 archlinux kernel: Mount-cache hash table entries: 32768 (order: 6, 262144 bytes, linear)
lug 31 15:47:38 archlinux kernel: Mountpoint-cache hash table entries: 32768 (order: 6, 262144 bytes, linear)
lug 31 15:47:38 archlinux kernel: VFS: Finished mounting rootfs on nullfs
lug 31 15:47:38 archlinux kernel: smpboot: CPU0: AMD Ryzen 5 5500U with Radeon Graphics (family: 0x17, model: 0x68, stepping: 0x1)
lug 31 15:47:38 archlinux kernel: Performance Events: Fam17h+ core perfctr, AMD PMU driver.
lug 31 15:47:38 archlinux kernel: ... version: 0
lug 31 15:47:38 archlinux kernel: ... bit width: 48
lug 31 15:47:38 archlinux kernel: ... generic counters: 6
lug 31 15:47:38 archlinux kernel: ... generic bitmap: 000000000000003f
lug 31 15:47:38 archlinux kernel: ... fixed-purpose counters: 0
lug 31 15:47:38 archlinux kernel: ... fixed-purpose bitmap: 0000000000000000
lug 31 15:47:38 archlinux kernel: ... value mask: 0000ffffffffffff
lug 31 15:47:38 archlinux kernel: ... max period: 00007fffffffffff
lug 31 15:47:38 archlinux kernel: ... global_ctrl mask: 000000000000003f
lug 31 15:47:38 archlinux kernel: signal: max sigframe size: 1776
lug 31 15:47:38 archlinux kernel: rcu: Hierarchical SRCU implementation.
lug 31 15:47:38 archlinux kernel: rcu: Max phase no-delay instances is 400.
lug 31 15:47:38 archlinux kernel: Timer migration: 2 hierarchy levels; 8 children per group; 2 crossnode level
lug 31 15:47:38 archlinux kernel: MCE: In-kernel MCE decoding enabled.
lug 31 15:47:38 archlinux kernel: NMI watchdog: Enabled. Permanently consumes one hw-PMU counter.
lug 31 15:47:38 archlinux kernel: smp: Bringing up secondary CPUs ...
lug 31 15:47:38 archlinux kernel: smpboot: x86: Booting SMP configuration:
lug 31 15:47:38 archlinux kernel: .... node #0, CPUs: #2 #4 #6 #8 #10 #1 #3 #5 #7 #9 #11
lug 31 15:47:38 archlinux kernel: Spectre V2 : Update user space SMT mitigation: STIBP always-on
lug 31 15:47:38 archlinux kernel: smp: Brought up 1 node, 12 CPUs
lug 31 15:47:38 archlinux kernel: smpboot: Total of 12 processors activated (50304.88 BogoMIPS)
lug 31 15:47:38 archlinux kernel: Memory: 15532364K/16056316K available (22014K kernel code, 3015K rwdata, 17484K rodata, 4904K init, 5160K bss, 503356K reserved, 0K cma-reserved)
lug 31 15:47:38 archlinux kernel: devtmpfs: initialized
lug 31 15:47:38 archlinux kernel: x86/mm: Memory block size: 128MB
lug 31 15:47:38 archlinux kernel: ACPI: PM: Registering ACPI NVS region [mem 0x09f00000-0x09f0efff] (61440 bytes)
lug 31 15:47:38 archlinux kernel: ACPI: PM: Registering ACPI NVS region [mem 0xcaf7f000-0xcdf7efff] (50331648 bytes)
lug 31 15:47:38 archlinux kernel: posixtimers hash table entries: 8192 (order: 5, 131072 bytes, linear)
lug 31 15:47:38 archlinux kernel: futex hash table entries: 4096 (262144 bytes on 1 NUMA nodes, total 256 KiB, linear).
lug 31 15:47:38 archlinux kernel: xor: automatically using best checksumming function avx
lug 31 15:47:38 archlinux kernel: PM: RTC time: 13:47:37, date: 2026-07-31
lug 31 15:47:38 archlinux kernel: NET: Registered PF_NETLINK/PF_ROUTE protocol family
lug 31 15:47:38 archlinux kernel: DMA: preallocated 2048 KiB GFP_KERNEL pool for atomic allocations
lug 31 15:47:38 archlinux kernel: DMA: preallocated 2048 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
lug 31 15:47:38 archlinux kernel: DMA: preallocated 2048 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
lug 31 15:47:38 archlinux kernel: audit: initializing netlink subsys (disabled)
lug 31 15:47:38 archlinux kernel: audit: type=2000 audit(1785505656.170:1): state=initialized audit_enabled=0 res=1
lug 31 15:47:38 archlinux kernel: thermal_sys: Registered thermal governor 'fair_share'
lug 31 15:47:38 archlinux kernel: thermal_sys: Registered thermal governor 'bang_bang'
lug 31 15:47:38 archlinux kernel: thermal_sys: Registered thermal governor 'step_wise'
lug 31 15:47:38 archlinux kernel: thermal_sys: Registered thermal governor 'user_space'
lug 31 15:47:38 archlinux kernel: thermal_sys: Registered thermal governor 'power_allocator'
lug 31 15:47:38 archlinux kernel: cpuidle: using governor ladder
lug 31 15:47:38 archlinux kernel: cpuidle: using governor menu
lug 31 15:47:38 archlinux kernel: Simple Boot Flag at 0x44 set to 0x1
lug 31 15:47:38 archlinux kernel: Freeing SMP alternatives memory: 56K
lug 31 15:47:38 archlinux kernel: efi: Freeing EFI boot services memory: 45176K
lug 31 15:47:38 archlinux kernel: ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
lug 31 15:47:38 archlinux kernel: acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
lug 31 15:47:38 archlinux kernel: PCI: ECAM [mem 0xf8000000-0xfbffffff] (base 0xf8000000) for domain 0000 [bus 00-3f]
lug 31 15:47:38 archlinux kernel: PCI: Using configuration type 1 for base access
lug 31 15:47:38 archlinux kernel: virt/tdx: TDX not supported by the host platform
lug 31 15:47:38 archlinux kernel: kprobes: kprobe jump-optimization is enabled. All kprobes are optimized if possible.
lug 31 15:47:38 archlinux kernel: HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
lug 31 15:47:38 archlinux kernel: HugeTLB: 16380 KiB vmemmap can be freed for a 1.00 GiB page
lug 31 15:47:38 archlinux kernel: HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
lug 31 15:47:38 archlinux kernel: HugeTLB: 28 KiB vmemmap can be freed for a 2.00 MiB page
lug 31 15:47:38 archlinux kernel: raid6: skipped pq benchmark and selected avx2x4
lug 31 15:47:38 archlinux kernel: raid6: using avx2x2 recovery algorithm
lug 31 15:47:38 archlinux kernel: fbcon: Taking over console
lug 31 15:47:38 archlinux kernel: ACPI: Added _OSI(Module Device)
lug 31 15:47:38 archlinux kernel: ACPI: Added _OSI(Processor Device)
lug 31 15:47:38 archlinux kernel: ACPI: Added _OSI(Processor Aggregator Device)
lug 31 15:47:38 archlinux kernel: ACPI: 21 ACPI AML tables successfully acquired and loaded
lug 31 15:47:38 archlinux kernel: ACPI: [Firmware Bug]: BIOS _OSI(Linux) query ignored
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_: platform _OSC: OS support mask [006e7eff]
lug 31 15:47:38 archlinux kernel: ACPI: EC: EC started
lug 31 15:47:38 archlinux kernel: ACPI: EC: interrupt blocked
lug 31 15:47:38 archlinux kernel: ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PCI0.LPC0.EC0_: Boot DSDT EC used to handle transactions
lug 31 15:47:38 archlinux kernel: ACPI: Interpreter enabled
lug 31 15:47:38 archlinux kernel: ACPI: PM: (supports S0 S3 S4 S5)
lug 31 15:47:38 archlinux kernel: ACPI: Using IOAPIC for interrupt routing
lug 31 15:47:38 archlinux kernel: PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
lug 31 15:47:38 archlinux kernel: PCI: Ignoring E820 reservations for host bridge windows
lug 31 15:47:38 archlinux kernel: ACPI: Enabled 4 GPEs in block 00 to 1F
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PCI0.GPP2.WLAN.PRWL: New power resource
lug 31 15:47:38 archlinux kernel: ACPI BIOS Error (bug): Could not resolve symbol [\_SB.WLBU._STA.WLVD], AE_NOT_FOUND (20251212/psargs-332)
lug 31 15:47:38 archlinux kernel: ACPI Error: Aborting method \_SB.WLBU._STA due to previous error (AE_NOT_FOUND) (20251212/psparse-529)
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PRWL: New power resource
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PRWB: New power resource
lug 31 15:47:38 archlinux kernel: ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI EDR HPX-Type3]
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: _OSC: platform does not support [SHPCHotplug LTR DPC]
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: FADT indicates ASPM is unsupported, using BIOS configuration
lug 31 15:47:38 archlinux kernel: acpi PNP0A08:00: [Firmware Info]: ECAM [mem 0xf8000000-0xfbffffff] for domain 0000 [bus 00-3f] only partially covers this bridge
lug 31 15:47:38 archlinux kernel: PCI host bridge to bus 0000:00
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7 window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [io 0x0d00-0xffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000cffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000effff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0xd0000000-0xf7ffffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0xfc000000-0xfeafffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0xfed45000-0xfed811ff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0xfed81900-0xfed81fff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0xfedc0000-0xfedc0fff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0xfedc6000-0xfedc6fff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [mem 0x450200000-0xfcffffffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: root bus resource [bus 00-ff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:00.0: [1022:1630] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:00.2: [1022:1631] type 00 class 0x080600 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.0: [1022:1632] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: [1022:1634] type 01 class 0x060400 PCIe Root Port
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: PCI bridge to [bus 01]
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: bridge window [io 0x3000-0x3fff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: bridge window [mem 0xd0700000-0xd07fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: removing 2.5GT/s downstream link speed restriction
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: PME# supported from D0 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.0: [1022:1632] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: [1022:1634] type 01 class 0x060400 PCIe Root Port
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: PCI bridge to [bus 02]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: bridge window [io 0x2000-0x2fff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: bridge window [mem 0xd0600000-0xd06fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: removing 2.5GT/s downstream link speed restriction
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: PME# supported from D0 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: [1022:1634] type 01 class 0x060400 PCIe Root Port
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: PCI bridge to [bus 03]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: bridge window [mem 0xd0500000-0xd05fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: PME# supported from D0 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.0: [1022:1632] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: [1022:1635] type 01 class 0x060400 PCIe Root Port
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: PCI bridge to [bus 04]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: bridge window [io 0x1000-0x1fff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: bridge window [mem 0xd0100000-0xd04fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: bridge window [mem 0xfce0000000-0xfcf01fffff 64bit pref]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: PME# supported from D0 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.2: [1022:1635] type 01 class 0x060400 PCIe Root Port
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.2: PCI bridge to [bus 05]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.2: bridge window [mem 0xd0000000-0xd00fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.2: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.2: PME# supported from D0 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:00:14.0: [1022:790b] type 00 class 0x0c0500 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:14.3: [1022:790e] type 00 class 0x060100 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.0: [1022:1448] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.1: [1022:1449] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.2: [1022:144a] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.3: [1022:144b] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.4: [1022:144c] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.5: [1022:144d] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.6: [1022:144e] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.7: [1022:144f] type 00 class 0x060000 conventional PCI endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:01:00.0: [10ec:8852] type 00 class 0x028000 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:01:00.0: BAR 0 [io 0x3000-0x30ff]
lug 31 15:47:38 archlinux kernel: pci 0000:01:00.0: BAR 2 [mem 0xd0700000-0xd07fffff 64bit]
lug 31 15:47:38 archlinux kernel: pci 0000:01:00.0: supports D1 D2
lug 31 15:47:38 archlinux kernel: pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: PCI bridge to [bus 01]
lug 31 15:47:38 archlinux kernel: pci 0000:02:00.0: [10ec:8168] type 00 class 0x020000 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:02:00.0: BAR 0 [io 0x2000-0x20ff]
lug 31 15:47:38 archlinux kernel: pci 0000:02:00.0: BAR 2 [mem 0xd0604000-0xd0604fff 64bit]
lug 31 15:47:38 archlinux kernel: pci 0000:02:00.0: BAR 4 [mem 0xd0600000-0xd0603fff 64bit]
lug 31 15:47:38 archlinux kernel: pci 0000:02:00.0: supports D1 D2
lug 31 15:47:38 archlinux kernel: pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: PCI bridge to [bus 02]
lug 31 15:47:38 archlinux kernel: pci 0000:03:00.0: [1987:5013] type 00 class 0x010802 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:03:00.0: BAR 0 [mem 0xd0500000-0xd0503fff 64bit]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: PCI bridge to [bus 03]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: [1002:164c] type 00 class 0x030000 PCIe Legacy Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: BAR 0 [mem 0xfce0000000-0xfcefffffff 64bit pref]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: BAR 2 [mem 0xfcf0000000-0xfcf01fffff 64bit pref]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: BAR 4 [io 0x1000-0x10ff]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: BAR 5 [mem 0xd0400000-0xd047ffff]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: PME# supported from D1 D2 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.1: [1002:1637] type 00 class 0x040300 PCIe Legacy Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.1: BAR 0 [mem 0xd04c8000-0xd04cbfff]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.1: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.1: PME# supported from D1 D2 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.2: [1022:15df] type 00 class 0x108000 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.2: BAR 2 [mem 0xd0300000-0xd03fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.2: BAR 5 [mem 0xd04cc000-0xd04cdfff]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.2: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.3: [1022:1639] type 00 class 0x0c0330 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.3: BAR 0 [mem 0xd0100000-0xd01fffff 64bit]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.3: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.3: PME# supported from D0 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.4: [1022:1639] type 00 class 0x0c0330 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.4: BAR 0 [mem 0xd0200000-0xd02fffff 64bit]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.4: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.4: PME# supported from D0 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.5: [1022:15e2] type 00 class 0x048000 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.5: BAR 0 [mem 0xd0480000-0xd04bffff]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.5: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.5: PME# supported from D0 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.6: [1022:15e3] type 00 class 0x040300 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.6: BAR 0 [mem 0xd04c0000-0xd04c7fff]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.6: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.6: PME# supported from D0 D3hot D3cold
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: PCI bridge to [bus 04]
lug 31 15:47:38 archlinux kernel: pci 0000:05:00.0: [1022:7901] type 00 class 0x010601 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:05:00.0: BAR 5 [mem 0xd0001000-0xd00017ff]
lug 31 15:47:38 archlinux kernel: pci 0000:05:00.0: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:05:00.1: [1022:7901] type 00 class 0x010601 PCIe Endpoint
lug 31 15:47:38 archlinux kernel: pci 0000:05:00.1: BAR 5 [mem 0xd0000000-0xd00007ff]
lug 31 15:47:38 archlinux kernel: pci 0000:05:00.1: enabling Extended Tags
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.2: PCI bridge to [bus 05]
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKA configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKA disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKB configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKB disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKC configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKC disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKD configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKD disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKE configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKE disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKF configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKF disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKG configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKG disabled
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKH configured for IRQ 0
lug 31 15:47:38 archlinux kernel: ACPI: PCI: Interrupt link LNKH disabled
lug 31 15:47:38 archlinux kernel: ACPI BIOS Error (bug): Could not resolve symbol [\_SB.WLBU._STA.WLVD], AE_NOT_FOUND (20251212/psargs-332)
lug 31 15:47:38 archlinux kernel: ACPI Error: Aborting method \_SB.WLBU._STA due to previous error (AE_NOT_FOUND) (20251212/psparse-529)
lug 31 15:47:38 archlinux kernel: ACPI: EC: interrupt unblocked
lug 31 15:47:38 archlinux kernel: ACPI: EC: event unblocked
lug 31 15:47:38 archlinux kernel: ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62
lug 31 15:47:38 archlinux kernel: ACPI: EC: GPE=0x3
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PCI0.LPC0.EC0_: Boot DSDT EC initialization complete
lug 31 15:47:38 archlinux kernel: ACPI: \_SB_.PCI0.LPC0.EC0_: EC: Used to handle transactions and events
lug 31 15:47:38 archlinux kernel: iommu: Default domain type: Translated
lug 31 15:47:38 archlinux kernel: iommu: DMA domain TLB invalidation policy: lazy mode
lug 31 15:47:38 archlinux kernel: SCSI subsystem initialized
lug 31 15:47:38 archlinux kernel: libata version 3.00 loaded.
lug 31 15:47:38 archlinux kernel: ACPI: bus type USB registered
lug 31 15:47:38 archlinux kernel: usbcore: registered new interface driver usbfs
lug 31 15:47:38 archlinux kernel: usbcore: registered new interface driver hub
lug 31 15:47:38 archlinux kernel: usbcore: registered new device driver usb
lug 31 15:47:38 archlinux kernel: ACPI BIOS Error (bug): Could not resolve symbol [\_SB.WLBU._STA.WLVD], AE_NOT_FOUND (20251212/psargs-332)
lug 31 15:47:38 archlinux kernel: ACPI Error: Aborting method \_SB.WLBU._STA due to previous error (AE_NOT_FOUND) (20251212/psparse-529)
lug 31 15:47:38 archlinux kernel: EDAC MC: Ver: 3.0.0
lug 31 15:47:38 archlinux kernel: efivars: Registered efivars operations
lug 31 15:47:38 archlinux kernel: NetLabel: Initializing
lug 31 15:47:38 archlinux kernel: NetLabel: domain hash size = 128
lug 31 15:47:38 archlinux kernel: NetLabel: protocols = UNLABELED CIPSOv4 CALIPSO
lug 31 15:47:38 archlinux kernel: NetLabel: unlabeled traffic allowed by default
lug 31 15:47:38 archlinux kernel: mctp: management component transport protocol core
lug 31 15:47:38 archlinux kernel: NET: Registered PF_MCTP protocol family
lug 31 15:47:38 archlinux kernel: PCI: Using ACPI for IRQ routing
lug 31 15:47:38 archlinux kernel: PCI: pci_cache_line_size set to 64 bytes
lug 31 15:47:38 archlinux kernel: resource: Expanded resource Reserved due to conflict with PCI Bus 0000:00
lug 31 15:47:38 archlinux kernel: e820: register RAM buffer resource [mem 0x0009f000-0x0009ffff]
lug 31 15:47:38 archlinux kernel: e820: register RAM buffer resource [mem 0x09bf0000-0x0bffffff]
lug 31 15:47:38 archlinux kernel: e820: register RAM buffer resource [mem 0x09f00000-0x0bffffff]
lug 31 15:47:38 archlinux kernel: e820: register RAM buffer resource [mem 0xb27e1000-0xb3ffffff]
lug 31 15:47:38 archlinux kernel: e820: register RAM buffer resource [mem 0xc5f7f000-0xc7ffffff]
lug 31 15:47:38 archlinux kernel: e820: register RAM buffer resource [mem 0xce000000-0xcfffffff]
lug 31 15:47:38 archlinux kernel: e820: register RAM buffer resource [mem 0x40e300000-0x40fffffff]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: vgaarb: setting as boot VGA device
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: vgaarb: bridge control possible
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: vgaarb: VGA device added: decodes=io+mem,owns=none,locks=none
lug 31 15:47:38 archlinux kernel: vgaarb: loaded
lug 31 15:47:38 archlinux kernel: hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
lug 31 15:47:38 archlinux kernel: hpet0: 3 comparators, 32-bit 14.318180 MHz counter
lug 31 15:47:38 archlinux kernel: clocksource: Switched to clocksource tsc-early
lug 31 15:47:38 archlinux kernel: VFS: Disk quotas dquot_6.6.0
lug 31 15:47:38 archlinux kernel: VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:00: Could not reserve [mem 0xfec00000-0xfec01fff]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:00: Reserved [mem 0xfee00000-0xfee00fff]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:00: Reserved [mem 0xfde00000-0xfdefffff]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x0010-0x001f]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x0072-0x0073]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x0080]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x00b0-0x00b1]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Skipped [io 0x0092]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0400-0x04cf]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x04d0-0x04d1]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x04d6]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c00-0x0c01]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c14]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c50-0x0c52]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c6c]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0c6f]
lug 31 15:47:38 archlinux kernel: acpi PNP0C02:01: Reserved [io 0x0cd0-0x0cdb]
lug 31 15:47:38 archlinux kernel: acpi PNP0C01:00: Reserved [mem 0xff000000-0xffffffff]
lug 31 15:47:38 archlinux kernel: pnp: PnP ACPI init
lug 31 15:47:38 archlinux kernel: ACPI BIOS Error (bug): Could not resolve symbol [\_SB.WLBU._STA.WLVD], AE_NOT_FOUND (20251212/psargs-332)
lug 31 15:47:38 archlinux kernel: ACPI Error: Aborting method \_SB.WLBU._STA due to previous error (AE_NOT_FOUND) (20251212/psparse-529)
lug 31 15:47:38 archlinux kernel: pnp: PnP ACPI: found 1 devices
lug 31 15:47:38 archlinux kernel: clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
lug 31 15:47:38 archlinux kernel: NET: Registered PF_INET protocol family
lug 31 15:47:38 archlinux kernel: IP idents hash table entries: 262144 (order: 9, 2097152 bytes, linear)
lug 31 15:47:38 archlinux kernel: tcp_listen_portaddr_hash hash table entries: 8192 (order: 5, 131072 bytes, linear)
lug 31 15:47:38 archlinux kernel: Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
lug 31 15:47:38 archlinux kernel: TCP established hash table entries: 131072 (order: 8, 1048576 bytes, linear)
lug 31 15:47:38 archlinux kernel: TCP bind hash table entries: 65536 (order: 9, 2097152 bytes, linear)
lug 31 15:47:38 archlinux kernel: TCP: Hash tables configured (established 131072 bind 65536)
lug 31 15:47:38 archlinux kernel: MPTCP token hash table entries: 16384 (order: 7, 393216 bytes, linear)
lug 31 15:47:38 archlinux kernel: UDP hash table entries: 8192 (order: 7, 524288 bytes, linear)
lug 31 15:47:38 archlinux kernel: NET: Registered PF_UNIX/PF_LOCAL protocol family
lug 31 15:47:38 archlinux kernel: NET: Registered PF_XDP protocol family
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: bridge window [io 0x1000-0x0fff] to [bus 03] add_size 1000
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 03] add_size 200000 add_align 100000
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: bridge window [mem 0x450200000-0x4503fffff 64bit pref]: assigned
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: bridge window [io 0x4000-0x4fff]: assigned
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: PCI bridge to [bus 01]
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: bridge window [io 0x3000-0x3fff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: bridge window [mem 0xd0700000-0xd07fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: PCI bridge to [bus 02]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: bridge window [io 0x2000-0x2fff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: bridge window [mem 0xd0600000-0xd06fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: PCI bridge to [bus 03]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: bridge window [io 0x4000-0x4fff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: bridge window [mem 0xd0500000-0xd05fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: bridge window [mem 0x450200000-0x4503fffff 64bit pref]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: PCI bridge to [bus 04]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: bridge window [io 0x1000-0x1fff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: bridge window [mem 0xd0100000-0xd04fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: bridge window [mem 0xfce0000000-0xfcf01fffff 64bit pref]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.2: PCI bridge to [bus 05]
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.2: bridge window [mem 0xd0000000-0xd00fffff]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7 window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 5 [io 0x0d00-0xffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000cffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 8 [mem 0x000d0000-0x000effff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 9 [mem 0xd0000000-0xf7ffffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 10 [mem 0xfc000000-0xfeafffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 11 [mem 0xfed45000-0xfed811ff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 12 [mem 0xfed81900-0xfed81fff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 13 [mem 0xfedc0000-0xfedc0fff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 14 [mem 0xfedc6000-0xfedc6fff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:00: resource 15 [mem 0x450200000-0xfcffffffff window]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:01: resource 0 [io 0x3000-0x3fff]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:01: resource 1 [mem 0xd0700000-0xd07fffff]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:02: resource 0 [io 0x2000-0x2fff]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:02: resource 1 [mem 0xd0600000-0xd06fffff]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:03: resource 0 [io 0x4000-0x4fff]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:03: resource 1 [mem 0xd0500000-0xd05fffff]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:03: resource 2 [mem 0x450200000-0x4503fffff 64bit pref]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:04: resource 0 [io 0x1000-0x1fff]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:04: resource 1 [mem 0xd0100000-0xd04fffff]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:04: resource 2 [mem 0xfce0000000-0xfcf01fffff 64bit pref]
lug 31 15:47:38 archlinux kernel: pci_bus 0000:05: resource 1 [mem 0xd0000000-0xd00fffff]
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.1: D0 power state depends on 0000:04:00.0
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.3: extending delay after power-on from D3hot to 20 msec
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.4: extending delay after power-on from D3hot to 20 msec
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.4: quirk_usb_early_handoff+0x0/0x830 took 11072 usecs
lug 31 15:47:38 archlinux kernel: PCI: CLS 64 bytes, default 64
lug 31 15:47:38 archlinux kernel: pci 0000:00:00.2: AMD-Vi: IOMMU performance counters supported
lug 31 15:47:38 archlinux kernel: Trying to unpack rootfs image as initramfs...
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.0: Adding to iommu group 0
lug 31 15:47:38 archlinux kernel: pci 0000:00:01.3: Adding to iommu group 1
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.0: Adding to iommu group 2
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.1: Adding to iommu group 3
lug 31 15:47:38 archlinux kernel: pci 0000:00:02.3: Adding to iommu group 4
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.0: Adding to iommu group 5
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.1: Adding to iommu group 6
lug 31 15:47:38 archlinux kernel: pci 0000:00:08.2: Adding to iommu group 7
lug 31 15:47:38 archlinux kernel: pci 0000:00:14.0: Adding to iommu group 8
lug 31 15:47:38 archlinux kernel: pci 0000:00:14.3: Adding to iommu group 8
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.0: Adding to iommu group 9
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.1: Adding to iommu group 9
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.2: Adding to iommu group 9
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.3: Adding to iommu group 9
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.4: Adding to iommu group 9
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.5: Adding to iommu group 9
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.6: Adding to iommu group 9
lug 31 15:47:38 archlinux kernel: pci 0000:00:18.7: Adding to iommu group 9
lug 31 15:47:38 archlinux kernel: pci 0000:01:00.0: Adding to iommu group 10
lug 31 15:47:38 archlinux kernel: pci 0000:02:00.0: Adding to iommu group 11
lug 31 15:47:38 archlinux kernel: pci 0000:03:00.0: Adding to iommu group 12
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.0: Adding to iommu group 13
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.1: Adding to iommu group 14
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.2: Adding to iommu group 15
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.3: Adding to iommu group 16
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.4: Adding to iommu group 17
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.5: Adding to iommu group 18
lug 31 15:47:38 archlinux kernel: pci 0000:04:00.6: Adding to iommu group 19
lug 31 15:47:38 archlinux kernel: pci 0000:05:00.0: Adding to iommu group 20
lug 31 15:47:38 archlinux kernel: pci 0000:05:00.1: Adding to iommu group 21
lug 31 15:47:38 archlinux kernel: AMD-Vi: Extended features (0x206d73ef22254ade, 0x0): PPR X2APIC NX GT IA GA PC GA_vAPIC
lug 31 15:47:38 archlinux kernel: AMD-Vi: Interrupt remapping enabled
lug 31 15:47:38 archlinux kernel: AMD-Vi: X2APIC enabled
lug 31 15:47:38 archlinux kernel: AMD-Vi: Virtual APIC enabled
lug 31 15:47:38 archlinux kernel: PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
lug 31 15:47:38 archlinux kernel: software IO TLB: mapped [mem 0x00000000c1727000-0x00000000c5727000] (64MB)
lug 31 15:47:38 archlinux kernel: LVT offset 0 assigned for vector 0x400
lug 31 15:47:38 archlinux kernel: perf: AMD IBS detected (0x000003ff)
lug 31 15:47:38 archlinux kernel: perf/amd_iommu: Detected AMD IOMMU #0 (2 banks, 4 counters/bank).
lug 31 15:47:38 archlinux kernel: platform rtc_cmos: registered fallback platform RTC device
lug 31 15:47:38 archlinux kernel: Initialise system trusted keyrings
lug 31 15:47:38 archlinux kernel: Key type blacklist registered
lug 31 15:47:38 archlinux kernel: workingset: timestamp_bits=36 (anon: 32) max_order=22 bucket_order=0 (anon: 0)
lug 31 15:47:38 archlinux kernel: fuse: init (API version 7.45)
lug 31 15:47:38 archlinux kernel: integrity: Platform Keyring initialized
lug 31 15:47:38 archlinux kernel: integrity: Machine keyring initialized
lug 31 15:47:38 archlinux kernel: Key type asymmetric registered
lug 31 15:47:38 archlinux kernel: Asymmetric key parser 'x509' registered
lug 31 15:47:38 archlinux kernel: Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
lug 31 15:47:38 archlinux kernel: io scheduler mq-deadline registered
lug 31 15:47:38 archlinux kernel: io scheduler kyber registered
lug 31 15:47:38 archlinux kernel: io scheduler bfq registered
lug 31 15:47:38 archlinux kernel: ledtrig-cpu: registered to indicate activity on CPUs
lug 31 15:47:38 archlinux kernel: pcieport 0000:00:01.3: PME: Signaling with IRQ 28
lug 31 15:47:38 archlinux kernel: pcieport 0000:00:02.1: PME: Signaling with IRQ 29
lug 31 15:47:38 archlinux kernel: pcieport 0000:00:02.3: PME: Signaling with IRQ 30
lug 31 15:47:38 archlinux kernel: pcieport 0000:00:02.3: pciehp: Slot #0 AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Interlock- NoCompl+ IbPresDis- LLActRep+
lug 31 15:47:38 archlinux kernel: pcieport 0000:00:08.1: PME: Signaling with IRQ 31
lug 31 15:47:38 archlinux kernel: pcieport 0000:00:08.2: PME: Signaling with IRQ 32
lug 31 15:47:38 archlinux kernel: ACPI: AC: AC Adapter [ACAD] (on-line)
lug 31 15:47:38 archlinux kernel: input: Power Button as /devices/platform/PNP0C0C:00/input/input0
lug 31 15:47:38 archlinux kernel: ACPI: button: Power Button [PWRB]
lug 31 15:47:38 archlinux kernel: input: Lid Switch as /devices/platform/PNP0C0D:00/input/input1
lug 31 15:47:38 archlinux kernel: ACPI: button: Lid Switch [LID]
lug 31 15:47:38 archlinux kernel: input: Power Button as /devices/platform/LNXPWRBN:00/input/input2
lug 31 15:47:38 archlinux kernel: ACPI: button: Power Button [PWRF]
lug 31 15:47:38 archlinux kernel: Monitor-Mwait will be used to enter C-1 state
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 0
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 1
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 2
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 3
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 4
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 5
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 6
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 7
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 8
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 9
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 10
lug 31 15:47:38 archlinux kernel: ACPI CPPC: CPPC v2 _OSC not acked
lug 31 15:47:38 archlinux kernel: ACPI CPPC: Parsed CPC struct for CPU: 11
lug 31 15:47:38 archlinux kernel: Estimated ratio of average max frequency by base frequency (times 1024): 1501
lug 31 15:47:38 archlinux kernel: ACPI: thermal: [Firmware Bug]: Invalid critical threshold (-274000)
lug 31 15:47:38 archlinux kernel: acpi LNXTHERM:00: registered as thermal_zone0
lug 31 15:47:38 archlinux kernel: ACPI: thermal: Thermal Zone [TSZ0] (52 C)
lug 31 15:47:38 archlinux kernel: acpi LNXTHERM:01: registered as thermal_zone1
lug 31 15:47:38 archlinux kernel: ACPI: thermal: Thermal Zone [TSZ2] (20 C)
lug 31 15:47:38 archlinux kernel: Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled
lug 31 15:47:38 archlinux kernel: Non-volatile memory driver v1.3
lug 31 15:47:38 archlinux kernel: Freeing initrd memory: 47424K
lug 31 15:47:38 archlinux kernel: ACPI: battery: Slot [BAT1] (battery present)
lug 31 15:47:38 archlinux kernel: tpm_crb_acpi MSFT0101:00: Disabling hwrng
lug 31 15:47:38 archlinux kernel: tpm tpm0: tpm_read_log_acpi: Failed to map ACPI memory
lug 31 15:47:38 archlinux kernel: ACPI: bus type drm_connector registered
lug 31 15:47:38 archlinux kernel: ahci 0000:05:00.0: AHCI vers 0001.0301, 32 command slots, 6 Gbps, SATA mode
lug 31 15:47:38 archlinux kernel: ahci 0000:05:00.0: 1/1 ports implemented (port mask 0x1)
lug 31 15:47:38 archlinux kernel: ahci 0000:05:00.0: flags: 64bit ncq sntf ilck pm led clo only pmp fbs pio slum part
lug 31 15:47:38 archlinux kernel: scsi host0: ahci
lug 31 15:47:38 archlinux kernel: ata1: SATA max UDMA/133 abar m2048@0xd0001000 port 0xd0001100 irq 34 lpm-pol 3
lug 31 15:47:38 archlinux kernel: ahci 0000:05:00.1: AHCI vers 0001.0301, 32 command slots, 6 Gbps, SATA mode
lug 31 15:47:38 archlinux kernel: ahci 0000:05:00.1: 1/1 ports implemented (port mask 0x1)
lug 31 15:47:38 archlinux kernel: ahci 0000:05:00.1: flags: 64bit ncq sntf ilck pm led clo only pmp fbs pio slum part
lug 31 15:47:38 archlinux kernel: scsi host1: ahci
lug 31 15:47:38 archlinux kernel: ata2: SATA max UDMA/133 abar m2048@0xd0000000 port 0xd0000100 irq 36 lpm-pol 3
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.3: xHCI Host Controller
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.3: new USB bus registered, assigned bus number 1
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.3: hcc params 0x0268ffe5 hci version 0x110 quirks 0x0000020000000010
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.3: xHCI Host Controller
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.3: new USB bus registered, assigned bus number 2
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.3: Host supports USB 3.1 Enhanced SuperSpeed
lug 31 15:47:38 archlinux kernel: usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 7.01
lug 31 15:47:38 archlinux kernel: usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
lug 31 15:47:38 archlinux kernel: usb usb1: Product: xHCI Host Controller
lug 31 15:47:38 archlinux kernel: usb usb1: Manufacturer: Linux 7.1.5-arch1-2 xhci-hcd
lug 31 15:47:38 archlinux kernel: usb usb1: SerialNumber: 0000:04:00.3
lug 31 15:47:38 archlinux kernel: hub 1-0:1.0: USB hub found
lug 31 15:47:38 archlinux kernel: hub 1-0:1.0: 4 ports detected
lug 31 15:47:38 archlinux kernel: usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
lug 31 15:47:38 archlinux kernel: usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 7.01
lug 31 15:47:38 archlinux kernel: usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
lug 31 15:47:38 archlinux kernel: usb usb2: Product: xHCI Host Controller
lug 31 15:47:38 archlinux kernel: usb usb2: Manufacturer: Linux 7.1.5-arch1-2 xhci-hcd
lug 31 15:47:38 archlinux kernel: usb usb2: SerialNumber: 0000:04:00.3
lug 31 15:47:38 archlinux kernel: hub 2-0:1.0: USB hub found
lug 31 15:47:38 archlinux kernel: hub 2-0:1.0: 2 ports detected
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.4: xHCI Host Controller
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.4: new USB bus registered, assigned bus number 3
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.4: hcc params 0x0268ffe5 hci version 0x110 quirks 0x0000020000000010
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.4: xHCI Host Controller
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.4: new USB bus registered, assigned bus number 4
lug 31 15:47:38 archlinux kernel: xhci_hcd 0000:04:00.4: Host supports USB 3.1 Enhanced SuperSpeed
lug 31 15:47:38 archlinux kernel: usb usb3: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 7.01
lug 31 15:47:38 archlinux kernel: usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
lug 31 15:47:38 archlinux kernel: usb usb3: Product: xHCI Host Controller
lug 31 15:47:38 archlinux kernel: usb usb3: Manufacturer: Linux 7.1.5-arch1-2 xhci-hcd
lug 31 15:47:38 archlinux kernel: usb usb3: SerialNumber: 0000:04:00.4
lug 31 15:47:38 archlinux kernel: hub 3-0:1.0: USB hub found
lug 31 15:47:38 archlinux kernel: hub 3-0:1.0: 4 ports detected
lug 31 15:47:38 archlinux kernel: usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
lug 31 15:47:38 archlinux kernel: usb usb4: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 7.01
lug 31 15:47:38 archlinux kernel: usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
lug 31 15:47:38 archlinux kernel: usb usb4: Product: xHCI Host Controller
lug 31 15:47:38 archlinux kernel: usb usb4: Manufacturer: Linux 7.1.5-arch1-2 xhci-hcd
lug 31 15:47:38 archlinux kernel: usb usb4: SerialNumber: 0000:04:00.4
lug 31 15:47:38 archlinux kernel: hub 4-0:1.0: USB hub found
lug 31 15:47:38 archlinux kernel: hub 4-0:1.0: 2 ports detected
lug 31 15:47:38 archlinux kernel: usb: port power management may be unreliable
lug 31 15:47:38 archlinux kernel: usbcore: registered new interface driver usbserial_generic
lug 31 15:47:38 archlinux kernel: usbserial: USB Serial support registered for generic
lug 31 15:47:38 archlinux kernel: i8042: PNP: PS/2 Controller [PNP0303:KBC0] at 0x60,0x64 irq 1
lug 31 15:47:38 archlinux kernel: i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
lug 31 15:47:38 archlinux kernel: serio: i8042 KBD port at 0x60,0x64 irq 1
lug 31 15:47:38 archlinux kernel: rtc_cmos rtc_cmos: RTC can wake from S4
lug 31 15:47:38 archlinux kernel: rtc_cmos rtc_cmos: registered as rtc0
lug 31 15:47:38 archlinux kernel: rtc_cmos rtc_cmos: setting system clock to 2026-07-31T13:47:37 UTC (1785505657)
lug 31 15:47:38 archlinux kernel: rtc_cmos rtc_cmos: alarms up to one month, 114 bytes nvram
lug 31 15:47:38 archlinux kernel: amd_pstate: The CPPC feature is supported but currently disabled by the BIOS.
Please enable it if your BIOS has the CPPC option.
lug 31 15:47:38 archlinux kernel: amd_pstate: AMD CPPC shared memory based functionality is supported
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 0: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 1: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 2: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 3: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 4: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 5: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 6: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 7: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 8: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 9: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 10: -524
lug 31 15:47:38 archlinux kernel: ACPI CPPC: _CPC in PCC/FFH/SystemMemory are not supported
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to set energy perf value (-524)
lug 31 15:47:38 archlinux kernel: amd_pstate: Failed to initialize CPU 11: -524
lug 31 15:47:38 archlinux kernel: amd_pstate: failed to register with return -19
lug 31 15:47:38 archlinux kernel: simple-framebuffer simple-framebuffer.0: [drm] Registered 1 planes with drm panic
lug 31 15:47:38 archlinux kernel: [drm] Initialized simpledrm 1.0.0 for simple-framebuffer.0 on minor 0
lug 31 15:47:38 archlinux kernel: Console: switching to colour frame buffer device 240x67
lug 31 15:47:38 archlinux kernel: simple-framebuffer simple-framebuffer.0: [drm] fb0: simpledrmdrmfb frame buffer device
lug 31 15:47:38 archlinux kernel: input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3
lug 31 15:47:38 archlinux kernel: hid: raw HID events driver (C) Jiri Kosina
lug 31 15:47:38 archlinux kernel: usbcore: registered new interface driver usbhid
lug 31 15:47:38 archlinux kernel: usbhid: USB HID core driver
lug 31 15:47:38 archlinux kernel: drop_monitor: Initializing network drop monitor service
lug 31 15:47:38 archlinux kernel: NET: Registered PF_INET6 protocol family
lug 31 15:47:38 archlinux kernel: Segment Routing with IPv6
lug 31 15:47:38 archlinux kernel: RPL Segment Routing with IPv6
lug 31 15:47:38 archlinux kernel: In-situ OAM (IOAM) with IPv6
lug 31 15:47:38 archlinux kernel: NET: Registered PF_PACKET protocol family
lug 31 15:47:38 archlinux kernel: microcode: Current revision: 0x08608109
lug 31 15:47:38 archlinux kernel: resctrl: L3 allocation detected
lug 31 15:47:38 archlinux kernel: resctrl: MB allocation detected
lug 31 15:47:38 archlinux kernel: resctrl: L3 monitoring detected
lug 31 15:47:38 archlinux kernel: IPI shorthand broadcast: enabled
lug 31 15:47:38 archlinux kernel: sched_clock: Marking stable (767422500, 403124)->(788275929, -20450305)
lug 31 15:47:38 archlinux kernel: registered taskstats version 1
lug 31 15:47:38 archlinux kernel: Loading compiled-in X.509 certificates
lug 31 15:47:38 archlinux kernel: Loaded X.509 cert 'Build time autogenerated kernel key: b9d7654c10b35e7ffae092536ef2accbbedb86ba'
lug 31 15:47:38 archlinux kernel: Demotion targets for Node 0: null
lug 31 15:47:38 archlinux kernel: Key type .fscrypt registered
lug 31 15:47:38 archlinux kernel: Key type fscrypt-provisioning registered
lug 31 15:47:38 archlinux kernel: Btrfs loaded, zoned=yes, fsverity=yes
lug 31 15:47:38 archlinux kernel: Key type big_key registered
lug 31 15:47:38 archlinux kernel: PM: Magic number: 2:950:787
lug 31 15:47:38 archlinux kernel: RAS: Correctable Errors collector initialized.
lug 31 15:47:38 archlinux kernel: clk: Disabling unused clocks
lug 31 15:47:38 archlinux kernel: PM: genpd: Disabling unused power domains
lug 31 15:47:38 archlinux kernel: usb 3-2: new full-speed USB device number 2 using xhci_hcd
lug 31 15:47:38 archlinux kernel: ata1: SATA link down (SStatus 0 SControl 300)
lug 31 15:47:38 archlinux kernel: ata2: SATA link down (SStatus 0 SControl 300)
lug 31 15:47:38 archlinux kernel: Freeing unused decrypted memory: 2028K
lug 31 15:47:38 archlinux kernel: Freeing unused kernel image (initmem) memory: 4904K
lug 31 15:47:38 archlinux kernel: Write protecting the kernel read-only data: 40960k
lug 31 15:47:38 archlinux kernel: Freeing unused kernel image (text/rodata gap) memory: 512K
lug 31 15:47:38 archlinux kernel: Freeing unused kernel image (rodata/data gap) memory: 948K
lug 31 15:47:38 archlinux kernel: x86/mm: Checked W+X mappings: passed, no W+X pages found.
lug 31 15:47:38 archlinux kernel: rodata_test: all tests were successful
lug 31 15:47:38 archlinux kernel: Run /init as init process
lug 31 15:47:38 archlinux kernel: with arguments:
lug 31 15:47:38 archlinux kernel: /init
lug 31 15:47:38 archlinux kernel: with environment:
lug 31 15:47:38 archlinux kernel: HOME=/
lug 31 15:47:38 archlinux kernel: TERM=linux
lug 31 15:47:38 archlinux kernel: usb 3-2: New USB device found, idVendor=0bda, idProduct=2852, bcdDevice= 0.00
lug 31 15:47:38 archlinux kernel: usb 3-2: New USB device strings: Mfr=1, Product=2, SerialNumber=3
lug 31 15:47:38 archlinux kernel: usb 3-2: Product: Bluetooth Radio
lug 31 15:47:38 archlinux kernel: usb 3-2: Manufacturer: Realtek
lug 31 15:47:38 archlinux kernel: usb 3-2: SerialNumber: 00e04c000001
lug 31 15:47:38 archlinux systemd[1]: Successfully made /usr/ read-only.
lug 31 15:47:38 archlinux kernel: usb 3-4: new high-speed USB device number 3 using xhci_hcd
lug 31 15:47:38 archlinux kernel: usb 3-4: New USB device found, idVendor=04f2, idProduct=b6f1, bcdDevice=27.26
lug 31 15:47:38 archlinux kernel: usb 3-4: New USB device strings: Mfr=3, Product=1, SerialNumber=2
lug 31 15:47:38 archlinux kernel: usb 3-4: Product: HP TrueVision HD Camera
lug 31 15:47:38 archlinux kernel: usb 3-4: Manufacturer: Chicony Electronics Co.,Ltd.
lug 31 15:47:38 archlinux kernel: usb 3-4: SerialNumber: 0001
lug 31 15:47:38 archlinux systemd[1]: systemd 261.2-1-arch running in system mode (+PAM +AUDIT -SELINUX +APPARMOR -IMA +IPE +SMACK +SECCOMP +GCRYPT +GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 +KMOD +LIBCRYPTSETUP +LIBCRYPTSETUP_PLUGINS +LIBFDISK +PCRE2 +PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD +BPF_FRAMEWORK +BTF +XKBCOMMON +UTMP +LIBARCHIVE)
lug 31 15:47:38 archlinux systemd[1]: Detected architecture x86-64.
lug 31 15:47:38 archlinux systemd[1]: Running in initrd.
lug 31 15:47:38 archlinux systemd[1]: Initializing machine ID from random generator.
lug 31 15:47:38 archlinux systemd[1]: Queued start job for default target Initrd Default Target.
lug 31 15:47:38 archlinux systemd[1]: Expecting device /dev/disk/by-uuid/07661b1b-e19e-4a46-864d-7b95ce1d5439...
lug 31 15:47:38 archlinux systemd[1]: Reached target Path Units.
lug 31 15:47:38 archlinux systemd[1]: Reached target Slice Units.
lug 31 15:47:38 archlinux systemd[1]: Reached target Swaps.
lug 31 15:47:38 archlinux systemd[1]: Reached target Timer Units.
lug 31 15:47:38 archlinux systemd[1]: Listening on Journal Socket (/dev/log).
lug 31 15:47:38 archlinux systemd[1]: Listening on Journal Sockets.
lug 31 15:47:38 archlinux systemd[1]: Listening on udev Control Socket.
lug 31 15:47:38 archlinux systemd[1]: Listening on udev Kernel Socket.
lug 31 15:47:38 archlinux systemd[1]: Reached target Socket Units.
lug 31 15:47:38 archlinux systemd[1]: Create List of Static Device Nodes skipped, unmet condition check ConditionFileNotEmpty=/lib/modules/7.1.5-arch1-2/modules.devname
lug 31 15:47:38 archlinux systemd[1]: Starting Early Battery Level Check...
lug 31 15:47:38 archlinux systemd[1]: Starting Journal Service...
lug 31 15:47:38 archlinux systemd[1]: Starting Load Kernel Modules...
lug 31 15:47:38 archlinux systemd[1]: TPM PCR Barrier (initrd) skipped, unmet condition check ConditionSecurity=measured-os
lug 31 15:47:38 archlinux systemd[1]: Starting Create Static Device Nodes in /dev...
lug 31 15:47:38 archlinux systemd[1]: Starting Coldplug All udev Devices...
lug 31 15:47:38 archlinux systemd[1]: Finished Early Battery Level Check.
lug 31 15:47:38 archlinux systemd[1]: Started Display Boot-Time Emergency Messages In Full Screen.
lug 31 15:47:38 archlinux systemd[1]: Finished Load Kernel Modules.
lug 31 15:47:38 archlinux systemd[1]: Finished Create Static Device Nodes in /dev.
lug 31 15:47:38 archlinux systemd[1]: Reached target Preparation for Local File Systems.
lug 31 15:47:38 archlinux systemd[1]: Reached target Local File Systems.
lug 31 15:47:38 archlinux systemd[1]: Starting Rule-based Manager for Device Events and Files...
lug 31 15:47:38 archlinux systemd-journald[162]: Collecting audit messages is disabled.
lug 31 15:47:38 archlinux systemd[1]: Started Rule-based Manager for Device Events and Files.
lug 31 15:47:38 archlinux systemd-journald[162]: Journal started
lug 31 15:47:38 archlinux systemd-journald[162]: Runtime Journal (/run/log/journal/4a89ecdab71e49bcb6e51fe95a5f6f69) is 8M, max 305.7M, 297.7M free.
lug 31 15:47:38 archlinux systemd-udevd[168]: Using default interface naming scheme 'v261'.
lug 31 15:47:38 archlinux systemd[1]: Started Journal Service.
lug 31 15:47:38 archlinux systemd[1]: Starting Create System Files and Directories...
lug 31 15:47:38 archlinux systemd[1]: Finished Create System Files and Directories.
lug 31 15:47:38 archlinux kernel: tsc: Refined TSC clocksource calibration: 2096.053 MHz
lug 31 15:47:38 archlinux kernel: clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x1e369fd61e0, max_idle_ns: 440795252296 ns
lug 31 15:47:38 archlinux kernel: clocksource: Switched to clocksource tsc
lug 31 15:47:38 archlinux systemd[1]: Finished Coldplug All udev Devices.
lug 31 15:47:38 archlinux systemd[1]: Reached target System Initialization.
lug 31 15:47:38 archlinux systemd[1]: Reached target Basic System.
lug 31 15:47:38 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02: [Firmware Info]: 8232DE3D-663D-4327-A8F4-E293ADB9BF05 has zero instances
lug 31 15:47:38 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02: [Firmware Info]: 8F1F6436-9F42-42C8-BADC-0E9424F20C9A has zero instances
lug 31 15:47:38 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02: [Firmware Info]: 8F1F6435-9F42-42C8-BADC-0E9424F20C9A has zero instances
lug 31 15:47:38 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02: [Firmware Info]: DF4E63B6-3BBC-4858-9737-C74F82F821F3 has zero instances
lug 31 15:47:38 archlinux kernel: Key type psk registered
lug 31 15:47:38 archlinux kernel: ACPI: video: Video Device [VGA] (multi-head: yes rom: no post: no)
lug 31 15:47:38 archlinux kernel: input: Video Bus as /devices/pci0000:00/0000:00:08.1/acpi.video_bus.0/input/input4
lug 31 15:47:38 archlinux systemd[1]: Starting Virtual Console Setup...
lug 31 15:47:38 archlinux kernel: nvme 0000:03:00.0: platform quirk: setting simple suspend
lug 31 15:47:38 archlinux kernel: nvme nvme0: pci function 0000:03:00.0
lug 31 15:47:38 archlinux kernel: nvme nvme0: missing or invalid SUBNQN field.
lug 31 15:47:38 archlinux systemd[1]: Finished Virtual Console Setup.
lug 31 15:47:38 archlinux kernel: nvme nvme0: passthrough uses implicit buffer lengths
lug 31 15:47:38 archlinux kernel: nvme nvme0: allocated 128 MiB host memory buffer (1 segment).
lug 31 15:47:38 archlinux kernel: nvme nvme0: 8/0/0 default/read/poll queues
lug 31 15:47:38 archlinux kernel: nvme0n1: p1 p2 p3 p4 p5 p6 p7
lug 31 15:47:38 archlinux systemd[1]: Found device TEAM TM8FP6512G Linux_data_parti.
lug 31 15:47:38 archlinux systemd[1]: Reached target Initrd Root Device.
lug 31 15:47:38 archlinux systemd[1]: Starting File System Check on /dev/disk/by-uuid/07661b1b-e19e-4a46-864d-7b95ce1d5439...
lug 31 15:47:38 archlinux systemd-fsck[233]: Linux_data_parti: clean, 5143877/24985600 files, 41631272/99916800 blocks
lug 31 15:47:38 archlinux systemd[1]: Finished File System Check on /dev/disk/by-uuid/07661b1b-e19e-4a46-864d-7b95ce1d5439.
lug 31 15:47:39 archlinux systemd[1]: Mounting /sysroot...
lug 31 15:47:39 archlinux kernel: EXT4-fs (nvme0n1p7): mounted filesystem 07661b1b-e19e-4a46-864d-7b95ce1d5439 r/w with ordered data mode. Quota mode: none.
lug 31 15:47:39 archlinux systemd[1]: Mounted /sysroot.
lug 31 15:47:39 archlinux systemd[1]: Reached target Initrd Root File System.
lug 31 15:47:39 archlinux systemd[1]: Starting Mountpoints Configured in the Real Root...
lug 31 15:47:39 archlinux systemd[1]: initrd-parse-etc.service: Deactivated successfully.
lug 31 15:47:39 archlinux systemd[1]: Finished Mountpoints Configured in the Real Root.
lug 31 15:47:39 archlinux systemd[1]: initrd-parse-etc.service: Triggering OnSuccess= dependencies.
lug 31 15:47:39 archlinux systemd[1]: Reached target Initrd File Systems.
lug 31 15:47:39 archlinux systemd[1]: Reached target Initrd Default Target.
lug 31 15:47:39 archlinux systemd[1]: Starting Cleaning Up and Shutting Down Daemons...
lug 31 15:47:39 archlinux systemd[1]: Stopped target Initrd Default Target.
lug 31 15:47:39 archlinux systemd[1]: Stopped target Basic System.
lug 31 15:47:39 archlinux systemd[1]: Stopped target Initrd Root Device.
lug 31 15:47:39 archlinux systemd[1]: Stopped target Path Units.
lug 31 15:47:39 archlinux systemd[1]: Stopped target Slice Units.
lug 31 15:47:39 archlinux systemd[1]: Stopped target Socket Units.
lug 31 15:47:39 archlinux systemd[1]: Stopped target System Initialization.
lug 31 15:47:39 archlinux systemd[1]: Stopped target Swaps.
lug 31 15:47:39 archlinux systemd[1]: Stopped target Timer Units.
lug 31 15:47:39 archlinux systemd[1]: Stopping Display Boot-Time Emergency Messages In Full Screen...
lug 31 15:47:39 archlinux systemd[1]: systemd-modules-load.service: Deactivated successfully.
lug 31 15:47:39 archlinux systemd[1]: Stopped Load Kernel Modules.
lug 31 15:47:39 archlinux systemd[1]: systemd-tmpfiles-setup.service: Deactivated successfully.
lug 31 15:47:39 archlinux systemd[1]: Stopped Create System Files and Directories.
lug 31 15:47:39 archlinux systemd[1]: Stopped target Local File Systems.
lug 31 15:47:39 archlinux systemd[1]: Stopped target Preparation for Local File Systems.
lug 31 15:47:39 archlinux systemd[1]: systemd-udev-trigger.service: Deactivated successfully.
lug 31 15:47:39 archlinux systemd[1]: Stopped Coldplug All udev Devices.
lug 31 15:47:39 archlinux systemd[1]: Stopping Rule-based Manager for Device Events and Files...
lug 31 15:47:39 archlinux systemd[1]: systemd-vconsole-setup.service: Deactivated successfully.
lug 31 15:47:39 archlinux systemd[1]: Stopped Virtual Console Setup.
lug 31 15:47:39 archlinux systemd[1]: systemd-bsod.service: Deactivated successfully.
lug 31 15:47:39 archlinux systemd[1]: Stopped Display Boot-Time Emergency Messages In Full Screen.
lug 31 15:47:39 archlinux systemd[1]: initrd-cleanup.service: Deactivated successfully.
lug 31 15:47:39 archlinux systemd[1]: Finished Cleaning Up and Shutting Down Daemons.
lug 31 15:47:39 archlinux systemd[1]: systemd-battery-check.service: Deactivated successfully.
lug 31 15:47:39 archlinux systemd[1]: Stopped Early Battery Level Check.
lug 31 15:47:40 archlinux kernel: clocksource: Watchdog remote CPU 6 read timed out
lug 31 15:47:42 archlinux kernel: amdgpu: Virtual CRAT table created for CPU
lug 31 15:47:42 archlinux kernel: amdgpu: Topology: Add CPU node
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: enabling device (0006 -> 0007)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: initializing kernel modesetting (RENOIR 0x1002:0x164C 0x103C:0x890E 0xC2).
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: register mmio base: 0xD0400000
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: register mmio size: 524288
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 0 <common_v2_0_0> (soc15_common)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 1 <gmc_v9_0_0> (gmc_v9_0)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 2 <ih_v4_0_0> (vega10_ih)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 3 <psp_v12_0_0> (psp)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 4 <smu_v12_0_0> (smu)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 5 <dce_v1_0_0> (dm)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 6 <gfx_v9_0_0> (gfx_v9_0)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 7 <sdma_v4_0_0> (sdma_v4_0)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 8 <vcn_v2_0_0> (vcn_v2_0)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: detected ip block number 9 <jpeg_v2_0_0> (jpeg_v2_0)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: Fetched VBIOS from VFCT
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] ATOM BIOS: 113-LUCIENNE-019, build: 603189 , ver: 017.010.000.031.000000, 2022/02/23
lug 31 15:47:42 archlinux kernel: Console: switching to colour dummy device 80x25
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: vgaarb: deactivate vga console
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: Trusted Memory Zone (TMZ) feature enabled
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: vm size is 262144 GB, 4 levels, block size is 9-bit, fragment size is 9-bit
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: VRAM: 512M 0x000000F400000000 - 0x000000F41FFFFFFF (512M used)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: GART: 1024M 0x0000000000000000 - 0x000000003FFFFFFF
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] Detected VRAM RAM=512M, BAR=512M
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] RAM width 128bits DDR4
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: 512M of VRAM memory ready
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: 7643M of GTT memory ready.
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] GART: num cpu pages 262144, num gpu pages 262144
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] PCIE GART of 1024M enabled.
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] PTB located at 0x000000F41FC00000
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] Loading DMUB firmware via PSP: version=0x0101002B
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [VCN instance 0] Found VCN firmware Version ENC: 1.24 DEC: 8 VEP: 0 Revision: 9
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: reserve 0x400000 from 0xf41f800000 for PSP TMR
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: RAS: optional ras ta ucode is not available
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: RAP: optional rap ta ucode is not available
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: psp gfx command LOAD_TA(0x1) failed and response status is (0x7)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: smu driver if version = 0x0000000e, smu fw if version = 0x0000000e, smu fw program = 0, smu fw version = 0x00375d00 (55.93.0)
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: SMU is initialized successfully!
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] Display Core v3.2.378 initialized on DCN 2.1
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] DP-HDMI FRL PCON supported
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] DMUB hardware initialized: version=0x0101002B
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: kiq ring mec 2 pipe 1 q 0
lug 31 15:47:42 archlinux kernel: kfd kfd: Allocated 3969056 bytes on gart
lug 31 15:47:42 archlinux kernel: kfd kfd: Total number of KFD nodes to be created: 1
lug 31 15:47:42 archlinux kernel: amdgpu: Virtual CRAT table created for GPU
lug 31 15:47:42 archlinux kernel: amdgpu: Topology: Add GPU node [0x1002:0x164c]
lug 31 15:47:42 archlinux kernel: kfd kfd: added device 1002:164c
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: SE 1, SH per SE 1, CU per SH 8, active_cu_number 7
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring gfx uses VM inv eng 0 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring comp_1.0.0 uses VM inv eng 1 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring comp_1.1.0 uses VM inv eng 4 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring comp_1.2.0 uses VM inv eng 5 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring comp_1.3.0 uses VM inv eng 6 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring comp_1.0.1 uses VM inv eng 7 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring comp_1.1.1 uses VM inv eng 8 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring comp_1.2.1 uses VM inv eng 9 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring comp_1.3.1 uses VM inv eng 10 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring kiq_0.2.1.0 uses VM inv eng 11 on hub 0
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring sdma0 uses VM inv eng 0 on hub 8
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring vcn_dec uses VM inv eng 1 on hub 8
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring vcn_enc0 uses VM inv eng 4 on hub 8
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring vcn_enc1 uses VM inv eng 5 on hub 8
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: ring jpeg_dec uses VM inv eng 6 on hub 8
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: Runtime PM not available
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] Using custom brightness curve
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] Registered 4 planes with drm panic
lug 31 15:47:42 archlinux kernel: [drm] Initialized amdgpu 3.64.0 for 0000:04:00.0 on minor 1
lug 31 15:47:42 archlinux kernel: fbcon: amdgpudrmfb (fb0) is primary device
lug 31 15:47:42 archlinux kernel: [drm] pre_validate_dsc:1667 MST_DSC dsc precompute is not needed
lug 31 15:47:42 archlinux kernel: Console: switching to colour frame buffer device 240x67
lug 31 15:47:42 archlinux kernel: amdgpu 0000:04:00.0: [drm] fb0: amdgpudrmfb frame buffer device
lug 31 15:47:42 archlinux systemd[1]: systemd-udevd.service: Deactivated successfully.
lug 31 15:47:42 archlinux systemd[1]: Stopped Rule-based Manager for Device Events and Files.
lug 31 15:47:42 archlinux systemd[1]: systemd-udevd.service: Consumed 4.412s CPU time over 4.372s wall clock time, 32.2M memory peak.
lug 31 15:47:42 archlinux systemd[1]: systemd-udevd-control.socket: Deactivated successfully.
lug 31 15:47:42 archlinux systemd[1]: Closed udev Control Socket.
lug 31 15:47:42 archlinux systemd[1]: Starting Cleanup udev Database...
lug 31 15:47:42 archlinux systemd[1]: systemd-tmpfiles-setup-dev.service: Deactivated successfully.
lug 31 15:47:42 archlinux systemd[1]: Stopped Create Static Device Nodes in /dev.
lug 31 15:47:42 archlinux systemd[1]: initrd-udevadm-cleanup-db.service: Deactivated successfully.
lug 31 15:47:42 archlinux systemd[1]: Finished Cleanup udev Database.
lug 31 15:47:42 archlinux systemd[1]: Reached target Switch Root.
lug 31 15:47:42 archlinux systemd[1]: Starting Switch Root...
lug 31 15:47:42 archlinux systemd[1]: Switching root.
lug 31 15:47:42 archlinux systemd-journald[162]: Journal stopped
lug 31 15:47:43 HP255G8R5 systemd-journald[162]: Received SIGTERM from PID 1 (systemd).
lug 31 15:47:43 HP255G8R5 systemd[1]: systemd 261.2-1-arch running in system mode (+PAM +AUDIT -SELINUX +APPARMOR -IMA +IPE +SMACK +SECCOMP +GCRYPT +GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 +KMOD +LIBCRYPTSETUP +LIBCRYPTSETUP_PLUGINS +LIBFDISK +PCRE2 +PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD +BPF_FRAMEWORK +BTF +XKBCOMMON +UTMP +LIBARCHIVE)
lug 31 15:47:43 HP255G8R5 systemd[1]: Detected architecture x86-64.
lug 31 15:47:43 HP255G8R5 systemd[1]: Hostname set to <HP255G8R5>.
lug 31 15:47:43 HP255G8R5 systemd[1]: bpf-restrict-fs: LSM BPF program attached
lug 31 15:47:43 HP255G8R5 kernel: zram: Added device: zram0
lug 31 15:47:43 HP255G8R5 systemd[1]: initrd-switch-root.service: Deactivated successfully.
lug 31 15:47:43 HP255G8R5 systemd[1]: Stopped Switch Root.
lug 31 15:47:43 HP255G8R5 systemd[1]: systemd-journald.service: Scheduled restart job, restart counter is at 1.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/dirmngr.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/getty.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/gpg-agent.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/gpg-agent-browser.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/gpg-agent-extra.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/gpg-agent-ssh.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/keyboxd.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/modprobe.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/systemd-fsck.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice Slice /system/systemd-zram-setup.
lug 31 15:47:43 HP255G8R5 systemd[1]: Created slice User and Session Slice.
lug 31 15:47:43 HP255G8R5 systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
lug 31 15:47:43 HP255G8R5 systemd[1]: Started Forward Password Requests to Wall Directory Watch.
lug 31 15:47:43 HP255G8R5 systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point.
lug 31 15:47:43 HP255G8R5 systemd[1]: Expecting device /dev/disk/by-uuid/751bc8c8-6446-403c-9889-1c190d1fc011...
lug 31 15:47:43 HP255G8R5 systemd[1]: Expecting device /dev/disk/by-uuid/EBC3-A536...
lug 31 15:47:43 HP255G8R5 systemd[1]: Expecting device /dev/disk/by-uuid/FCA7-2FD3...
lug 31 15:47:43 HP255G8R5 systemd[1]: Expecting device /dev/zram0...
lug 31 15:47:43 HP255G8R5 systemd[1]: Reached target Login Prompts.
lug 31 15:47:43 HP255G8R5 systemd[1]: Reached target Image Downloads.
lug 31 15:47:43 HP255G8R5 systemd[1]: Stopped target Switch Root.
lug 31 15:47:43 HP255G8R5 systemd[1]: Stopped target Initrd File Systems.
lug 31 15:47:43 HP255G8R5 systemd[1]: Stopped target Initrd Root File System.
lug 31 15:47:43 HP255G8R5 systemd[1]: Reached target Local Integrity Protected Volumes.
lug 31 15:47:43 HP255G8R5 systemd[1]: Reached target Path Units.
lug 31 15:47:43 HP255G8R5 systemd[1]: Reached target Remote File Systems.
lug 31 15:47:43 HP255G8R5 systemd[1]: Reached target Slice Units.
lug 31 15:47:43 HP255G8R5 systemd[1]: Reached target Local Verity Protected Volumes.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Device-mapper event daemon FIFOs.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on LVM2 poll daemon socket.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Query the User Interactively for a Password.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Process Core Dump Socket.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Credential Encryption/Decryption.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Factory Reset Management.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Hostname Service Socket.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Console Output Muting Service Socket.
lug 31 15:47:43 HP255G8R5 systemd[1]: TPM PCR Measurements skipped, unmet condition check ConditionSecurity=measured-os
lug 31 15:47:43 HP255G8R5 systemd[1]: Make TPM PCR Policy skipped, unmet condition check ConditionSecurity=measured-uki
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Disk Repartitioning Service Socket.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Simple Block Device Backed Storage Provider.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on Simple File System Backed Storage Provider.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on udev Control Socket.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on udev Varlink Socket.
lug 31 15:47:43 HP255G8R5 systemd[1]: Listening on User Database Manager Socket.
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounting Huge Pages File System...
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounting POSIX Message Queue File System...
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounting Kernel Debug File System...
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounting Kernel Trace File System...
lug 31 15:47:43 HP255G8R5 systemd[1]: Starting Create List of Static Device Nodes...
lug 31 15:47:43 HP255G8R5 systemd[1]: Starting Monitoring of LVM2 mirrors, snapshots etc. using dmeventd or progress polling...
lug 31 15:47:43 HP255G8R5 systemd[1]: Load Kernel Module configfs skipped, unmet condition check ConditionKernelModuleLoaded=!configfs
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounting Kernel Configuration File System...
lug 31 15:47:43 HP255G8R5 systemd[1]: Load Kernel Module drm skipped, unmet condition check ConditionKernelModuleLoaded=!drm
lug 31 15:47:43 HP255G8R5 systemd[1]: Load Kernel Module fuse skipped, unmet condition check ConditionKernelModuleLoaded=!fuse
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounting FUSE Control File System...
lug 31 15:47:43 HP255G8R5 systemd[1]: Clear Stale Hibernate Storage Info skipped, unmet condition check ConditionPathExists=/sys/firmware/efi/efivars/HibernateLocation-8cf2644b-4b0b-428f-9387-6d876050dc67
lug 31 15:47:43 HP255G8R5 systemd[1]: Starting Journal Service...
lug 31 15:47:43 HP255G8R5 systemd[1]: Starting Load Kernel Modules...
lug 31 15:47:43 HP255G8R5 systemd[1]: TPM PCR Machine ID Measurement skipped, unmet condition check ConditionSecurity=measured-os
lug 31 15:47:43 HP255G8R5 systemd[1]: TPM PCR OS Separator skipped, unmet condition check ConditionSecurity=measured-os
lug 31 15:47:43 HP255G8R5 systemd[1]: Starting Remount Root and Kernel File Systems...
lug 31 15:47:43 HP255G8R5 systemd[1]: Early TPM SRK Setup skipped, unmet condition check ConditionSecurity=measured-os
lug 31 15:47:43 HP255G8R5 systemd[1]: TPM PCR NvPCR Initialization Separator skipped, unmet condition check ConditionPathExists=/etc/initrd-release
lug 31 15:47:43 HP255G8R5 systemd[1]: Reached target Local Encrypted Volumes.
lug 31 15:47:43 HP255G8R5 systemd[1]: TPM NvPCR Product ID Measurement skipped, unmet condition check ConditionSecurity=measured-os
lug 31 15:47:43 HP255G8R5 systemd[1]: Starting Load udev Rules from Credentials...
lug 31 15:47:43 HP255G8R5 systemd[1]: Starting Coldplug All udev Devices...
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounted Huge Pages File System.
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounted POSIX Message Queue File System.
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounted Kernel Debug File System.
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounted Kernel Trace File System.
lug 31 15:47:43 HP255G8R5 systemd[1]: Finished Create List of Static Device Nodes.
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounted Kernel Configuration File System.
lug 31 15:47:43 HP255G8R5 systemd[1]: Mounted FUSE Control File System.
lug 31 15:47:43 HP255G8R5 systemd[1]: Starting Create Static Device Nodes in /dev gracefully...
lug 31 15:47:43 HP255G8R5 systemd-journald[322]: Collecting audit messages is disabled.
lug 31 15:47:43 HP255G8R5 systemd[1]: Finished Load udev Rules from Credentials.
lug 31 15:47:43 HP255G8R5 kernel: i2c_dev: i2c /dev entries driver
lug 31 15:47:43 HP255G8R5 systemd[1]: Finished Load Kernel Modules.
lug 31 15:47:43 HP255G8R5 systemd[1]: Starting Apply Kernel Variables...
lug 31 15:47:43 HP255G8R5 systemd-journald[322]: Journal started
lug 31 15:47:43 HP255G8R5 systemd-journald[322]: Runtime Journal (/run/log/journal/49efa81ad77843b4b385e77f095ee6ba) is 8M, max 305.7M, 297.7M free.
lug 31 15:47:43 HP255G8R5 systemd[1]: Queued start job for default target Graphical Interface.
lug 31 15:47:43 HP255G8R5 systemd[1]: systemd-journald.service: Deactivated successfully.
[-- Attachment #14: kernel-processor-power.txt --]
[-- Type: text/plain, Size: 41182 bytes --]
Message : Processor 11 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32974
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 10 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32973
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 9 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32972
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 8 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32971
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 7 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32970
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 6 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32969
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 5 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32968
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 4 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32967
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 3 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32966
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 2 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32965
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 1 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32964
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
Message : Processor 0 in group 0 exposes the following power management capabilities:
Idle state type: ACPI Idle (LPI) States (3 state(s))
Performance state type: ACPI Collaborative Processor Performance Control
Nominal Frequency (MHz): 2100
Maximum performance percentage: 193
Minimum performance percentage: 53
Minimum throttle percentage: 19
Id : 55
Version : 0
Qualifiers :
Level : 4
Task : 47
Opcode : 0
Keywords : -9223372036854775808
RecordId : 32963
ProviderName : Microsoft-Windows-Kernel-Processor-Power
ProviderId : 0f67e49f-fe51-4e9f-b490-6f2948cc6027
LogName : System
ProcessId : 4
ThreadId : 220
MachineName : HP-255-G8-R5
UserId : S-1-5-18
TimeCreated : 7/30/2026 9:42:09 PM
ActivityId :
RelatedActivityId :
ContainerLog : System
MatchedQueryIds : {0}
Bookmark : System.Diagnostics.Eventing.Reader.EventBookmark
LevelDisplayName : Information
OpcodeDisplayName : Info
TaskDisplayName :
KeywordsDisplayNames : {}
Properties : {System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty,
System.Diagnostics.Eventing.Reader.EventProperty...}
[-- Attachment #15: lscpu.txt --]
[-- Type: text/plain, Size: 3672 bytes --]
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Address sizes: 48 bits physical, 48 bits virtual
Byte Order: Little Endian
CPU(s): 12
On-line CPU(s) list: 0-11
Vendor ID: AuthenticAMD
Model name: AMD Ryzen 5 5500U with Radeon Graphics
CPU family: 23
Model: 104
Thread(s) per core: 2
Core(s) per socket: 6
Socket(s): 1
Stepping: 1
Microcode version: 0x8608109
Frequency boost: enabled
CPU(s) scaling MHz: 44%
CPU max MHz: 4056,4451
CPU min MHz: 1400,0000
BogoMIPS: 4192,08
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl xtopology nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip rdpid overflow_recov succor smca
Virtualization: AMD-V
L1d cache: 192 KiB (6 instances)
L1i cache: 192 KiB (6 instances)
L2 cache: 3 MiB (6 instances)
L3 cache: 8 MiB (2 instances)
NUMA node(s): 1
NUMA node0 CPU(s): 0-11
Vulnerability Gather data sampling: Not affected
Vulnerability Ghostwrite: Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit: Not affected
Vulnerability L1tf: Not affected
Vulnerability Mds: Not affected
Vulnerability Meltdown: Not affected
Vulnerability Mmio stale data: Not affected
Vulnerability Old microcode: Not affected
Vulnerability Reg file data sampling: Not affected
Vulnerability Retbleed: Mitigation; untrained return thunk; SMT enabled with STIBP protection
Vulnerability Spec rstack overflow: Mitigation; Safe RET
Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2: Mitigation; Retpolines; IBPB conditional; STIBP always-on; RSB filling; PBRSB-eIBRS Not affected; BHI Not affected
Vulnerability Srbds: Not affected
Vulnerability Tsa: Not affected
Vulnerability Tsx async abort: Not affected
Vulnerability Vmscape: Mitigation; IBPB before exit to userspace
[-- Attachment #16: powercfg-query.txt --]
[-- Type: text/plain, Size: 1998 bytes --]
Power Scheme GUID: 381b4222-f694-41f0-9685-ff5bb260df2e (Balanced)
GUID Alias: SCHEME_BALANCED
Subgroup GUID: 54533251-82be-4824-96c1-47b60b740d00 (Processor power management)
GUID Alias: SUB_PROCESSOR
Power Setting GUID: 893dee8e-2bef-41e0-89c6-b55d0929964c (Minimum processor state)
GUID Alias: PROCTHROTTLEMIN
Minimum Possible Setting: 0x00000000
Maximum Possible Setting: 0x00000064
Possible Settings increment: 0x00000001
Possible Settings units: %
Current AC Power Setting Index: 0x00000050
Current DC Power Setting Index: 0x00000005
Power Setting GUID: bc5038f7-23e0-4960-96da-33abaf5935ec (Maximum processor state)
GUID Alias: PROCTHROTTLEMAX
Minimum Possible Setting: 0x00000000
Maximum Possible Setting: 0x00000064
Possible Settings increment: 0x00000001
Possible Settings units: %
Current AC Power Setting Index: 0x00000064
Current DC Power Setting Index: 0x00000064
[-- Attachment #17: reproduction.txt --]
[-- Type: text/plain, Size: 464 bytes --]
Hardware:
HP 255 G8 Notebook PC
CPU:
Ryzen 5 5500U
BIOS:
F.45
Kernel:
7.1.5-arch1-1
Boot parameters:
amd_pstate=active
amd_pstate.shared_mem=1
Expected:
amd_pstate initializes successfully.
Actual:
"The CPPC feature is supported but currently disabled by the BIOS."
failed to set energy perf value (-524)
failed to register with return -19
Windows 11 on the same machine reports:
"ACPI Collaborative Processor Performance Control"
and CPPC works correctly.
[-- Attachment #18: system-information.txt --]
[-- Type: text/plain, Size: 715 bytes --]
$ uname -a
Linux HP255G8R5 7.1.5-arch1-2 #1 SMP PREEMPT_DYNAMIC Tue, 28 Jul 2026 13:49:51 +0000 x86_64 GNU/Linux
$ cat /etc/os-release
NAME="Arch Linux"
PRETTY_NAME="Arch Linux"
ID=arch
BUILD_ID=rolling
ANSI_COLOR="38;2;23;147;209"
HOME_URL="https://archlinux.org/"
DOCUMENTATION_URL="https://wiki.archlinux.org/"
SUPPORT_URL="https://bbs.archlinux.org/"
BUG_REPORT_URL="https://gitlab.archlinux.org/groups/archlinux/-/issues"
PRIVACY_POLICY_URL="https://terms.archlinux.org/docs/privacy-policy/"
LOGO=archlinux-logo
$ sudo dmidecode -s system-manufacturer
HP
$ sudo dmidecode -s system-product-name
HP 255 G8 Notebook PC
$ sudo dmidecode -s bios-version
F.45
$ sudo dmidecode -s bios-release-date
12/09/2025
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