From: Wenpeng Liang <liangwenpeng@huawei.com>
To: <jgg@nvidia.com>, <leon@kernel.org>
Cc: <linux-rdma@vger.kernel.org>, <linuxarm@huawei.com>,
<liangwenpeng@huawei.com>
Subject: [PATCH v3 for-next 4/5] RDMA/hns: Refactor the abnormal interrupt handler function
Date: Thu, 14 Jul 2022 21:43:52 +0800 [thread overview]
Message-ID: <20220714134353.16700-5-liangwenpeng@huawei.com> (raw)
In-Reply-To: <20220714134353.16700-1-liangwenpeng@huawei.com>
From: Haoyue Xu <xuhaoyue1@hisilicon.com>
Use a single function to handle the same kind of abnormal interrupts.
Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com>
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 35 ++++++++++++++--------
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 35bf58fcaeb3..782f09a7f8af 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -5982,24 +5982,19 @@ static irqreturn_t hns_roce_v2_msix_interrupt_eq(int irq, void *eq_ptr)
return IRQ_RETVAL(int_work);
}
-static irqreturn_t hns_roce_v2_msix_interrupt_abn(int irq, void *dev_id)
+static irqreturn_t abnormal_interrupt_basic(struct hns_roce_dev *hr_dev,
+ u32 int_st)
{
- struct hns_roce_dev *hr_dev = dev_id;
- struct device *dev = hr_dev->dev;
+ struct pci_dev *pdev = hr_dev->pci_dev;
+ struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
+ const struct hnae3_ae_ops *ops = ae_dev->ops;
irqreturn_t int_work = IRQ_NONE;
- u32 int_st;
u32 int_en;
- /* Abnormal interrupt */
- int_st = roce_read(hr_dev, ROCEE_VF_ABN_INT_ST_REG);
int_en = roce_read(hr_dev, ROCEE_VF_ABN_INT_EN_REG);
if (int_st & BIT(HNS_ROCE_V2_VF_INT_ST_AEQ_OVERFLOW_S)) {
- struct pci_dev *pdev = hr_dev->pci_dev;
- struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
- const struct hnae3_ae_ops *ops = ae_dev->ops;
-
- dev_err(dev, "AEQ overflow!\n");
+ dev_err(hr_dev->dev, "AEQ overflow!\n");
roce_write(hr_dev, ROCEE_VF_ABN_INT_ST_REG,
1 << HNS_ROCE_V2_VF_INT_ST_AEQ_OVERFLOW_S);
@@ -6016,12 +6011,28 @@ static irqreturn_t hns_roce_v2_msix_interrupt_abn(int irq, void *dev_id)
int_work = IRQ_HANDLED;
} else {
- dev_err(dev, "There is no abnormal irq found!\n");
+ dev_err(hr_dev->dev, "there is no basic abn irq found.\n");
}
return IRQ_RETVAL(int_work);
}
+static irqreturn_t hns_roce_v2_msix_interrupt_abn(int irq, void *dev_id)
+{
+ struct hns_roce_dev *hr_dev = dev_id;
+ irqreturn_t int_work = IRQ_NONE;
+ u32 int_st;
+
+ int_st = roce_read(hr_dev, ROCEE_VF_ABN_INT_ST_REG);
+
+ if (int_st)
+ int_work = abnormal_interrupt_basic(hr_dev, int_st);
+ else
+ dev_err(hr_dev->dev, "there is no abnormal irq found.\n");
+
+ return IRQ_RETVAL(int_work);
+}
+
static void hns_roce_v2_int_mask_enable(struct hns_roce_dev *hr_dev,
int eq_num, u32 enable_flag)
{
--
2.33.0
next prev parent reply other threads:[~2022-07-14 13:45 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-14 13:43 [PATCH v3 for-next 0/5] RDMA/hns: Supports recovery of on-chip RAM 1bit ECC errors Wenpeng Liang
2022-07-14 13:43 ` [PATCH v3 for-next 1/5] RDMA/hns: Remove unused abnormal interrupt of type RAS Wenpeng Liang
2022-07-14 13:43 ` [PATCH v3 for-next 2/5] RDMA/hns: Fix the wrong type of return value of the interrupt handler Wenpeng Liang
2022-07-14 13:43 ` [PATCH v3 for-next 3/5] RDMA/hns: Fix incorrect clearing of interrupt status register Wenpeng Liang
2022-07-14 13:43 ` Wenpeng Liang [this message]
2022-07-14 13:43 ` [PATCH v3 for-next 5/5] RDMA/hns: Recover 1bit-ECC error of RAM on chip Wenpeng Liang
2022-07-18 11:17 ` [PATCH v3 for-next 0/5] RDMA/hns: Supports recovery of on-chip RAM 1bit ECC errors Leon Romanovsky
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