[PATCH v3 00/09] arm64: dts: r8a7795: IPMMU upstream integration V3

[PATCH v3 00/09] arm64: dts: r8a7795: IPMMU upstream integration V3

[Magnus Damm]

arm64: dts: r8a7795: IPMMU upstream integration V3

[PATCH v3 01/09] arm64: dts: r8a7795: Add IPMMU device nodes
[PATCH v3 02/09] arm64: dts: r8a7795: Tie Audio/SYS-DMAC to IPMMU-DS0/1 and MP1
[PATCH v3 03/09] arm64: dts: r8a7795: Point DU/VSPD via FCPVD to IPMMU-VI
[PATCH v3 04/09] arm64: dts: r8a7795: Point FDP1 via FCPF to IPMMU-VP
[PATCH v3 05/09] arm64: dts: r8a7795: Point VSPBC/VSPBD via FCPVB to IPMMU-VP
[PATCH v3 06/09] arm64: dts: r8a7795: Point VSPI via FCPVI to IPMMU-VP
[PATCH v3 07/09] arm64: dts: r8a7795: Connect Ethernet-AVB to IPMMU-DS0
[PATCH v3 08/09] arm64: dts: r8a7795: Connect SATA to IPMMU-HC
[PATCH v3 09/09] arm64: dts: r8a7795: Enable IPMMU-VI, VP, MP1, DS0, DS1 and MM

This series adds DT nodes for IPMMU instances on r8a7795 together with
connections to various r8a7795 on-chip devices such as Audio-DMAC, SYS-DMAC,
Ethernet-AVB, SATA and a bunch of multimedia devices that make use of FCP.

With these patches applied a white list enabled IPMMU driver may be used
to check silicon revision and then enable IPMMU in the known working cases.

The recommended IPMMU driver patch stack consists of the following series:
 [PATCH v7 00/07] iommu/ipmmu-vmsa: IPMMU multi-arch update V7
 [PATCH v3 00/09] iommu/ipmmu-vmsa: r8a7795 support V3
 [PATCH v3 0/3] iommu/ipmmu-vmsa: r8a7796 support V3

The final patch in the series enable IPMMU support for all IPMMU instances
on r8a7795 that are used by IPMMU devices listed above with one exception.
The exception is the SATA device connected to IPMMU-HC which still is disabled
pending IPMMU USB integration support. I expect IPMMU USB integration to be
handled as a second step once this series is agreed on.

The DT binding for r8a7795 has since long been included in mainline
and this series implements support following such format:

d4e42e7 iommu/ipmmu-vmsa: Add r8a7795 DT binding

Changes since V2:
 - Added the iommus property before power domains - thanks Geert!
 - Added reviewed-by to patch 2 and 3 from Laurent - thanks!
 - Re-added Ethernet and FCPVD patches (They were present in V1 but not V2)
 - Added remaining FCP devices such as FCPF, FCPVB and FCPVI
 - Added SATA device
 - Added final patch to enable various IPMMU devices in the DTS file

Since the DT binding has been merged quite some time ago and the interface
seems stable enough I see no reason not to queue these up for upstream merge.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Developed on top of renesas-devel-20170313-v4.11-rc2

 No special run time or compile time dependencies.

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |  173 ++++++++++++++++++++++++++++--
 1 file changed, 167 insertions(+), 6 deletions(-)

[PATCH v3 01/09] arm64: dts: r8a7795: Add IPMMU device nodes

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add r8a7795 IPMMU nodes and keep all disabled by default.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---

 Changes from V2:
 - Added Reviewed-by from Laurent - thanks!

 Changes from V1:
 - None

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |  113 ++++++++++++++++++++++++++++++
 1 file changed, 113 insertions(+)

--- 0001/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi	2017-03-20 15:34:20.120607110 +0900
@@ -407,6 +407,119 @@
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 		};
 
+		ipmmu_vi: mmu@febd0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfebd0000 0 0x1000>; /* IPMMU-VI */
+			renesas,ipmmu-main = <&ipmmu_mm 11>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_vp: mmu@fe990000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfe990000 0 0x1000>; /* IPMMU-VP */
+			renesas,ipmmu-main = <&ipmmu_mm 12>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_vc0: mmu@fe6b0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfe6b0000 0 0x1000>; /* IPMMU-VC0 */
+			renesas,ipmmu-main = <&ipmmu_mm 9>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_vc1: mmu@fe6f0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfe6f0000 0 0x1000>; /* IPMMU-VC1 */
+			renesas,ipmmu-main = <&ipmmu_mm 10>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_pv0: mmu@fd800000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfd800000 0 0x1000>; /* IPMMU-PV0 */
+			renesas,ipmmu-main = <&ipmmu_mm 6>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_ir: mmu@ff8b0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xff8b0000 0 0x1000>; /* IPMMU-IR */
+			renesas,ipmmu-main = <&ipmmu_mm 3>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_hc: mmu@e6570000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xe6570000 0 0x1000>; /* IPMMU-HC */
+			renesas,ipmmu-main = <&ipmmu_mm 2>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_rt: mmu@ffc80000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xffc80000 0 0x1000>; /* IPMMU-RT */
+			renesas,ipmmu-main = <&ipmmu_mm 7>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_mp0: mmu@ec670000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xec670000 0 0x1000>; /* IPMMU-MP0 */
+			renesas,ipmmu-main = <&ipmmu_mm 4>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_mp1: mmu@ec680000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xec680000 0 0x1000>; /* IPMMU-MP1 */
+			renesas,ipmmu-main = <&ipmmu_mm 5>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_sy: mmu@e7730000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xe7730000 0 0x1000>; /* IPMMU-SY */
+			renesas,ipmmu-main = <&ipmmu_mm 8>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_ds0: mmu@e6740000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xe6740000 0 0x1000>; /* IPMMU-DS0 */
+			renesas,ipmmu-main = <&ipmmu_mm 0>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_ds1: mmu@e7740000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xe7740000 0 0x1000>; /* IPMMU-DS1 */
+			renesas,ipmmu-main = <&ipmmu_mm 1>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_mm: mmu@e67b0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xe67b0000 0 0x1000>; /* IPMMU-MM */
+			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
 		dmac0: dma-controller@e6700000 {
 			compatible = "renesas,dmac-r8a7795",
 				     "renesas,rcar-dmac";

[PATCH v3 02/09] arm64: dts: r8a7795: Tie Audio/SYS-DMAC to IPMMU-DS0/1 and MP1

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Hook up r8a7795 DMAC nodes to the IPMMUs. In particular Audio-DMAC0
and Audio-DMAC1 get connected to IPMMU-MP1, while SYS-DMAC0 gets tied
to IPMMU-DS0 and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---

 Changes from V2:
 - Updated description with more detail about SYS-DMAC and Audio-DMAC
 - Updated title/subject to include Audio-DMAC
 - Added Reviewed-by from Laurent - thanks!

 Changes from V1:
 - None

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |   40 ++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

--- 0002/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi	2017-03-20 15:45:51.330607110 +0900
@@ -548,6 +548,14 @@
 					"ch12", "ch13", "ch14", "ch15";
 			clocks = <&cpg CPG_MOD 219>;
 			clock-names = "fck";
+			iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
+			       <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
+			       <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
+			       <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
+			       <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
+			       <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
+			       <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
+			       <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			#dma-cells = <1>;
 			dma-channels = <16>;
@@ -581,6 +589,14 @@
 					"ch12", "ch13", "ch14", "ch15";
 			clocks = <&cpg CPG_MOD 218>;
 			clock-names = "fck";
+			iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
+			       <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
+			       <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
+			       <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
+			       <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
+			       <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
+			       <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
+			       <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			#dma-cells = <1>;
 			dma-channels = <16>;
@@ -614,6 +630,14 @@
 					"ch12", "ch13", "ch14", "ch15";
 			clocks = <&cpg CPG_MOD 217>;
 			clock-names = "fck";
+			iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
+			       <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
+			       <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
+			       <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
+			       <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
+			       <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
+			       <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
+			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			#dma-cells = <1>;
 			dma-channels = <16>;
@@ -647,6 +671,14 @@
 					"ch12", "ch13", "ch14", "ch15";
 			clocks = <&cpg CPG_MOD 502>;
 			clock-names = "fck";
+			iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
+			       <&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
+			       <&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
+			       <&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
+			       <&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
+			       <&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
+			       <&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
+			       <&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			#dma-cells = <1>;
 			dma-channels = <16>;
@@ -680,6 +712,14 @@
 					"ch12", "ch13", "ch14", "ch15";
 			clocks = <&cpg CPG_MOD 501>;
 			clock-names = "fck";
+			iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
+			       <&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
+			       <&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
+			       <&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
+			       <&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
+			       <&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
+			       <&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
+			       <&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			#dma-cells = <1>;
 			dma-channels = <16>;

[PATCH v3 03/09] arm64: dts: r8a7795: Point DU/VSPD via FCPVD to IPMMU-VI

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Hook up the FCPVD devices to allow use of the VSP and DU
together with IPMMU-VI.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - New patch

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |    4 ++++
 1 file changed, 4 insertions(+)

--- 0004/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi	2017-03-20 15:57:39.990607110 +0900
@@ -1738,6 +1738,7 @@
 			compatible = "renesas,fcpv";
 			reg = <0 0xfea27000 0 0x200>;
 			clocks = <&cpg CPG_MOD 603>;
+			iommus = <&ipmmu_vi 8>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 		};
 
@@ -1755,6 +1756,7 @@
 			compatible = "renesas,fcpv";
 			reg = <0 0xfea2f000 0 0x200>;
 			clocks = <&cpg CPG_MOD 602>;
+			iommus = <&ipmmu_vi 9>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 		};
 
@@ -1772,6 +1774,7 @@
 			compatible = "renesas,fcpv";
 			reg = <0 0xfea37000 0 0x200>;
 			clocks = <&cpg CPG_MOD 601>;
+			iommus = <&ipmmu_vi 10>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 		};
 
@@ -1789,6 +1792,7 @@
 			compatible = "renesas,fcpv";
 			reg = <0 0xfea3f000 0 0x200>;
 			clocks = <&cpg CPG_MOD 600>;
+			iommus = <&ipmmu_vi 11>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 		};
 

[PATCH v3 04/09] arm64: dts: r8a7795: Point FDP1 via FCPF to IPMMU-VP

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Hook up the FCPF devices to allow use of FDP1 with IPMMU-VP.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - New patch

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |    3 +++
 1 file changed, 3 insertions(+)

--- 0007/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi	2017-03-20 16:19:28.230607110 +0900
@@ -1639,6 +1639,7 @@
 			compatible = "renesas,fcpf";
 			reg = <0 0xfe950000 0 0x200>;
 			clocks = <&cpg CPG_MOD 615>;
+			iommus = <&ipmmu_vp 0>;
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
@@ -1646,6 +1647,7 @@
 			compatible = "renesas,fcpf";
 			reg = <0 0xfe951000 0 0x200>;
 			clocks = <&cpg CPG_MOD 614>;
+			iommus = <&ipmmu_vp 1>;
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
@@ -1653,6 +1655,7 @@
 			compatible = "renesas,fcpf";
 			reg = <0 0xfe952000 0 0x200>;
 			clocks = <&cpg CPG_MOD 613>;
+			iommus = <&ipmmu_vp 2>;
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 

[PATCH v3 05/09] arm64: dts: r8a7795: Point VSPBC/VSPBD via FCPVB to IPMMU-VP

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Hook up the FCPVB devices to allow use of VSPBC/VSPBD with IPMMU-VP.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - New patch

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |    2 ++
 1 file changed, 2 insertions(+)

--- 0008/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi	2017-03-20 16:21:50.950607110 +0900
@@ -1632,6 +1632,7 @@
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe92f000 0 0x200>;
 			clocks = <&cpg CPG_MOD 606>;
+			iommus = <&ipmmu_vp 7>;
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
@@ -1673,6 +1674,7 @@
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe96f000 0 0x200>;
 			clocks = <&cpg CPG_MOD 607>;
+			iommus = <&ipmmu_vp 5>;
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 

[PATCH v3 06/09] arm64: dts: r8a7795: Point VSPI via FCPVI to IPMMU-VP

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Hook up the FCPVI devices to allow use of VSPI with IPMMU-VP.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - New patch

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |    3 +++
 1 file changed, 3 insertions(+)

--- 0010/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi	2017-03-20 16:26:53.600607110 +0900
@@ -1692,6 +1692,7 @@
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe9af000 0 0x200>;
 			clocks = <&cpg CPG_MOD 611>;
+			iommus = <&ipmmu_vp 8>;
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
@@ -1709,6 +1710,7 @@
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe9bf000 0 0x200>;
 			clocks = <&cpg CPG_MOD 610>;
+			iommus = <&ipmmu_vp 9>;
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
@@ -1726,6 +1728,7 @@
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe9cf000 0 0x200>;
 			clocks = <&cpg CPG_MOD 609>;
+			iommus = <&ipmmu_vp 10>;
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 

[PATCH v3 07/09] arm64: dts: r8a7795: Connect Ethernet-AVB to IPMMU-DS0

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add IPMMU-DS0 to the Ethernet-AVB device node.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - New patch

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |    1 +
 1 file changed, 1 insertion(+)

--- 0012/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi	2017-03-20 16:30:42.620607110 +0900
@@ -762,6 +762,7 @@
 					  "ch20", "ch21", "ch22", "ch23",
 					  "ch24";
 			clocks = <&cpg CPG_MOD 812>;
+			iommus = <&ipmmu_ds0 16>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			phy-mode = "rgmii-txid";
 			#address-cells = <1>;

[PATCH v3 08/09] arm64: dts: r8a7795: Connect SATA to IPMMU-HC

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add IPMMU-HC to the SATA device node.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - New patch

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |    1 +
 1 file changed, 1 insertion(+)

--- 0014/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi	2017-03-20 16:31:38.830607110 +0900
@@ -1366,6 +1366,7 @@
 			reg = <0 0xee300000 0 0x1fff>;
 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 815>;
+			iommus = <&ipmmu_hc 2>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			status = "disabled";
 		};

[PATCH v3 09/09] arm64: dts: r8a7795: Enable IPMMU-VI, VP, MP1, DS0, DS1 and MM

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Enable the r8a7795 device nodes for IPMMU-VI, IPMMU-VP, IPMMU-MP1,
IPMMU-DS0, IPMMU-DS1 and the shared IPMMU-MM device.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - New patch

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |    6 ------
 1 file changed, 6 deletions(-)

--- 0016/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi	2017-03-20 16:41:34.980607110 +0900
@@ -412,7 +412,6 @@
 			reg = <0 0xfebd0000 0 0x1000>; /* IPMMU-VI */
 			renesas,ipmmu-main = <&ipmmu_mm 11>;
 			#iommu-cells = <1>;
-			status = "disabled";
 		};
 
 		ipmmu_vp: mmu@fe990000 {
@@ -420,7 +419,6 @@
 			reg = <0 0xfe990000 0 0x1000>; /* IPMMU-VP */
 			renesas,ipmmu-main = <&ipmmu_mm 12>;
 			#iommu-cells = <1>;
-			status = "disabled";
 		};
 
 		ipmmu_vc0: mmu@fe6b0000 {
@@ -484,7 +482,6 @@
 			reg = <0 0xec680000 0 0x1000>; /* IPMMU-MP1 */
 			renesas,ipmmu-main = <&ipmmu_mm 5>;
 			#iommu-cells = <1>;
-			status = "disabled";
 		};
 
 		ipmmu_sy: mmu@e7730000 {
@@ -500,7 +497,6 @@
 			reg = <0 0xe6740000 0 0x1000>; /* IPMMU-DS0 */
 			renesas,ipmmu-main = <&ipmmu_mm 0>;
 			#iommu-cells = <1>;
-			status = "disabled";
 		};
 
 		ipmmu_ds1: mmu@e7740000 {
@@ -508,7 +504,6 @@
 			reg = <0 0xe7740000 0 0x1000>; /* IPMMU-DS1 */
 			renesas,ipmmu-main = <&ipmmu_mm 1>;
 			#iommu-cells = <1>;
-			status = "disabled";
 		};
 
 		ipmmu_mm: mmu@e67b0000 {
@@ -517,7 +512,6 @@
 			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 			#iommu-cells = <1>;
-			status = "disabled";
 		};
 
 		dmac0: dma-controller@e6700000 {

Re: [PATCH v3 00/09] arm64: dts: r8a7795: IPMMU upstream integration V3

[Geert Uytterhoeven]

Hi Magnus,

On Mon, Mar 20, 2017 at 9:35 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> arm64: dts: r8a7795: IPMMU upstream integration V3
>
> [PATCH v3 01/09] arm64: dts: r8a7795: Add IPMMU device nodes
> [PATCH v3 02/09] arm64: dts: r8a7795: Tie Audio/SYS-DMAC to IPMMU-DS0/1 and MP1
> [PATCH v3 03/09] arm64: dts: r8a7795: Point DU/VSPD via FCPVD to IPMMU-VI
> [PATCH v3 04/09] arm64: dts: r8a7795: Point FDP1 via FCPF to IPMMU-VP
> [PATCH v3 05/09] arm64: dts: r8a7795: Point VSPBC/VSPBD via FCPVB to IPMMU-VP
> [PATCH v3 06/09] arm64: dts: r8a7795: Point VSPI via FCPVI to IPMMU-VP
> [PATCH v3 07/09] arm64: dts: r8a7795: Connect Ethernet-AVB to IPMMU-DS0
> [PATCH v3 08/09] arm64: dts: r8a7795: Connect SATA to IPMMU-HC
> [PATCH v3 09/09] arm64: dts: r8a7795: Enable IPMMU-VI, VP, MP1, DS0, DS1 and MM
>
> This series adds DT nodes for IPMMU instances on r8a7795 together with
> connections to various r8a7795 on-chip devices such as Audio-DMAC, SYS-DMAC,
> Ethernet-AVB, SATA and a bunch of multimedia devices that make use of FCP.
>
> With these patches applied a white list enabled IPMMU driver may be used
> to check silicon revision and then enable IPMMU in the known working cases.
>
> The recommended IPMMU driver patch stack consists of the following series:
>  [PATCH v7 00/07] iommu/ipmmu-vmsa: IPMMU multi-arch update V7
>  [PATCH v3 00/09] iommu/ipmmu-vmsa: r8a7795 support V3
>  [PATCH v3 0/3] iommu/ipmmu-vmsa: r8a7796 support V3
>
> The final patch in the series enable IPMMU support for all IPMMU instances
> on r8a7795 that are used by IPMMU devices listed above with one exception.
> The exception is the SATA device connected to IPMMU-HC which still is disabled
> pending IPMMU USB integration support. I expect IPMMU USB integration to be
> handled as a second step once this series is agreed on.
>
> The DT binding for r8a7795 has since long been included in mainline
> and this series implements support following such format:

I dropped this series from today's renesas-drivers because of two reasons:
  1. IPMMU is busted in v4.12-rc1,
  2. The addition of support for R-Car H3 ES2.0 complicated the addition of
      IPMMU devices nodes and links from their slaves.

This also means I couldn't apply Morimoto-san's "[PATCH v2 --/--] arm64:
renesas: r8a7796: add IPMMU support for AUDIO DMAC", as it depends
on your series.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3 00/09] arm64: dts: r8a7795: IPMMU upstream integration V3

[Simon Horman]

On Mon, Mar 20, 2017 at 05:35:18PM +0900, Magnus Damm wrote:
> arm64: dts: r8a7795: IPMMU upstream integration V3
> 
> [PATCH v3 01/09] arm64: dts: r8a7795: Add IPMMU device nodes
> [PATCH v3 02/09] arm64: dts: r8a7795: Tie Audio/SYS-DMAC to IPMMU-DS0/1 and MP1
> [PATCH v3 03/09] arm64: dts: r8a7795: Point DU/VSPD via FCPVD to IPMMU-VI
> [PATCH v3 04/09] arm64: dts: r8a7795: Point FDP1 via FCPF to IPMMU-VP
> [PATCH v3 05/09] arm64: dts: r8a7795: Point VSPBC/VSPBD via FCPVB to IPMMU-VP
> [PATCH v3 06/09] arm64: dts: r8a7795: Point VSPI via FCPVI to IPMMU-VP
> [PATCH v3 07/09] arm64: dts: r8a7795: Connect Ethernet-AVB to IPMMU-DS0
> [PATCH v3 08/09] arm64: dts: r8a7795: Connect SATA to IPMMU-HC
> [PATCH v3 09/09] arm64: dts: r8a7795: Enable IPMMU-VI, VP, MP1, DS0, DS1 and MM
> 
> This series adds DT nodes for IPMMU instances on r8a7795 together with
> connections to various r8a7795 on-chip devices such as Audio-DMAC, SYS-DMAC,
> Ethernet-AVB, SATA and a bunch of multimedia devices that make use of FCP.
> 
> With these patches applied a white list enabled IPMMU driver may be used
> to check silicon revision and then enable IPMMU in the known working cases.
> 
> The recommended IPMMU driver patch stack consists of the following series:
>  [PATCH v7 00/07] iommu/ipmmu-vmsa: IPMMU multi-arch update V7
>  [PATCH v3 00/09] iommu/ipmmu-vmsa: r8a7795 support V3
>  [PATCH v3 0/3] iommu/ipmmu-vmsa: r8a7796 support V3
> 
> The final patch in the series enable IPMMU support for all IPMMU instances
> on r8a7795 that are used by IPMMU devices listed above with one exception.
> The exception is the SATA device connected to IPMMU-HC which still is disabled
> pending IPMMU USB integration support. I expect IPMMU USB integration to be
> handled as a second step once this series is agreed on.
> 
> The DT binding for r8a7795 has since long been included in mainline
> and this series implements support following such format:
> 
> d4e42e7 iommu/ipmmu-vmsa: Add r8a7795 DT binding
> 
> Changes since V2:
>  - Added the iommus property before power domains - thanks Geert!
>  - Added reviewed-by to patch 2 and 3 from Laurent - thanks!
>  - Re-added Ethernet and FCPVD patches (They were present in V1 but not V2)
>  - Added remaining FCP devices such as FCPF, FCPVB and FCPVI
>  - Added SATA device
>  - Added final patch to enable various IPMMU devices in the DTS file
> 
> Since the DT binding has been merged quite some time ago and the interface
> seems stable enough I see no reason not to queue these up for upstream merge.

Going through old patches I noticed that I seem to have missed this somehow.
I assume its still applicable but wants a rebase. If so could you do so?