* [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 @ 2016-04-27 4:06 ` Simon Horman 2016-04-27 4:06 ` [PATCH 1/4] arm64: dts: r8a7795: Add PCIe nodes Simon Horman ` (4 more replies) 0 siblings, 5 replies; 16+ messages in thread From: Simon Horman @ 2016-04-27 4:06 UTC (permalink / raw) To: arm Cc: linux-renesas-soc, Olof Johansson, Kevin Hilman, Arnd Bergmann, linux-arm-kernel, Magnus Damm, Simon Horman Hi Olof, Hi Kevin, Hi Arnd, Please consider these second round of Renesas ARM64 based SoC DT updates for v4.7. This pull request is based on the previous round of such requests, tagged as renesas-arm64-dt-for-v4.7, which I have already sent a pull-request for. The following changes since commit 81ae0ac31bb90baef10850fdfdc2a9f72f36aa6f: arm64: dts: r8a7795: Use USB3.0 fallback compatibility string (2016-03-28 08:52:47 +0900) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt2-for-v4.7 for you to fetch changes up to 9f33a8a9e1b7dbb0b91a58af958d1c301a6fab1a: arm64: dts: r8a7795: Don't disable referenced optional clocks (2016-04-27 11:48:34 +1000) ---------------------------------------------------------------- Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 * Don't disable referenced optional clocks in DT of r8a7795 SoC * Populate EXTALR in DT of salvator-x board * Enable PCIe in DT of salvator-x board ---------------------------------------------------------------- Geert Uytterhoeven (1): arm64: dts: r8a7795: Don't disable referenced optional clocks Phil Edworthy (2): arm64: dts: r8a7795: Add PCIe nodes arm64: dts: r8a7795: enable PCIe on Salvator-X Wolfram Sang (1): arm64: dts: salvator-x: populate EXTALR arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 17 +++++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 58 +++++++++++++++++++++- 2 files changed, 73 insertions(+), 2 deletions(-) ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 1/4] arm64: dts: r8a7795: Add PCIe nodes 2016-04-27 4:06 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Simon Horman @ 2016-04-27 4:06 ` Simon Horman 2016-04-27 4:06 ` [PATCH 2/4] arm64: dts: r8a7795: enable PCIe on Salvator-X Simon Horman ` (3 subsequent siblings) 4 siblings, 0 replies; 16+ messages in thread From: Simon Horman @ 2016-04-27 4:06 UTC (permalink / raw) To: linux-renesas-soc Cc: linux-arm-kernel, Magnus Damm, Phil Edworthy, Phil Edworthy, Simon Horman From: Phil Edworthy <Phil.Edworthy@renesas.com> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 57 ++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 868c10eaea48..11f9971a8543 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -131,6 +131,14 @@ status = "disabled"; }; + /* External PCIe clock - can be overridden by the board */ + pcie_bus_clk: pcie_bus { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + status = "disabled"; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -1156,5 +1164,54 @@ power-domains = <&cpg>; status = "disabled"; }; + pciec0: pcie@fe000000 { + compatible = "renesas,pcie-r8a7795"; + reg = <0 0xfe000000 0 0x80000>; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x00 0xff>; + device_type = "pci"; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + /* Map all possible DDR as inbound ranges */ + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; + clock-names = "pcie", "pcie_bus"; + power-domains = <&cpg>; + status = "disabled"; + }; + + pciec1: pcie@ee800000 { + compatible = "renesas,pcie-r8a7795"; + reg = <0 0xee800000 0 0x80000>; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x00 0xff>; + device_type = "pci"; + ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 + 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 + 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 + 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; + /* Map all possible DDR as inbound ranges */ + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; + clock-names = "pcie", "pcie_bus"; + power-domains = <&cpg>; + status = "disabled"; + }; }; }; -- 2.7.0.rc3.207.g0ac5344 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 2/4] arm64: dts: r8a7795: enable PCIe on Salvator-X 2016-04-27 4:06 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Simon Horman 2016-04-27 4:06 ` [PATCH 1/4] arm64: dts: r8a7795: Add PCIe nodes Simon Horman @ 2016-04-27 4:06 ` Simon Horman 2016-04-27 4:06 ` [PATCH 3/4] arm64: dts: salvator-x: populate EXTALR Simon Horman ` (2 subsequent siblings) 4 siblings, 0 replies; 16+ messages in thread From: Simon Horman @ 2016-04-27 4:06 UTC (permalink / raw) To: linux-renesas-soc Cc: linux-arm-kernel, Magnus Damm, Phil Edworthy, Phil Edworthy, Simon Horman From: Phil Edworthy <Phil.Edworthy@renesas.com> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts index b992b1a3d956..7c40ac8232f3 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts @@ -388,3 +388,15 @@ &ohci2 { status = "okay"; }; + +&pcie_bus_clk { + status = "okay"; +}; + +&pciec0 { + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; -- 2.7.0.rc3.207.g0ac5344 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 3/4] arm64: dts: salvator-x: populate EXTALR 2016-04-27 4:06 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Simon Horman 2016-04-27 4:06 ` [PATCH 1/4] arm64: dts: r8a7795: Add PCIe nodes Simon Horman 2016-04-27 4:06 ` [PATCH 2/4] arm64: dts: r8a7795: enable PCIe on Salvator-X Simon Horman @ 2016-04-27 4:06 ` Simon Horman 2016-04-27 4:06 ` [PATCH 4/4] arm64: dts: r8a7795: Don't disable referenced optional clocks Simon Horman 2016-04-28 14:14 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Arnd Bergmann 4 siblings, 0 replies; 16+ messages in thread From: Simon Horman @ 2016-04-27 4:06 UTC (permalink / raw) To: linux-renesas-soc Cc: linux-arm-kernel, Magnus Damm, Wolfram Sang, Simon Horman From: Wolfram Sang <wsa+renesas@sang-engineering.com> It can be used for the watchdog. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts index 7c40ac8232f3..78c02937697e 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts @@ -141,6 +141,10 @@ clock-frequency = <16666666>; }; +&extalr_clk { + clock-frequency = <32768>; +}; + &pfc { pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; -- 2.7.0.rc3.207.g0ac5344 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 4/4] arm64: dts: r8a7795: Don't disable referenced optional clocks 2016-04-27 4:06 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Simon Horman ` (2 preceding siblings ...) 2016-04-27 4:06 ` [PATCH 3/4] arm64: dts: salvator-x: populate EXTALR Simon Horman @ 2016-04-27 4:06 ` Simon Horman 2016-04-14 16:17 ` [PATCH v3 4/7] media: rcar-vin: pad-aware driver initialisation, " Ulrich Hecht, Simon Horman 2016-04-28 14:14 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Arnd Bergmann 4 siblings, 1 reply; 16+ messages in thread From: Simon Horman @ 2016-04-27 4:06 UTC (permalink / raw) To: linux-renesas-soc Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman From: Geert Uytterhoeven <geert+renesas@glider.be> clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Reported-by: Jürg Billeter <j@bitron.ch> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 1 + arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 +---- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts index 78c02937697e..8d8de245a845 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts @@ -394,6 +394,7 @@ }; &pcie_bus_clk { + clock-frequency = <100000000>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 11f9971a8543..7cb2d72e7378 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -120,7 +120,6 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; - status = "disabled"; }; /* External SCIF clock - to be overridden by boards that provide it */ @@ -128,15 +127,13 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; - status = "disabled"; }; /* External PCIe clock - can be overridden by the board */ pcie_bus_clk: pcie_bus { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <100000000>; - status = "disabled"; + clock-frequency = <0>; }; soc { -- 2.7.0.rc3.207.g0ac5344 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 4/7] media: rcar-vin: pad-aware driver initialisation, [PATCH 4/4] arm64: dts: r8a7795: Don't disable referenced optional clocks 2016-04-27 4:06 ` [PATCH 4/4] arm64: dts: r8a7795: Don't disable referenced optional clocks Simon Horman @ 2016-04-14 16:17 ` Ulrich Hecht, Simon Horman 0 siblings, 0 replies; 16+ messages in thread From: Ulrich Hecht, Simon Horman @ 2016-04-14 16:17 UTC (permalink / raw) To: hans.verkuil, niklas.soderlund, linux-renesas-soc Cc: linux-media, linux-renesas-soc, magnus.damm, laurent.pinchart, ian.molton, lars, william.towle, Ulrich Hecht, Rob Taylor, linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman Add detection of source pad number for drivers aware of the media controller API, so that rcar-vin can create device nodes to support modern drivers such as adv7604.c (for HDMI on Lager) and the converted adv7180.c (for composite) underneath. Building rcar_vin gains a dependency on CONFIG_MEDIA_CONTROLLER, in line with requirements for building the drivers associated with it. Signed-off-by: William Towle <william.towle@codethink.co.uk> Signed-off-by: Rob Taylor <rob.taylor@codethink.co.uk> [uli: adapted to rcar-vin rewrite] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> --- drivers/media/platform/rcar-vin/rcar-v4l2.c | 16 ++++++++++++++++ drivers/media/platform/rcar-vin/rcar-vin.h | 2 ++ 2 files changed, 18 insertions(+) diff --git a/drivers/media/platform/rcar-vin/rcar-v4l2.c b/drivers/media/platform/rcar-vin/rcar-v4l2.c index 43aec3c..d8d5f3a 100644 --- a/drivers/media/platform/rcar-vin/rcar-v4l2.c +++ b/drivers/media/platform/rcar-vin/rcar-v4l2.c @@ -659,6 +659,9 @@ int rvin_v4l2_probe(struct rvin_dev *vin) struct v4l2_mbus_framefmt *mf = &fmt.format; struct video_device *vdev = &vin->vdev; struct v4l2_subdev *sd = vin_to_sd(vin); +#if defined(CONFIG_MEDIA_CONTROLLER) + int pad_idx; +#endif int ret; v4l2_set_subdev_hostdata(sd, vin); @@ -701,6 +704,19 @@ int rvin_v4l2_probe(struct rvin_dev *vin) vdev->lock = &vin->lock; vdev->ctrl_handler = &vin->ctrl_handler; + vin->src_pad_idx = 0; +#if defined(CONFIG_MEDIA_CONTROLLER) + for (pad_idx = 0; pad_idx < sd->entity.num_pads; pad_idx++) + if (sd->entity.pads[pad_idx].flags + == MEDIA_PAD_FL_SOURCE) + break; + if (pad_idx >= sd->entity.num_pads) + return -EINVAL; + + vin->src_pad_idx = pad_idx; +#endif + fmt.pad = vin->src_pad_idx; + /* Try to improve our guess of a reasonable window format */ ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt); if (ret) { diff --git a/drivers/media/platform/rcar-vin/rcar-vin.h b/drivers/media/platform/rcar-vin/rcar-vin.h index 01c5086..959f5da 100644 --- a/drivers/media/platform/rcar-vin/rcar-vin.h +++ b/drivers/media/platform/rcar-vin/rcar-vin.h @@ -87,6 +87,7 @@ struct rvin_graph_entity { * * @vdev: V4L2 video device associated with VIN * @v4l2_dev: V4L2 device + * @src_pad_idx: source pad index for media controller drivers * @ctrl_handler: V4L2 control handler * @notifier: V4L2 asynchronous subdevs notifier * @entity: entity in the DT for subdevice @@ -118,6 +119,7 @@ struct rvin_dev { struct video_device vdev; struct v4l2_device v4l2_dev; + int src_pad_idx; struct v4l2_ctrl_handler ctrl_handler; struct v4l2_async_notifier notifier; struct rvin_graph_entity entity; -- 2.7.4 From: Geert Uytterhoeven <geert+renesas@glider.be> clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Reported-by: Jürg Billeter <j@bitron.ch> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 1 + arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 +---- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts index 78c02937697e..8d8de245a845 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts @@ -394,6 +394,7 @@ }; &pcie_bus_clk { + clock-frequency = <100000000>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 11f9971a8543..7cb2d72e7378 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -120,7 +120,6 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; - status = "disabled"; }; /* External SCIF clock - to be overridden by boards that provide it */ @@ -128,15 +127,13 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; - status = "disabled"; }; /* External PCIe clock - can be overridden by the board */ pcie_bus_clk: pcie_bus { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <100000000>; - status = "disabled"; + clock-frequency = <0>; }; soc { -- 2.7.0.rc3.207.g0ac5344 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 2016-04-27 4:06 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Simon Horman ` (3 preceding siblings ...) 2016-04-27 4:06 ` [PATCH 4/4] arm64: dts: r8a7795: Don't disable referenced optional clocks Simon Horman @ 2016-04-28 14:14 ` Arnd Bergmann 2016-04-28 14:19 ` Arnd Bergmann 4 siblings, 1 reply; 16+ messages in thread From: Arnd Bergmann @ 2016-04-28 14:14 UTC (permalink / raw) To: linux-arm-kernel Cc: Simon Horman, arm, Kevin Hilman, Magnus Damm, linux-renesas-soc, Olof Johansson On Wednesday 27 April 2016 14:06:43 Simon Horman wrote: > Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 > > * Don't disable referenced optional clocks in DT of r8a7795 SoC > * Populate EXTALR in DT of salvator-x board > * Enable PCIe in DT of salvator-x board > Pulled into next/dt64. I briefly looked at the contents and noticed that the PCIe host node you add has a dma-ranges property, but its parent node does not, so you are still limited to 32-bit DMA and you should fix that. Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 2016-04-28 14:14 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Arnd Bergmann @ 2016-04-28 14:19 ` Arnd Bergmann 0 siblings, 0 replies; 16+ messages in thread From: Arnd Bergmann @ 2016-04-28 14:19 UTC (permalink / raw) To: linux-arm-kernel Cc: Kevin Hilman, Magnus Damm, linux-renesas-soc, arm, Olof Johansson, Simon Horman On Thursday 28 April 2016 16:14:15 Arnd Bergmann wrote: > On Wednesday 27 April 2016 14:06:43 Simon Horman wrote: > > Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 > > > > * Don't disable referenced optional clocks in DT of r8a7795 SoC > > * Populate EXTALR in DT of salvator-x board > > * Enable PCIe in DT of salvator-x board > > > > Pulled into next/dt64. > > I briefly looked at the contents and noticed that the PCIe host > node you add has a dma-ranges property, but its parent node does > not, so you are still limited to 32-bit DMA and you should fix that. > On a closer look, it seems that the memory you map into the PCI is only 1 GB in size, so it's not really a problem, but I think it's cleaner to have an explicit dma-ranges property anyway. Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
* [GIT PULL] Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 @ 2016-04-27 4:20 ` Simon Horman 2016-04-27 4:20 ` [PATCH 1/2] arm64: dts: r8a7795: Add SYSC PM Domains Simon Horman ` (3 more replies) 0 siblings, 4 replies; 16+ messages in thread From: Simon Horman @ 2016-04-27 4:20 UTC (permalink / raw) To: arm Cc: linux-renesas-soc, Olof Johansson, Kevin Hilman, Arnd Bergmann, linux-arm-kernel, Magnus Damm, Simon Horman Hi Olof, Hi Kevin, Hi Arnd, Please consider these Renesas ARM64 based SoC DT PM Domain updates for v4.7. This pull requests is based on a merge of: * "[GIT PULL] Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.7", tagged as renesas-rcar-sysc2-for-v4.7, which you have already pulled * "[GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7", tagged as renesas-arm64-dt2-for-v4.7, which I have sent a pull request for. The reason for the somewhat tedious base on renesas-rcar-sysc2-for-v4.7, which provides driver changes, is a hard run-time dependency. I also have a similar set of changes for ARM (32-bit) which I will send separately. The following changes since commit 3238ec7c0a821915f38095752de97a424fd1d6ce: Merge tag 'renesas-rcar-sysc2-for-v4.7' into arm64-dt-pm-domain-for-v4.7 (2016-04-27 11:49:19 +1000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-pm-domain-for-v4.7 for you to fetch changes up to 38dbb45ee4bc7dda4aabba2178eebff2f93380d1: arm64: dts: r8a7795: Use SYSC "always-on" PM Domain (2016-04-27 14:10:41 +1000) ---------------------------------------------------------------- Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 * Add SYSC PM Domains to DT of r8a7795 SoC ---------------------------------------------------------------- Geert Uytterhoeven (2): arm64: dts: r8a7795: Add SYSC PM Domains arm64: dts: r8a7795: Use SYSC "always-on" PM Domain arch/arm64/boot/dts/renesas/r8a7795.dtsi | 123 +++++++++++++++++-------------- 1 file changed, 68 insertions(+), 55 deletions(-) ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 1/2] arm64: dts: r8a7795: Add SYSC PM Domains 2016-04-27 4:20 ` [GIT PULL] Renesas ARM64 Based SoC DT PM Domain " Simon Horman @ 2016-04-27 4:20 ` Simon Horman 2016-04-27 4:20 ` [PATCH 2/2] arm64: dts: r8a7795: Use SYSC "always-on" PM Domain Simon Horman ` (2 subsequent siblings) 3 siblings, 0 replies; 16+ messages in thread From: Simon Horman @ 2016-04-27 4:20 UTC (permalink / raw) To: linux-renesas-soc Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman From: Geert Uytterhoeven <geert+renesas@glider.be> Add a device node for the System Controller. Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2 caches/SCUs to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 7cb2d72e7378..f96d0732b2a8 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -10,6 +10,7 @@ #include <dt-bindings/clock/r8a7795-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/power/r8a7795-sysc.h> / { compatible = "renesas,r8a7795"; @@ -39,6 +40,7 @@ compatible = "arm,cortex-a57", "arm,armv8"; reg = <0x0>; device_type = "cpu"; + power-domains = <&sysc R8A7795_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -47,6 +49,7 @@ compatible = "arm,cortex-a57","arm,armv8"; reg = <0x1>; device_type = "cpu"; + power-domains = <&sysc R8A7795_PD_CA57_CPU1>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -54,6 +57,7 @@ compatible = "arm,cortex-a57","arm,armv8"; reg = <0x2>; device_type = "cpu"; + power-domains = <&sysc R8A7795_PD_CA57_CPU2>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -61,6 +65,7 @@ compatible = "arm,cortex-a57","arm,armv8"; reg = <0x3>; device_type = "cpu"; + power-domains = <&sysc R8A7795_PD_CA57_CPU3>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -68,12 +73,14 @@ L2_CA57: cache-controller@0 { compatible = "cache"; + power-domains = <&sysc R8A7795_PD_CA57_SCU>; cache-unified; cache-level = <2>; }; L2_CA53: cache-controller@1 { compatible = "cache"; + power-domains = <&sysc R8A7795_PD_CA53_SCU>; cache-unified; cache-level = <2>; }; @@ -302,6 +309,12 @@ #power-domain-cells = <0>; }; + sysc: system-controller@e6180000 { + compatible = "renesas,r8a7795-sysc"; + reg = <0 0xe6180000 0 0x0400>; + #power-domain-cells = <1>; + }; + audma0: dma-controller@ec700000 { compatible = "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; -- 2.7.0.rc3.207.g0ac5344 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 2/2] arm64: dts: r8a7795: Use SYSC "always-on" PM Domain 2016-04-27 4:20 ` [GIT PULL] Renesas ARM64 Based SoC DT PM Domain " Simon Horman 2016-04-27 4:20 ` [PATCH 1/2] arm64: dts: r8a7795: Add SYSC PM Domains Simon Horman @ 2016-04-27 4:20 ` Simon Horman 2016-04-14 16:17 ` [PATCH v3 7/7] ARM: dts: lager: Add entries for VIN HDMI input support, " Ulrich Hecht, Simon Horman 2016-05-06 0:21 ` [GIT PULL] Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 Simon Horman 2016-05-09 13:40 ` Arnd Bergmann 3 siblings, 1 reply; 16+ messages in thread From: Simon Horman @ 2016-04-27 4:20 UTC (permalink / raw) To: linux-renesas-soc Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman From: Geert Uytterhoeven <geert+renesas@glider.be> Hook up all devices that are part of the CPG/MSSR Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 110 +++++++++++++++---------------- 1 file changed, 55 insertions(+), 55 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index f96d0732b2a8..3285a9286786 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -175,7 +175,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 912>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio1: gpio@e6051000 { @@ -189,7 +189,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 911>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio2: gpio@e6052000 { @@ -203,7 +203,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 910>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio3: gpio@e6053000 { @@ -217,7 +217,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 909>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio4: gpio@e6054000 { @@ -231,7 +231,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 908>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio5: gpio@e6055000 { @@ -245,7 +245,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 907>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio6: gpio@e6055400 { @@ -259,7 +259,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 906>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio7: gpio@e6055800 { @@ -273,7 +273,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 905>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; pmu_a57 { @@ -342,7 +342,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 502>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -374,7 +374,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 501>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -396,7 +396,7 @@ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; dmac0: dma-controller@e6700000 { @@ -427,7 +427,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 219>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -460,7 +460,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 218>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -493,7 +493,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 217>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -535,7 +535,7 @@ "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; phy-mode = "rgmii-id"; #address-cells = <1>; #size-cells = <0>; @@ -552,7 +552,7 @@ clock-names = "clkp1", "clkp2", "can_clk"; assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; assigned-clock-rates = <40000000>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -567,7 +567,7 @@ clock-names = "clkp1", "clkp2", "can_clk"; assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; assigned-clock-rates = <40000000>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -583,7 +583,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x31>, <&dmac1 0x30>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -599,7 +599,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x33>, <&dmac1 0x32>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -615,7 +615,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x35>, <&dmac1 0x34>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -631,7 +631,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x37>, <&dmac0 0x36>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -647,7 +647,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x38>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -662,7 +662,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x51>, <&dmac1 0x50>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -677,7 +677,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x53>, <&dmac1 0x52>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -692,7 +692,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x13>, <&dmac1 0x12>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -707,7 +707,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x57>, <&dmac0 0x56>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -722,7 +722,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x59>, <&dmac0 0x58>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -737,7 +737,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -748,7 +748,7 @@ reg = <0 0xe6500000 0 0x40>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 931>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -760,7 +760,7 @@ reg = <0 0xe6508000 0 0x40>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 930>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -772,7 +772,7 @@ reg = <0 0xe6510000 0 0x40>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 929>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -784,7 +784,7 @@ reg = <0 0xe66d0000 0 0x40>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 928>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -796,7 +796,7 @@ reg = <0 0xe66d8000 0 0x40>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 927>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -808,7 +808,7 @@ reg = <0 0xe66e0000 0 0x40>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 919>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -820,7 +820,7 @@ reg = <0 0xe66e8000 0 0x40>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 918>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -870,7 +870,7 @@ "src.1", "src.0", "dvc.0", "dvc.1", "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; rcar_sound,dvc { @@ -1004,7 +1004,7 @@ reg = <0 0xee000000 0 0xc00>; interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 328>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1013,7 +1013,7 @@ reg = <0 0xee040000 0 0xc00>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 327>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1025,7 +1025,7 @@ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <2>; }; @@ -1038,7 +1038,7 @@ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <2>; }; @@ -1048,7 +1048,7 @@ reg = <0 0xee100000 0 0x2000>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 314>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1057,7 +1057,7 @@ reg = <0 0xee120000 0 0x2000>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 313>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1066,7 +1066,7 @@ reg = <0 0xee140000 0 0x2000>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 312>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; cap-mmc-highspeed; status = "disabled"; }; @@ -1076,7 +1076,7 @@ reg = <0 0xee160000 0 0x2000>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 311>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; cap-mmc-highspeed; status = "disabled"; }; @@ -1086,7 +1086,7 @@ reg = <0 0xee080200 0 0x700>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #phy-cells = <0>; status = "disabled"; }; @@ -1095,7 +1095,7 @@ compatible = "renesas,usb2-phy-r8a7795"; reg = <0 0xee0a0200 0 0x700>; clocks = <&cpg CPG_MOD 702>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #phy-cells = <0>; status = "disabled"; }; @@ -1104,7 +1104,7 @@ compatible = "renesas,usb2-phy-r8a7795"; reg = <0 0xee0c0200 0 0x700>; clocks = <&cpg CPG_MOD 701>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #phy-cells = <0>; status = "disabled"; }; @@ -1116,7 +1116,7 @@ clocks = <&cpg CPG_MOD 703>; phys = <&usb2_phy0>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1127,7 +1127,7 @@ clocks = <&cpg CPG_MOD 702>; phys = <&usb2_phy1>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1138,7 +1138,7 @@ clocks = <&cpg CPG_MOD 701>; phys = <&usb2_phy2>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1149,7 +1149,7 @@ clocks = <&cpg CPG_MOD 703>; phys = <&usb2_phy0>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1160,7 +1160,7 @@ clocks = <&cpg CPG_MOD 702>; phys = <&usb2_phy1>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1171,7 +1171,7 @@ clocks = <&cpg CPG_MOD 701>; phys = <&usb2_phy2>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; pciec0: pcie@fe000000 { @@ -1195,7 +1195,7 @@ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; clock-names = "pcie", "pcie_bus"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1220,7 +1220,7 @@ interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; clock-names = "pcie", "pcie_bus"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; }; -- 2.7.0.rc3.207.g0ac5344 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 7/7] ARM: dts: lager: Add entries for VIN HDMI input support, [PATCH 2/2] arm64: dts: r8a7795: Use SYSC "always-on" PM Domain 2016-04-27 4:20 ` [PATCH 2/2] arm64: dts: r8a7795: Use SYSC "always-on" PM Domain Simon Horman @ 2016-04-14 16:17 ` Ulrich Hecht, Simon Horman 0 siblings, 0 replies; 16+ messages in thread From: Ulrich Hecht, Simon Horman @ 2016-04-14 16:17 UTC (permalink / raw) To: hans.verkuil, niklas.soderlund, linux-renesas-soc Cc: linux-media, linux-renesas-soc, magnus.damm, laurent.pinchart, ian.molton, lars, william.towle, Rob Taylor, Ulrich Hecht, linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman From: William Towle <william.towle@codethink.co.uk> Add DT entries for vin0, vin0_pins, and adv7612. Sets the 'default-input' property for ADV7612, enabling image and video capture without the need to have userspace specifying routing. Signed-off-by: William Towle <william.towle@codethink.co.uk> Signed-off-by: Rob Taylor <rob.taylor@codethink.co.uk> [uli: added interrupt, renamed endpoint, merged default-input] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> --- arch/arm/boot/dts/r8a7790-lager.dts | 41 ++++++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index aa6ca92..eed0974 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -414,7 +414,12 @@ renesas,function = "usb2"; }; - vin1_pins: vin { + vin0_pins: vin0 { + renesas,groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk"; + renesas,function = "vin0"; + }; + + vin1_pins: vin1 { renesas,groups = "vin1_data8", "vin1_clk"; renesas,function = "vin1"; }; @@ -590,6 +595,21 @@ reg = <0x12>; }; + hdmi-in@4c { + compatible = "adi,adv7612"; + reg = <0x4c>; + interrupt-parent = <&gpio1>; + interrupts = <20 IRQ_TYPE_LEVEL_LOW>; + remote = <&vin0>; + default-input = <0>; + + port { + adv7612: endpoint { + remote-endpoint = <&vin0ep0>; + }; + }; + }; + composite-in@20 { compatible = "adi,adv7180"; reg = <0x20>; @@ -705,6 +725,25 @@ status = "okay"; }; +/* HDMI video input */ +&vin0 { + pinctrl-0 = <&vin0_pins>; + pinctrl-names = "default"; + + status = "ok"; + + port { + vin0ep0: endpoint { + remote-endpoint = <&adv7612>; + bus-width = <24>; + hsync-active = <0>; + vsync-active = <0>; + pclk-sample = <1>; + data-active = <1>; + }; + }; +}; + /* composite video input */ &vin1 { pinctrl-0 = <&vin1_pins>; -- 2.7.4 From: Geert Uytterhoeven <geert+renesas@glider.be> Hook up all devices that are part of the CPG/MSSR Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 110 +++++++++++++++---------------- 1 file changed, 55 insertions(+), 55 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index f96d0732b2a8..3285a9286786 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -175,7 +175,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 912>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio1: gpio@e6051000 { @@ -189,7 +189,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 911>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio2: gpio@e6052000 { @@ -203,7 +203,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 910>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio3: gpio@e6053000 { @@ -217,7 +217,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 909>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio4: gpio@e6054000 { @@ -231,7 +231,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 908>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio5: gpio@e6055000 { @@ -245,7 +245,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 907>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio6: gpio@e6055400 { @@ -259,7 +259,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 906>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; gpio7: gpio@e6055800 { @@ -273,7 +273,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 905>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; pmu_a57 { @@ -342,7 +342,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 502>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -374,7 +374,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 501>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -396,7 +396,7 @@ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; }; dmac0: dma-controller@e6700000 { @@ -427,7 +427,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 219>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -460,7 +460,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 218>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -493,7 +493,7 @@ "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 217>; clock-names = "fck"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <16>; }; @@ -535,7 +535,7 @@ "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; phy-mode = "rgmii-id"; #address-cells = <1>; #size-cells = <0>; @@ -552,7 +552,7 @@ clock-names = "clkp1", "clkp2", "can_clk"; assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; assigned-clock-rates = <40000000>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -567,7 +567,7 @@ clock-names = "clkp1", "clkp2", "can_clk"; assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; assigned-clock-rates = <40000000>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -583,7 +583,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x31>, <&dmac1 0x30>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -599,7 +599,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x33>, <&dmac1 0x32>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -615,7 +615,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x35>, <&dmac1 0x34>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -631,7 +631,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x37>, <&dmac0 0x36>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -647,7 +647,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x38>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -662,7 +662,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x51>, <&dmac1 0x50>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -677,7 +677,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x53>, <&dmac1 0x52>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -692,7 +692,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x13>, <&dmac1 0x12>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -707,7 +707,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x57>, <&dmac0 0x56>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -722,7 +722,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x59>, <&dmac0 0x58>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -737,7 +737,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; dma-names = "tx", "rx"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -748,7 +748,7 @@ reg = <0 0xe6500000 0 0x40>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 931>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -760,7 +760,7 @@ reg = <0 0xe6508000 0 0x40>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 930>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -772,7 +772,7 @@ reg = <0 0xe6510000 0 0x40>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 929>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -784,7 +784,7 @@ reg = <0 0xe66d0000 0 0x40>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 928>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -796,7 +796,7 @@ reg = <0 0xe66d8000 0 0x40>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 927>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -808,7 +808,7 @@ reg = <0 0xe66e0000 0 0x40>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 919>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -820,7 +820,7 @@ reg = <0 0xe66e8000 0 0x40>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 918>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -870,7 +870,7 @@ "src.1", "src.0", "dvc.0", "dvc.1", "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; rcar_sound,dvc { @@ -1004,7 +1004,7 @@ reg = <0 0xee000000 0 0xc00>; interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 328>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1013,7 +1013,7 @@ reg = <0 0xee040000 0 0xc00>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 327>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1025,7 +1025,7 @@ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <2>; }; @@ -1038,7 +1038,7 @@ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <2>; }; @@ -1048,7 +1048,7 @@ reg = <0 0xee100000 0 0x2000>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 314>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1057,7 +1057,7 @@ reg = <0 0xee120000 0 0x2000>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 313>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1066,7 +1066,7 @@ reg = <0 0xee140000 0 0x2000>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 312>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; cap-mmc-highspeed; status = "disabled"; }; @@ -1076,7 +1076,7 @@ reg = <0 0xee160000 0 0x2000>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 311>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; cap-mmc-highspeed; status = "disabled"; }; @@ -1086,7 +1086,7 @@ reg = <0 0xee080200 0 0x700>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #phy-cells = <0>; status = "disabled"; }; @@ -1095,7 +1095,7 @@ compatible = "renesas,usb2-phy-r8a7795"; reg = <0 0xee0a0200 0 0x700>; clocks = <&cpg CPG_MOD 702>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #phy-cells = <0>; status = "disabled"; }; @@ -1104,7 +1104,7 @@ compatible = "renesas,usb2-phy-r8a7795"; reg = <0 0xee0c0200 0 0x700>; clocks = <&cpg CPG_MOD 701>; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #phy-cells = <0>; status = "disabled"; }; @@ -1116,7 +1116,7 @@ clocks = <&cpg CPG_MOD 703>; phys = <&usb2_phy0>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1127,7 +1127,7 @@ clocks = <&cpg CPG_MOD 702>; phys = <&usb2_phy1>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1138,7 +1138,7 @@ clocks = <&cpg CPG_MOD 701>; phys = <&usb2_phy2>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1149,7 +1149,7 @@ clocks = <&cpg CPG_MOD 703>; phys = <&usb2_phy0>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1160,7 +1160,7 @@ clocks = <&cpg CPG_MOD 702>; phys = <&usb2_phy1>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1171,7 +1171,7 @@ clocks = <&cpg CPG_MOD 701>; phys = <&usb2_phy2>; phy-names = "usb"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; pciec0: pcie@fe000000 { @@ -1195,7 +1195,7 @@ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; clock-names = "pcie", "pcie_bus"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1220,7 +1220,7 @@ interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; clock-names = "pcie", "pcie_bus"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; status = "disabled"; }; }; -- 2.7.0.rc3.207.g0ac5344 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [GIT PULL] Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 2016-04-27 4:20 ` [GIT PULL] Renesas ARM64 Based SoC DT PM Domain " Simon Horman 2016-04-27 4:20 ` [PATCH 1/2] arm64: dts: r8a7795: Add SYSC PM Domains Simon Horman 2016-04-27 4:20 ` [PATCH 2/2] arm64: dts: r8a7795: Use SYSC "always-on" PM Domain Simon Horman @ 2016-05-06 0:21 ` Simon Horman 2016-05-09 13:10 ` Arnd Bergmann 2016-05-09 13:40 ` Arnd Bergmann 3 siblings, 1 reply; 16+ messages in thread From: Simon Horman @ 2016-05-06 0:21 UTC (permalink / raw) To: arm Cc: linux-renesas-soc, Olof Johansson, Kevin Hilman, Arnd Bergmann, linux-arm-kernel, Magnus Damm Hi, On Wed, Apr 27, 2016 at 02:20:10PM +1000, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM64 based SoC DT PM Domain updates for v4.7. > > This pull requests is based on a merge of: > > * "[GIT PULL] Second Round of Renesas ARM Based SoC R-Car SYSC Updates for > v4.7", tagged as renesas-rcar-sysc2-for-v4.7, which you have already > pulled > * "[GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7", > tagged as renesas-arm64-dt2-for-v4.7, which I have sent a pull request > for. > > The reason for the somewhat tedious base on > renesas-rcar-sysc2-for-v4.7, which provides driver changes, > is a hard run-time dependency. > > I also have a similar set of changes for ARM (32-bit) which I will send > separately. I am wondering if this pull-request might have slipped through the cracks. FWIW, all other pull requests I have submitted for v4.7 have been pulled (thanks!) including a similar pull-request for ARM (32-bit) which is present in the next/late branch of the arm-soc tree. I do not plan to send any more non-fix pull requests for v4.7. And at this stage I am not aware of any fixes for v4.7. > The following changes since commit 3238ec7c0a821915f38095752de97a424fd1d6ce: > > Merge tag 'renesas-rcar-sysc2-for-v4.7' into arm64-dt-pm-domain-for-v4.7 (2016-04-27 11:49:19 +1000) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-pm-domain-for-v4.7 > > for you to fetch changes up to 38dbb45ee4bc7dda4aabba2178eebff2f93380d1: > > arm64: dts: r8a7795: Use SYSC "always-on" PM Domain (2016-04-27 14:10:41 +1000) > > ---------------------------------------------------------------- > Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 > > * Add SYSC PM Domains to DT of r8a7795 SoC > > ---------------------------------------------------------------- > Geert Uytterhoeven (2): > arm64: dts: r8a7795: Add SYSC PM Domains > arm64: dts: r8a7795: Use SYSC "always-on" PM Domain > > arch/arm64/boot/dts/renesas/r8a7795.dtsi | 123 +++++++++++++++++-------------- > 1 file changed, 68 insertions(+), 55 deletions(-) > ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [GIT PULL] Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 2016-05-06 0:21 ` [GIT PULL] Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 Simon Horman @ 2016-05-09 13:10 ` Arnd Bergmann 2016-05-10 0:03 ` Simon Horman 0 siblings, 1 reply; 16+ messages in thread From: Arnd Bergmann @ 2016-05-09 13:10 UTC (permalink / raw) To: Simon Horman Cc: arm, linux-renesas-soc, Olof Johansson, Kevin Hilman, linux-arm-kernel, Magnus Damm On Friday 06 May 2016 09:21:25 Simon Horman wrote: > Hi, > > On Wed, Apr 27, 2016 at 02:20:10PM +1000, Simon Horman wrote: > > Hi Olof, Hi Kevin, Hi Arnd, > > > > Please consider these Renesas ARM64 based SoC DT PM Domain updates for v4.7. > > > > This pull requests is based on a merge of: > > > > * "[GIT PULL] Second Round of Renesas ARM Based SoC R-Car SYSC Updates for > > v4.7", tagged as renesas-rcar-sysc2-for-v4.7, which you have already > > pulled > > * "[GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7", > > tagged as renesas-arm64-dt2-for-v4.7, which I have sent a pull request > > for. > > > > The reason for the somewhat tedious base on > > renesas-rcar-sysc2-for-v4.7, which provides driver changes, > > is a hard run-time dependency. > > > > I also have a similar set of changes for ARM (32-bit) which I will send > > separately. > > I am wondering if this pull-request might have slipped through the cracks. > > FWIW, all other pull requests I have submitted for v4.7 have been pulled > (thanks!) including a similar pull-request for ARM (32-bit) which is > present in the next/late branch of the arm-soc tree. > > I do not plan to send any more non-fix pull requests for v4.7. > And at this stage I am not aware of any fixes for v4.7. > Indeed it did, thanks for the reminder! I've put it on my stack now and should start doing merges later today when I'm through my mail. Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [GIT PULL] Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 2016-05-09 13:10 ` Arnd Bergmann @ 2016-05-10 0:03 ` Simon Horman 0 siblings, 0 replies; 16+ messages in thread From: Simon Horman @ 2016-05-10 0:03 UTC (permalink / raw) To: Arnd Bergmann Cc: arm, linux-renesas-soc, Olof Johansson, Kevin Hilman, linux-arm-kernel, Magnus Damm On Mon, May 09, 2016 at 03:10:40PM +0200, Arnd Bergmann wrote: > On Friday 06 May 2016 09:21:25 Simon Horman wrote: > > Hi, > > > > On Wed, Apr 27, 2016 at 02:20:10PM +1000, Simon Horman wrote: > > > Hi Olof, Hi Kevin, Hi Arnd, > > > > > > Please consider these Renesas ARM64 based SoC DT PM Domain updates for v4.7. > > > > > > This pull requests is based on a merge of: > > > > > > * "[GIT PULL] Second Round of Renesas ARM Based SoC R-Car SYSC Updates for > > > v4.7", tagged as renesas-rcar-sysc2-for-v4.7, which you have already > > > pulled > > > * "[GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7", > > > tagged as renesas-arm64-dt2-for-v4.7, which I have sent a pull request > > > for. > > > > > > The reason for the somewhat tedious base on > > > renesas-rcar-sysc2-for-v4.7, which provides driver changes, > > > is a hard run-time dependency. > > > > > > I also have a similar set of changes for ARM (32-bit) which I will send > > > separately. > > > > I am wondering if this pull-request might have slipped through the cracks. > > > > FWIW, all other pull requests I have submitted for v4.7 have been pulled > > (thanks!) including a similar pull-request for ARM (32-bit) which is > > present in the next/late branch of the arm-soc tree. > > > > I do not plan to send any more non-fix pull requests for v4.7. > > And at this stage I am not aware of any fixes for v4.7. > > > > Indeed it did, thanks for the reminder! I've put it on my stack now > and should start doing merges later today when I'm through my mail. Great, thanks! I see that it has now been pulled. ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [GIT PULL] Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 2016-04-27 4:20 ` [GIT PULL] Renesas ARM64 Based SoC DT PM Domain " Simon Horman ` (2 preceding siblings ...) 2016-05-06 0:21 ` [GIT PULL] Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 Simon Horman @ 2016-05-09 13:40 ` Arnd Bergmann 3 siblings, 0 replies; 16+ messages in thread From: Arnd Bergmann @ 2016-05-09 13:40 UTC (permalink / raw) To: Simon Horman Cc: arm, linux-renesas-soc, Olof Johansson, Kevin Hilman, linux-arm-kernel, Magnus Damm On Wednesday 27 April 2016 14:20:10 Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM64 based SoC DT PM Domain updates for v4.7. > > This pull requests is based on a merge of: > > * "[GIT PULL] Second Round of Renesas ARM Based SoC R-Car SYSC Updates for > v4.7", tagged as renesas-rcar-sysc2-for-v4.7, which you have already > pulled > * "[GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7", > tagged as renesas-arm64-dt2-for-v4.7, which I have sent a pull request > for. > > The reason for the somewhat tedious base on > renesas-rcar-sysc2-for-v4.7, which provides driver changes, > is a hard run-time dependency. > > I also have a similar set of changes for ARM (32-bit) which I will send > separately. > Pulled into next/late now along with the 32-bit branch. Thanks, Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2016-05-10 0:03 UTC | newest]
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[not found] <1460650670-20849-1-git-send-email-ulrich.hecht+renesas@gmail.com>
2016-04-27 4:06 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Simon Horman
2016-04-27 4:06 ` [PATCH 1/4] arm64: dts: r8a7795: Add PCIe nodes Simon Horman
2016-04-27 4:06 ` [PATCH 2/4] arm64: dts: r8a7795: enable PCIe on Salvator-X Simon Horman
2016-04-27 4:06 ` [PATCH 3/4] arm64: dts: salvator-x: populate EXTALR Simon Horman
2016-04-27 4:06 ` [PATCH 4/4] arm64: dts: r8a7795: Don't disable referenced optional clocks Simon Horman
2016-04-14 16:17 ` [PATCH v3 4/7] media: rcar-vin: pad-aware driver initialisation, " Ulrich Hecht, Simon Horman
2016-04-28 14:14 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.7 Arnd Bergmann
2016-04-28 14:19 ` Arnd Bergmann
2016-04-27 4:20 ` [GIT PULL] Renesas ARM64 Based SoC DT PM Domain " Simon Horman
2016-04-27 4:20 ` [PATCH 1/2] arm64: dts: r8a7795: Add SYSC PM Domains Simon Horman
2016-04-27 4:20 ` [PATCH 2/2] arm64: dts: r8a7795: Use SYSC "always-on" PM Domain Simon Horman
2016-04-14 16:17 ` [PATCH v3 7/7] ARM: dts: lager: Add entries for VIN HDMI input support, " Ulrich Hecht, Simon Horman
2016-05-06 0:21 ` [GIT PULL] Renesas ARM64 Based SoC DT PM Domain Updates for v4.7 Simon Horman
2016-05-09 13:10 ` Arnd Bergmann
2016-05-10 0:03 ` Simon Horman
2016-05-09 13:40 ` Arnd Bergmann
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